soc 111 arch/arm/include/debug/imx-uart.h #define IMX_DEBUG_UART_BASE(soc) soc##_UART_BASE(CONFIG_DEBUG_IMX_UART_PORT) soc 18 arch/arm/mach-davinci/mux.h #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ soc 19 arch/arm/mach-davinci/mux.h [soc##_##desc] = { \ soc 29 arch/arm/mach-davinci/mux.h #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ soc 30 arch/arm/mach-davinci/mux.h [soc##_##desc] = { \ soc 40 arch/arm/mach-davinci/mux.h #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ soc 41 arch/arm/mach-davinci/mux.h [soc##_##desc] = { \ soc 12 arch/arm/mach-imx/devices/platform-fec.c #define imx_fec_data_entry_single(soc, _devid) \ soc 15 arch/arm/mach-imx/devices/platform-fec.c .iobase = soc ## _FEC_BASE_ADDR, \ soc 16 arch/arm/mach-imx/devices/platform-fec.c .irq = soc ## _INT_FEC, \ soc 8 arch/arm/mach-imx/devices/platform-flexcan.c #define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \ soc 11 arch/arm/mach-imx/devices/platform-flexcan.c .iobase = soc ## _CAN ## _hwid ## _BASE_ADDR, \ soc 13 arch/arm/mach-imx/devices/platform-flexcan.c .irq = soc ## _INT_CAN ## _hwid, \ soc 16 arch/arm/mach-imx/devices/platform-flexcan.c #define imx_flexcan_data_entry(soc, _id, _hwid, _size) \ soc 17 arch/arm/mach-imx/devices/platform-flexcan.c [_id] = imx_flexcan_data_entry_single(soc, _id, _hwid, _size) soc 11 arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c #define imx_fsl_usb2_udc_data_entry_single(soc, _devid) \ soc 14 arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c .iobase = soc ## _USB_OTG_BASE_ADDR, \ soc 15 arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c .irq = soc ## _INT_USB_OTG, \ soc 11 arch/arm/mach-imx/devices/platform-imx-fb.c #define imx_imx_fb_data_entry_single(soc, _devid, _size) \ soc 14 arch/arm/mach-imx/devices/platform-imx-fb.c .iobase = soc ## _LCDC_BASE_ADDR, \ soc 16 arch/arm/mach-imx/devices/platform-imx-fb.c .irq = soc ## _INT_LCDC, \ soc 9 arch/arm/mach-imx/devices/platform-imx-i2c.c #define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \ soc 13 arch/arm/mach-imx/devices/platform-imx-i2c.c .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \ soc 15 arch/arm/mach-imx/devices/platform-imx-i2c.c .irq = soc ## _INT_I2C ## _hwid, \ soc 18 arch/arm/mach-imx/devices/platform-imx-i2c.c #define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \ soc 19 arch/arm/mach-imx/devices/platform-imx-i2c.c [_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) soc 9 arch/arm/mach-imx/devices/platform-imx-keypad.c #define imx_imx_keypad_data_entry_single(soc, _size) \ soc 11 arch/arm/mach-imx/devices/platform-imx-keypad.c .iobase = soc ## _KPP_BASE_ADDR, \ soc 13 arch/arm/mach-imx/devices/platform-imx-keypad.c .irq = soc ## _INT_KPP, \ soc 9 arch/arm/mach-imx/devices/platform-imx-ssi.c #define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \ soc 12 arch/arm/mach-imx/devices/platform-imx-ssi.c .iobase = soc ## _SSI ## _hwid ## _BASE_ADDR, \ soc 14 arch/arm/mach-imx/devices/platform-imx-ssi.c .irq = soc ## _INT_SSI ## _hwid, \ soc 15 arch/arm/mach-imx/devices/platform-imx-ssi.c .dmatx0 = soc ## _DMA_REQ_SSI ## _hwid ## _TX0, \ soc 16 arch/arm/mach-imx/devices/platform-imx-ssi.c .dmarx0 = soc ## _DMA_REQ_SSI ## _hwid ## _RX0, \ soc 17 arch/arm/mach-imx/devices/platform-imx-ssi.c .dmatx1 = soc ## _DMA_REQ_SSI ## _hwid ## _TX1, \ soc 18 arch/arm/mach-imx/devices/platform-imx-ssi.c .dmarx1 = soc ## _DMA_REQ_SSI ## _hwid ## _RX1, \ soc 9 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \ soc 12 arch/arm/mach-imx/devices/platform-imx-uart.c .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \ soc 14 arch/arm/mach-imx/devices/platform-imx-uart.c .irqrx = soc ## _INT_UART ## _hwid ## RX, \ soc 15 arch/arm/mach-imx/devices/platform-imx-uart.c .irqtx = soc ## _INT_UART ## _hwid ## TX, \ soc 16 arch/arm/mach-imx/devices/platform-imx-uart.c .irqrts = soc ## _INT_UART ## _hwid ## RTS, \ soc 19 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx_imx_uart_1irq_data_entry(soc, _id, _hwid, _size) \ soc 22 arch/arm/mach-imx/devices/platform-imx-uart.c .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \ soc 24 arch/arm/mach-imx/devices/platform-imx-uart.c .irq = soc ## _INT_UART ## _hwid, \ soc 11 arch/arm/mach-imx/devices/platform-imx2-wdt.c #define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \ soc 14 arch/arm/mach-imx/devices/platform-imx2-wdt.c .iobase = soc ## _WDOG ## _hwid ## _BASE_ADDR, \ soc 17 arch/arm/mach-imx/devices/platform-imx2-wdt.c #define imx_imx2_wdt_data_entry(soc, _id, _hwid, _size) \ soc 18 arch/arm/mach-imx/devices/platform-imx2-wdt.c [_id] = imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) soc 9 arch/arm/mach-imx/devices/platform-imx21-hcd.c #define imx_imx21_hcd_data_entry_single(soc) \ soc 11 arch/arm/mach-imx/devices/platform-imx21-hcd.c .iobase = soc ## _USBOTG_BASE_ADDR, \ soc 12 arch/arm/mach-imx/devices/platform-imx21-hcd.c .irq = soc ## _INT_USBHOST, \ soc 11 arch/arm/mach-imx/devices/platform-ipu-core.c #define imx_ipu_core_entry_single(soc) \ soc 13 arch/arm/mach-imx/devices/platform-ipu-core.c .iobase = soc ## _IPU_CTRL_BASE_ADDR, \ soc 14 arch/arm/mach-imx/devices/platform-ipu-core.c .synirq = soc ## _INT_IPU_SYN, \ soc 15 arch/arm/mach-imx/devices/platform-ipu-core.c .errirq = soc ## _INT_IPU_ERR, \ soc 9 arch/arm/mach-imx/devices/platform-mx2-camera.c #define imx_mx2_camera_data_entry_single(soc, _devid) \ soc 12 arch/arm/mach-imx/devices/platform-mx2-camera.c .iobasecsi = soc ## _CSI_BASE_ADDR, \ soc 14 arch/arm/mach-imx/devices/platform-mx2-camera.c .irqcsi = soc ## _INT_CSI, \ soc 16 arch/arm/mach-imx/devices/platform-mx2-camera.c #define imx_mx2_camera_data_entry_single_emma(soc, _devid) \ soc 19 arch/arm/mach-imx/devices/platform-mx2-camera.c .iobasecsi = soc ## _CSI_BASE_ADDR, \ soc 21 arch/arm/mach-imx/devices/platform-mx2-camera.c .irqcsi = soc ## _INT_CSI, \ soc 22 arch/arm/mach-imx/devices/platform-mx2-camera.c .iobaseemmaprp = soc ## _EMMAPRP_BASE_ADDR, \ soc 24 arch/arm/mach-imx/devices/platform-mx2-camera.c .irqemmaprp = soc ## _INT_EMMAPRP, \ soc 9 arch/arm/mach-imx/devices/platform-mx2-emma.c #define imx_mx2_emmaprp_data_entry_single(soc) \ soc 11 arch/arm/mach-imx/devices/platform-mx2-emma.c .iobase = soc ## _EMMAPRP_BASE_ADDR, \ soc 13 arch/arm/mach-imx/devices/platform-mx2-emma.c .irq = soc ## _INT_EMMAPRP, \ soc 11 arch/arm/mach-imx/devices/platform-mxc-ehci.c #define imx_mxc_ehci_data_entry_single(soc, _id, hs) \ soc 14 arch/arm/mach-imx/devices/platform-mxc-ehci.c .iobase = soc ## _USB_ ## hs ## _BASE_ADDR, \ soc 15 arch/arm/mach-imx/devices/platform-mxc-ehci.c .irq = soc ## _INT_USB_ ## hs, \ soc 11 arch/arm/mach-imx/devices/platform-mxc-mmc.c #define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) \ soc 15 arch/arm/mach-imx/devices/platform-mxc-mmc.c .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \ soc 17 arch/arm/mach-imx/devices/platform-mxc-mmc.c .irq = soc ## _INT_SDHC ## _hwid, \ soc 18 arch/arm/mach-imx/devices/platform-mxc-mmc.c .dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \ soc 20 arch/arm/mach-imx/devices/platform-mxc-mmc.c #define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size) \ soc 21 arch/arm/mach-imx/devices/platform-mxc-mmc.c [_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) soc 11 arch/arm/mach-imx/devices/platform-mxc_nand.c #define imx_mxc_nand_data_entry_single(soc, _devid, _size) \ soc 14 arch/arm/mach-imx/devices/platform-mxc_nand.c .iobase = soc ## _NFC_BASE_ADDR, \ soc 16 arch/arm/mach-imx/devices/platform-mxc_nand.c .irq = soc ## _INT_NFC \ soc 19 arch/arm/mach-imx/devices/platform-mxc_nand.c #define imx_mxc_nandv3_data_entry_single(soc, _devid, _size) \ soc 23 arch/arm/mach-imx/devices/platform-mxc_nand.c .iobase = soc ## _NFC_BASE_ADDR, \ soc 25 arch/arm/mach-imx/devices/platform-mxc_nand.c .axibase = soc ## _NFC_AXI_BASE_ADDR, \ soc 26 arch/arm/mach-imx/devices/platform-mxc_nand.c .irq = soc ## _INT_NFC \ soc 9 arch/arm/mach-imx/devices/platform-mxc_rtc.c #define imx_mxc_rtc_data_entry_single(soc, _devid) \ soc 12 arch/arm/mach-imx/devices/platform-mxc_rtc.c .iobase = soc ## _RTC_BASE_ADDR, \ soc 13 arch/arm/mach-imx/devices/platform-mxc_rtc.c .irq = soc ## _INT_RTC, \ soc 9 arch/arm/mach-imx/devices/platform-mxc_w1.c #define imx_mxc_w1_data_entry_single(soc) \ soc 11 arch/arm/mach-imx/devices/platform-mxc_w1.c .iobase = soc ## _OWIRE_BASE_ADDR, \ soc 5 arch/arm/mach-imx/devices/platform-pata_imx.c #define imx_pata_imx_data_entry_single(soc, _size) \ soc 7 arch/arm/mach-imx/devices/platform-pata_imx.c .iobase = soc ## _ATA_BASE_ADDR, \ soc 9 arch/arm/mach-imx/devices/platform-pata_imx.c .irq = soc ## _INT_ATA, \ soc 11 arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c #define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \ soc 15 arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c .iobase = soc ## _ESDHC ## hwid ## _BASE_ADDR, \ soc 16 arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c .irq = soc ## _INT_ESDHC ## hwid, \ soc 19 arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c #define imx_sdhci_esdhc_imx_data_entry(soc, devid, id, hwid) \ soc 20 arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c [id] = imx_sdhci_esdhc_imx_data_entry_single(soc, devid, id, hwid) soc 9 arch/arm/mach-imx/devices/platform-spi_imx.c #define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \ soc 13 arch/arm/mach-imx/devices/platform-spi_imx.c .iobase = soc ## _ ## type ## hwid ## _BASE_ADDR, \ soc 15 arch/arm/mach-imx/devices/platform-spi_imx.c .irq = soc ## _INT_ ## type ## hwid, \ soc 18 arch/arm/mach-imx/devices/platform-spi_imx.c #define imx_spi_imx_data_entry(soc, type, devid, id, hwid, size) \ soc 19 arch/arm/mach-imx/devices/platform-spi_imx.c [id] = imx_spi_imx_data_entry_single(soc, type, devid, id, hwid, size) soc 103 arch/arm/mach-imx/hardware.h #define imx_map_entry(soc, name, _type) { \ soc 104 arch/arm/mach-imx/hardware.h .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ soc 105 arch/arm/mach-imx/hardware.h .pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR), \ soc 106 arch/arm/mach-imx/hardware.h .length = soc ## _ ## name ## _SIZE, \ soc 23 arch/powerpc/boot/cuboot-52xx.c void *soc, *reg; soc 36 arch/powerpc/boot/cuboot-52xx.c soc = find_node_by_devtype(NULL, "soc"); soc 37 arch/powerpc/boot/cuboot-52xx.c if (!soc) soc 38 arch/powerpc/boot/cuboot-52xx.c soc = find_node_by_compatible(NULL, "fsl,mpc5200-immr"); soc 39 arch/powerpc/boot/cuboot-52xx.c if (!soc) soc 40 arch/powerpc/boot/cuboot-52xx.c soc = find_node_by_compatible(NULL, "fsl,mpc5200b-immr"); soc 41 arch/powerpc/boot/cuboot-52xx.c if (soc) { soc 42 arch/powerpc/boot/cuboot-52xx.c setprop(soc, "bus-frequency", &bd.bi_ipbfreq, soc 45 arch/powerpc/boot/cuboot-52xx.c if (!dt_xlate_reg(soc, 0, (void*)®, NULL)) soc 49 arch/powerpc/boot/cuboot-52xx.c setprop(soc, "system-frequency", &sysfreq, sizeof(sysfreq)); soc 20 arch/powerpc/boot/cuboot-824x.c void *soc; soc 26 arch/powerpc/boot/cuboot-824x.c soc = find_node_by_devtype(NULL, "soc"); soc 27 arch/powerpc/boot/cuboot-824x.c if (soc) { soc 30 arch/powerpc/boot/cuboot-824x.c setprop(soc, "bus-frequency", &bd.bi_busfreq, soc 34 arch/powerpc/boot/cuboot-824x.c if (get_parent(serial) != soc) soc 21 arch/powerpc/boot/cuboot-83xx.c void *soc; soc 32 arch/powerpc/boot/cuboot-83xx.c soc = find_node_by_devtype(NULL, "soc"); soc 33 arch/powerpc/boot/cuboot-83xx.c if (soc) { soc 36 arch/powerpc/boot/cuboot-83xx.c setprop(soc, "bus-frequency", &bd.bi_busfreq, soc 40 arch/powerpc/boot/cuboot-83xx.c if (get_parent(serial) != soc) soc 22 arch/powerpc/boot/cuboot-85xx.c void *soc; soc 35 arch/powerpc/boot/cuboot-85xx.c soc = find_node_by_devtype(NULL, "soc"); soc 36 arch/powerpc/boot/cuboot-85xx.c if (soc) { soc 39 arch/powerpc/boot/cuboot-85xx.c setprop(soc, "bus-frequency", &bd.bi_busfreq, soc 43 arch/powerpc/boot/cuboot-85xx.c if (get_parent(serial) != soc) soc 19 arch/powerpc/boot/fsl-soc.c void *soc; soc 22 arch/powerpc/boot/fsl-soc.c soc = find_node_by_devtype(NULL, "soc"); soc 23 arch/powerpc/boot/fsl-soc.c if (soc) { soc 27 arch/powerpc/boot/fsl-soc.c size = getprop(soc, "#address-cells", prop_buf, MAX_PROP_LEN); soc 36 arch/powerpc/boot/fsl-soc.c size = getprop(soc, "ranges", prop_buf, MAX_PROP_LEN); soc 45 arch/powerpc/boot/fsl-soc.c if (!dt_xlate_addr(soc, prop_buf + naddr, 8, &ret)) soc 98 arch/powerpc/platforms/512x/clock-commonclk.c } soc; soc 103 arch/powerpc/platforms/512x/clock-commonclk.c soc = MPC512x_SOC_MPC5121; soc 107 arch/powerpc/platforms/512x/clock-commonclk.c soc = MPC512x_SOC_MPC5123; soc 111 arch/powerpc/platforms/512x/clock-commonclk.c soc = MPC512x_SOC_MPC5125; soc 118 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5121) soc 125 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 132 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 139 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 146 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 153 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 160 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 167 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 174 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 181 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 188 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 195 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 202 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 209 arch/powerpc/platforms/512x/clock-commonclk.c if (soc == MPC512x_SOC_MPC5125) soc 48 arch/powerpc/sysdev/fsl_soc.c struct device_node *soc; soc 53 arch/powerpc/sysdev/fsl_soc.c soc = of_find_node_by_type(NULL, "soc"); soc 54 arch/powerpc/sysdev/fsl_soc.c if (soc) { soc 57 arch/powerpc/sysdev/fsl_soc.c const __be32 *prop = of_get_property(soc, "#address-cells", &size); soc 64 arch/powerpc/sysdev/fsl_soc.c prop = of_get_property(soc, "ranges", &size); soc 66 arch/powerpc/sysdev/fsl_soc.c immrbase = of_translate_address(soc, prop + naddr); soc 68 arch/powerpc/sysdev/fsl_soc.c of_node_put(soc); soc 79 arch/powerpc/sysdev/fsl_soc.c struct device_node *soc; soc 84 arch/powerpc/sysdev/fsl_soc.c soc = of_find_node_by_type(NULL, "soc"); soc 85 arch/powerpc/sysdev/fsl_soc.c if (!soc) soc 88 arch/powerpc/sysdev/fsl_soc.c of_property_read_u32(soc, "clock-frequency", &sysfreq); soc 90 arch/powerpc/sysdev/fsl_soc.c of_property_read_u32(soc, "bus-frequency", &sysfreq); soc 92 arch/powerpc/sysdev/fsl_soc.c of_node_put(soc); soc 174 drivers/ata/ahci_tegra.c const struct tegra_ahci_soc *soc; soc 182 drivers/ata/ahci_tegra.c if (tegra->sata_aux_regs && !tegra->soc->supports_devslp) { soc 238 drivers/ata/ahci_tegra.c ret = regulator_bulk_enable(tegra->soc->num_supplies, soc 267 drivers/ata/ahci_tegra.c regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); soc 285 drivers/ata/ahci_tegra.c regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); soc 349 drivers/ata/ahci_tegra.c if (tegra->soc->ops && tegra->soc->ops->init) soc 350 drivers/ata/ahci_tegra.c tegra->soc->ops->init(hpriv); soc 499 drivers/ata/ahci_tegra.c tegra->soc = of_device_get_match_data(&pdev->dev); soc 541 drivers/ata/ahci_tegra.c tegra->soc->num_supplies, soc 546 drivers/ata/ahci_tegra.c for (i = 0; i < tegra->soc->num_supplies; i++) soc 547 drivers/ata/ahci_tegra.c tegra->supplies[i].supply = tegra->soc->supply_names[i]; soc 550 drivers/ata/ahci_tegra.c tegra->soc->num_supplies, soc 168 drivers/bcma/host_soc.c int __init bcma_host_soc_register(struct bcma_soc *soc) soc 170 drivers/bcma/host_soc.c struct bcma_bus *bus = &soc->bus; soc 189 drivers/bcma/host_soc.c int __init bcma_host_soc_init(struct bcma_soc *soc) soc 191 drivers/bcma/host_soc.c struct bcma_bus *bus = &soc->bus; soc 145 drivers/bus/mvebu-mbus.c const struct mvebu_mbus_soc_data *soc; soc 193 drivers/bus/mvebu-mbus.c return mbus->soc->win_remap_offset(win) != MVEBU_MBUS_NO_REMAP; soc 206 drivers/bus/mvebu-mbus.c mbus->soc->win_cfg_offset(win); soc 230 drivers/bus/mvebu-mbus.c mbus->soc->win_remap_offset(win); soc 244 drivers/bus/mvebu-mbus.c addr = mbus->mbuswins_base + mbus->soc->win_cfg_offset(win); soc 249 drivers/bus/mvebu-mbus.c addr = mbus->mbuswins_base + mbus->soc->win_remap_offset(win); soc 261 drivers/bus/mvebu-mbus.c mbus->soc->win_cfg_offset(win); soc 278 drivers/bus/mvebu-mbus.c for (win = 0; win < mbus->soc->num_wins; win++) { soc 309 drivers/bus/mvebu-mbus.c for (win = 0; win < mbus->soc->num_wins; win++) { soc 334 drivers/bus/mvebu-mbus.c mbus->soc->win_cfg_offset(win); soc 360 drivers/bus/mvebu-mbus.c mbus->soc->win_remap_offset(win); soc 381 drivers/bus/mvebu-mbus.c for (win = 0; win < mbus->soc->num_wins; win++) { soc 392 drivers/bus/mvebu-mbus.c for (win = 0; win < mbus->soc->num_wins; win++) { soc 470 drivers/bus/mvebu-mbus.c return mbus->soc->show_cpu_target(mbus, seq, v); soc 490 drivers/bus/mvebu-mbus.c for (win = 0; win < mbus->soc->num_wins; win++) { soc 801 drivers/bus/mvebu-mbus.c return mbus_state.soc->save_cpu_target(&mbus_state, store_addr); soc 985 drivers/bus/mvebu-mbus.c for (win = 0; win < mbus_state.soc->num_wins; win++) { soc 1037 drivers/bus/mvebu-mbus.c for (win = 0; win < s->soc->num_wins; win++) { soc 1039 drivers/bus/mvebu-mbus.c s->soc->win_cfg_offset(win); soc 1049 drivers/bus/mvebu-mbus.c s->soc->win_remap_offset(win); soc 1073 drivers/bus/mvebu-mbus.c for (win = 0; win < s->soc->num_wins; win++) { soc 1075 drivers/bus/mvebu-mbus.c s->soc->win_cfg_offset(win); soc 1085 drivers/bus/mvebu-mbus.c s->soc->win_remap_offset(win); soc 1131 drivers/bus/mvebu-mbus.c for (win = 0; win < mbus->soc->num_wins; win++) soc 1134 drivers/bus/mvebu-mbus.c mbus->soc->setup_cpu_target(mbus); soc 1146 drivers/bus/mvebu-mbus.c int __init mvebu_mbus_init(const char *soc, phys_addr_t mbuswins_phys_base, soc 1154 drivers/bus/mvebu-mbus.c if (!strcmp(of_id->compatible, soc)) soc 1162 drivers/bus/mvebu-mbus.c mbus_state.soc = of_id->data; soc 1321 drivers/bus/mvebu-mbus.c mbus_state.soc = of_id->data; soc 1353 drivers/bus/mvebu-mbus.c if (mbus_state.soc->has_mbus_bridge) { soc 330 drivers/clk/bcm/clk-bcm2835.c unsigned int soc; soc 2242 drivers/clk/bcm/clk-bcm2835.c (desc->supported & pdata->soc)) { soc 2256 drivers/clk/bcm/clk-bcm2835.c .soc = SOC_BCM2835, soc 2260 drivers/clk/bcm/clk-bcm2835.c .soc = SOC_BCM2711, soc 1233 drivers/clk/samsung/clk-exynos4.c enum exynos4_soc soc) soc 1236 drivers/clk/samsung/clk-exynos4.c exynos4_soc = soc; soc 1325 drivers/clk/samsung/clk-exynos4.c if (soc == EXYNOS4X12) soc 1543 drivers/clk/samsung/clk-exynos5420.c enum exynos5x_soc soc) soc 1555 drivers/clk/samsung/clk-exynos5420.c exynos5x_soc = soc; soc 1569 drivers/clk/samsung/clk-exynos5420.c if (soc == EXYNOS5420) soc 1587 drivers/clk/samsung/clk-exynos5420.c if (soc == EXYNOS5420) { soc 1606 drivers/clk/samsung/clk-exynos5420.c if (soc == EXYNOS5420) { soc 1623 drivers/clk/samsung/clk-exynos5420.c if (soc == EXYNOS5800) { soc 262 drivers/clk/tegra/clk-dfll.c struct tegra_dfll_soc_data *soc; soc 453 drivers/clk/tegra/clk-dfll.c dfll_writel(td, td->soc->cvb->cpu_dfll_data.tune0_low, DFLL_TUNE0); soc 454 drivers/clk/tegra/clk-dfll.c dfll_writel(td, td->soc->cvb->cpu_dfll_data.tune1, DFLL_TUNE1); soc 457 drivers/clk/tegra/clk-dfll.c if (td->soc->set_clock_trimmers_low) soc 458 drivers/clk/tegra/clk-dfll.c td->soc->set_clock_trimmers_low(); soc 511 drivers/clk/tegra/clk-dfll.c opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate); soc 765 drivers/clk/tegra/clk-dfll.c int vstep = td->soc->alignment.step_uv; soc 800 drivers/clk/tegra/clk-dfll.c opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate); soc 804 drivers/clk/tegra/clk-dfll.c align_step = dev_pm_opp_get_voltage(opp) / td->soc->alignment.step_uv; soc 808 drivers/clk/tegra/clk-dfll.c if ((td->lut_uv[i] / td->soc->alignment.step_uv) >= align_step) soc 1495 drivers/clk/tegra/clk-dfll.c if (td->soc->init_clock_trimmers) soc 1496 drivers/clk/tegra/clk-dfll.c td->soc->init_clock_trimmers(); soc 1531 drivers/clk/tegra/clk-dfll.c align_step = uV / td->soc->alignment.step_uv; soc 1538 drivers/clk/tegra/clk-dfll.c reg_volt_id = reg_uV / td->soc->alignment.step_uv; soc 1559 drivers/clk/tegra/clk-dfll.c align_step = uV / td->soc->alignment.step_uv; soc 1566 drivers/clk/tegra/clk-dfll.c reg_volt_id = reg_uV / td->soc->alignment.step_uv; soc 1590 drivers/clk/tegra/clk-dfll.c int v_min = td->soc->cvb->min_millivolts * 1000; soc 1610 drivers/clk/tegra/clk-dfll.c td->soc->cvb->min_millivolts); soc 1619 drivers/clk/tegra/clk-dfll.c td->soc->cvb->min_millivolts); soc 1646 drivers/clk/tegra/clk-dfll.c v = td->soc->cvb->min_millivolts * 1000; soc 1656 drivers/clk/tegra/clk-dfll.c opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate); soc 1661 drivers/clk/tegra/clk-dfll.c if (v_opp <= td->soc->cvb->min_millivolts * 1000) soc 1692 drivers/clk/tegra/clk-dfll.c td->soc->cvb->min_millivolts); soc 1711 drivers/clk/tegra/clk-dfll.c opp = dev_pm_opp_find_freq_floor(td->soc->dev, &rate); soc 1791 drivers/clk/tegra/clk-dfll.c if (!td->soc->alignment.step_uv || !td->soc->alignment.offset_uv) { soc 1797 drivers/clk/tegra/clk-dfll.c td->lut_uv[i] = td->soc->alignment.offset_uv + soc 1798 drivers/clk/tegra/clk-dfll.c i * td->soc->alignment.step_uv; soc 1880 drivers/clk/tegra/clk-dfll.c struct tegra_dfll_soc_data *soc) soc 1886 drivers/clk/tegra/clk-dfll.c if (!soc) { soc 1897 drivers/clk/tegra/clk-dfll.c td->soc = soc; soc 2036 drivers/clk/tegra/clk-dfll.c return td->soc; soc 41 drivers/clk/tegra/clk-dfll.h struct tegra_dfll_soc_data *soc); soc 556 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c struct tegra_dfll_soc_data *soc; soc 574 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c soc = devm_kzalloc(&pdev->dev, sizeof(*soc), GFP_KERNEL); soc 575 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c if (!soc) soc 578 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c soc->dev = get_cpu_device(0); soc 579 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c if (!soc->dev) { soc 592 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c soc->max_freq = fcpu_data->cpu_max_freq_table[speedo_id]; soc 594 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c soc->cvb = tegra_cvb_add_opp_table(soc->dev, fcpu_data->cpu_cvb_tables, soc 597 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c speedo_value, soc->max_freq); soc 598 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c soc->alignment = align; soc 600 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c if (IS_ERR(soc->cvb)) { soc 602 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c PTR_ERR(soc->cvb)); soc 603 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c return PTR_ERR(soc->cvb); soc 606 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c err = tegra_dfll_register(pdev, soc); soc 608 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c tegra_cvb_remove_opp_table(soc->dev, soc->cvb, soc->max_freq); soc 617 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c struct tegra_dfll_soc_data *soc; soc 619 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c soc = tegra_dfll_unregister(pdev); soc 620 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c if (IS_ERR(soc)) { soc 622 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c PTR_ERR(soc)); soc 623 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c return PTR_ERR(soc); soc 626 drivers/clk/tegra/clk-tegra124-dfll-fcpu.c tegra_cvb_remove_opp_table(soc->dev, soc->cvb, soc->max_freq); soc 48 drivers/cpufreq/qoriq-cpufreq.c struct device_node *soc; soc 54 drivers/cpufreq/qoriq-cpufreq.c soc = of_find_node_by_type(NULL, "soc"); soc 55 drivers/cpufreq/qoriq-cpufreq.c if (soc) { soc 56 drivers/cpufreq/qoriq-cpufreq.c ret = of_property_read_u32(soc, "bus-frequency", &sysfreq); soc 57 drivers/cpufreq/qoriq-cpufreq.c of_node_put(soc); soc 93 drivers/crypto/ccp/ccp-dev-v3.c if (op->soc) soc 131 drivers/crypto/ccp/ccp-dev-v3.c } else if (op->soc) { soc 157 drivers/crypto/ccp/ccp-dev-v5.c #define CCP5_CMD_SOC(p) (CCP5_CMD_DW0(p).soc) soc 290 drivers/crypto/ccp/ccp-dev-v5.c CCP5_CMD_SOC(&desc) = op->soc; soc 335 drivers/crypto/ccp/ccp-dev-v5.c CCP5_CMD_SOC(&desc) = op->soc; soc 377 drivers/crypto/ccp/ccp-dev-v5.c CCP5_CMD_SOC(&desc) = op->soc; soc 419 drivers/crypto/ccp/ccp-dev-v5.c CCP5_CMD_SOC(&desc) = op->soc; soc 461 drivers/crypto/ccp/ccp-dev-v5.c CCP5_CMD_SOC(&desc) = op->soc; soc 535 drivers/crypto/ccp/ccp-dev.h u32 soc; soc 579 drivers/crypto/ccp/ccp-dev.h unsigned int soc:1; soc 352 drivers/crypto/ccp/ccp-ops.c op->soc = 0; soc 360 drivers/crypto/ccp/ccp-ops.c op->soc = 1; soc 381 drivers/crypto/ccp/ccp-ops.c op->soc = 1; soc 423 drivers/crypto/ccp/ccp-ops.c op.soc = 1; soc 777 drivers/crypto/ccp/ccp-ops.c op.soc = 0; soc 1028 drivers/crypto/ccp/ccp-ops.c op.soc = 1; soc 1427 drivers/crypto/ccp/ccp-ops.c op.soc = 0; soc 1911 drivers/crypto/ccp/ccp-ops.c op.soc = 1; soc 2037 drivers/crypto/ccp/ccp-ops.c op.soc = 1; soc 2124 drivers/crypto/ccp/ccp-ops.c op.soc = 1; soc 2214 drivers/crypto/ccp/ccp-ops.c op.soc = 1; soc 2372 drivers/crypto/ccp/ccp-ops.c op.soc = 1; soc 145 drivers/dma/img-mdc-dma.c const struct mdc_dma_soc_data *soc; soc 543 drivers/dma/img-mdc-dma.c mdma->soc->enable_chan(mchan); soc 752 drivers/dma/img-mdc-dma.c mdma->soc->disable_chan(mchan); soc 899 drivers/dma/img-mdc-dma.c mdma->soc = of_device_get_match_data(&pdev->dev); soc 246 drivers/dma/mediatek/mtk-hsdma.c const struct mtk_hsdma_soc *soc; soc 453 drivers/dma/mediatek/mtk-hsdma.c hsdma->soc->ls0 | MTK_HSDMA_DESC_PLEN(tlen)); soc 569 drivers/dma/mediatek/mtk-hsdma.c if (!(desc2 & hsdma->soc->ddone)) soc 913 drivers/dma/mediatek/mtk-hsdma.c hsdma->soc = of_device_get_match_data(&pdev->dev); soc 914 drivers/dma/mediatek/mtk-hsdma.c if (!hsdma->soc) { soc 1804 drivers/edac/xgene_edac.c static int xgene_edac_soc_remove(struct xgene_edac_dev_ctx *soc) soc 1806 drivers/edac/xgene_edac.c struct edac_device_ctl_info *edac_dev = soc->edac_dev; soc 1809 drivers/edac/xgene_edac.c edac_device_del_device(soc->edac->dev); soc 203 drivers/firmware/tegra/bpmp-tegra186.c bpmp->soc->channels.cpu_tx.offset); soc 208 drivers/firmware/tegra/bpmp-tegra186.c bpmp->soc->channels.cpu_rx.offset); soc 213 drivers/firmware/tegra/bpmp-tegra186.c unsigned int index = bpmp->soc->channels.thread.offset + i; soc 186 drivers/firmware/tegra/bpmp-tegra210.c bpmp->soc->channels.cpu_tx.offset); soc 191 drivers/firmware/tegra/bpmp-tegra210.c bpmp->soc->channels.cpu_rx.offset); soc 196 drivers/firmware/tegra/bpmp-tegra210.c unsigned int index = bpmp->soc->channels.thread.offset + i; soc 38 drivers/firmware/tegra/bpmp.c return bpmp->soc->ops; soc 84 drivers/firmware/tegra/bpmp.c count = bpmp->soc->channels.thread.count; soc 117 drivers/firmware/tegra/bpmp.c unsigned long timeout = channel->bpmp->soc->channels.cpu_tx.timeout; soc 163 drivers/firmware/tegra/bpmp.c unsigned long timeout = channel->bpmp->soc->channels.cpu_tx.timeout; soc 194 drivers/firmware/tegra/bpmp.c return bpmp->soc->ops->ring_doorbell(bpmp); soc 256 drivers/firmware/tegra/bpmp.c unsigned long timeout = bpmp->soc->channels.thread.timeout; soc 257 drivers/firmware/tegra/bpmp.c unsigned int count = bpmp->soc->channels.thread.count; soc 376 drivers/firmware/tegra/bpmp.c timeout = usecs_to_jiffies(bpmp->soc->channels.thread.timeout); soc 665 drivers/firmware/tegra/bpmp.c count = bpmp->soc->channels.thread.count; soc 698 drivers/firmware/tegra/bpmp.c bpmp->soc = of_device_get_match_data(&pdev->dev); soc 704 drivers/firmware/tegra/bpmp.c bpmp->threaded.count = bpmp->soc->channels.thread.count; soc 734 drivers/firmware/tegra/bpmp.c err = bpmp->soc->ops->init(bpmp); soc 790 drivers/firmware/tegra/bpmp.c if (bpmp->soc->ops->deinit) soc 791 drivers/firmware/tegra/bpmp.c bpmp->soc->ops->deinit(bpmp); soc 800 drivers/firmware/tegra/bpmp.c if (bpmp->soc->ops->resume) soc 801 drivers/firmware/tegra/bpmp.c return bpmp->soc->ops->resume(bpmp); soc 30 drivers/gpio/gpio-tegra.c #define GPIO_REG(tgi, x) (GPIO_BANK(x) * tgi->soc->bank_stride + \ soc 44 drivers/gpio/gpio-tegra.c #define GPIO_MSK_CNF(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x00) soc 45 drivers/gpio/gpio-tegra.c #define GPIO_MSK_OE(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x10) soc 46 drivers/gpio/gpio-tegra.c #define GPIO_MSK_OUT(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0X20) soc 47 drivers/gpio/gpio-tegra.c #define GPIO_MSK_DBC_EN(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x30) soc 48 drivers/gpio/gpio-tegra.c #define GPIO_MSK_INT_STA(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x40) soc 49 drivers/gpio/gpio-tegra.c #define GPIO_MSK_INT_ENB(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x50) soc 50 drivers/gpio/gpio-tegra.c #define GPIO_MSK_INT_LVL(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x60) soc 90 drivers/gpio/gpio-tegra.c const struct tegra_gpio_soc_config *soc; soc 431 drivers/gpio/gpio-tegra.c if (tgi->soc->debounce_supported) { soc 472 drivers/gpio/gpio-tegra.c if (tgi->soc->debounce_supported) { soc 572 drivers/gpio/gpio-tegra.c tgi->soc = of_device_get_match_data(&pdev->dev); soc 612 drivers/gpio/gpio-tegra.c if (tgi->soc->debounce_supported) soc 64 drivers/gpio/gpio-tegra186.c const struct tegra_gpio_soc *soc; soc 74 drivers/gpio/gpio-tegra186.c for (i = 0; i < gpio->soc->num_ports; i++) { soc 75 drivers/gpio/gpio-tegra186.c const struct tegra_gpio_port *port = &gpio->soc->ports[i]; soc 223 drivers/gpio/gpio-tegra186.c if (port >= gpio->soc->num_ports) { soc 229 drivers/gpio/gpio-tegra186.c offset += gpio->soc->ports[i].pins; soc 343 drivers/gpio/gpio-tegra186.c for (i = 0; i < gpio->soc->num_ports; i++) { soc 344 drivers/gpio/gpio-tegra186.c const struct tegra_gpio_port *port = &gpio->soc->ports[i]; soc 385 drivers/gpio/gpio-tegra186.c if (port >= gpio->soc->num_ports) { soc 391 drivers/gpio/gpio-tegra186.c offset += gpio->soc->ports[i].pins; soc 418 drivers/gpio/gpio-tegra186.c gpio->soc = of_device_get_match_data(&pdev->dev); soc 444 drivers/gpio/gpio-tegra186.c gpio->gpio.label = gpio->soc->name; soc 455 drivers/gpio/gpio-tegra186.c for (i = 0; i < gpio->soc->num_ports; i++) soc 456 drivers/gpio/gpio-tegra186.c gpio->gpio.ngpio += gpio->soc->ports[i].pins; soc 463 drivers/gpio/gpio-tegra186.c for (i = 0, offset = 0; i < gpio->soc->num_ports; i++) { soc 464 drivers/gpio/gpio-tegra186.c const struct tegra_gpio_port *port = &gpio->soc->ports[i]; soc 506 drivers/gpio/gpio-tegra186.c for (i = 0, offset = 0; i < gpio->soc->num_ports; i++) { soc 507 drivers/gpio/gpio-tegra186.c const struct tegra_gpio_port *port = &gpio->soc->ports[i]; soc 1050 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = v->sr_enter_plus_exit_time; soc 1051 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.dml.soc.sr_exit_time_us = v->sr_exit_time; soc 1266 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = soc 1268 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.dml.soc.sr_exit_time_us = dc->dcn_soc->sr_exit_time; soc 1704 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.sr_exit_time_us = dc->dcn_soc->sr_exit_time; soc 1705 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.sr_enter_plus_exit_time_us = dc->dcn_soc->sr_enter_plus_exit_time; soc 1706 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.urgent_latency_us = dc->dcn_soc->urgent_latency; soc 1707 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.writeback_latency_us = dc->dcn_soc->write_back_latency; soc 1708 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.ideal_dram_bw_after_urgent_percent = soc 1710 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.max_request_size_bytes = dc->dcn_soc->max_request_size; soc 1711 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.downspread_percent = dc->dcn_soc->downspreading; soc 1712 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.round_trip_ping_latency_dcfclk_cycles = soc 1714 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.urgent_out_of_order_return_per_channel_bytes = soc 1716 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.num_chans = dc->dcn_soc->number_of_channels; soc 1717 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.vmm_page_size_bytes = dc->dcn_soc->vmm_page_size; soc 1718 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.dram_clock_change_latency_us = dc->dcn_soc->dram_clock_change_latency; soc 1719 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.soc.return_bus_width_bytes = dc->dcn_soc->return_bus_width; soc 2464 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (vlevel <= context->bw_ctx.dml.soc.num_states) soc 2467 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c vlevel = context->bw_ctx.dml.soc.num_states + 1; soc 2471 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (vlevel > context->bw_ctx.dml.soc.num_states && odm_capable) soc 2474 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (vlevel > context->bw_ctx.dml.soc.num_states) soc 2520 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c for (; vlevel_unsplit <= context->bw_ctx.dml.soc.num_states; vlevel_unsplit++) soc 2570 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (avoid_split && vlevel_unsplit <= context->bw_ctx.dml.soc.num_states && !force_split && !need_split3d) { soc 2610 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states] = soc 2664 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dispclk_mhz; soc 2665 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].clks_cfg.dppclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dppclk_mhz; soc 2687 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].dcfclk_mhz; soc 2688 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; soc 2693 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[1].dcfclk_mhz; soc 2694 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[1].socclk_mhz; soc 2704 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[2].dcfclk_mhz; soc 2705 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[2].socclk_mhz; soc 2715 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[2].dcfclk_mhz; soc 2716 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[2].socclk_mhz; soc 2725 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].dcfclk_mhz; soc 2726 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; soc 2812 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel].dppclk_mhz * 1000; soc 2813 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel].dispclk_mhz * 1000; soc 2877 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states])); soc 2897 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c double p_state_latency_us = context->bw_ctx.dml.soc.dram_clock_change_latency_us; soc 2907 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (context->bw_ctx.dml.soc.dummy_pstate_latency_us == 0 || soc 2914 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.dml.soc.dram_clock_change_latency_us = context->bw_ctx.dml.soc.dummy_pstate_latency_us; soc 2929 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.dml.soc.dram_clock_change_latency_us = p_state_latency_us; soc 956 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c double dram_clock_change_latency_cached = dml->soc.dram_clock_change_latency_us; soc 958 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c ASSERT(vlevel < dml->soc.num_states); soc 961 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[0].clks_cfg.dcfclk_mhz = dml->soc.clock_limits[vlevel].dcfclk_mhz; soc 962 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz; soc 964 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c dml->soc.dram_clock_change_latency_us = table_entry->pstate_latency_us; soc 975 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c dml->soc.dram_clock_change_latency_us = dram_clock_change_latency_cached; soc 1101 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states])); soc 1259 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c mode_lib->vba.soc.clock_limits[mode_lib->vba.soc.num_states].dispclk_mhz, soc 2596 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (k = 0; k <= mode_lib->vba.soc.num_states; k++) soc 3438 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 3520 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 3871 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 3886 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c && i == mode_lib->vba.soc.num_states) soc 3893 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c && i == mode_lib->vba.soc.num_states) soc 3961 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c if (i != mode_lib->vba.soc.num_states) { soc 3993 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4010 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4042 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4160 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4171 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4204 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4224 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4291 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4374 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= locals->soc.num_states; i++) { soc 4386 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= locals->soc.num_states; i++) { soc 4400 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= locals->soc.num_states; i++) { soc 4920 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4932 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 5007 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = mode_lib->vba.soc.num_states; i >= 0; i--) { soc 5065 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c mode_lib->vba.VoltageLevel = mode_lib->vba.soc.num_states + 1; soc 5066 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c for (i = mode_lib->vba.VoltageOverrideLevel; i <= mode_lib->vba.soc.num_states; i++) { soc 1318 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c mode_lib->vba.soc.clock_limits[mode_lib->vba.soc.num_states].dispclk_mhz, soc 2628 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (k = 0; k <= mode_lib->vba.soc.num_states; k++) soc 3470 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 3552 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 3903 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 3918 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c && i == mode_lib->vba.soc.num_states) soc 3925 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c && i == mode_lib->vba.soc.num_states) soc 3993 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c if (i != mode_lib->vba.soc.num_states) { soc 4025 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4042 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4074 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4192 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4203 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4236 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4256 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4323 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4406 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= locals->soc.num_states; i++) { soc 4418 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= locals->soc.num_states; i++) { soc 4437 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= locals->soc.num_states; i++) { soc 4951 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4963 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 5038 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = mode_lib->vba.soc.num_states; i >= 0; i--) { soc 5096 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c mode_lib->vba.VoltageLevel = mode_lib->vba.soc.num_states + 1; soc 5097 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c for (i = mode_lib->vba.VoltageOverrideLevel; i <= mode_lib->vba.soc.num_states; i++) { soc 378 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c const unsigned int log2_vmpg_bytes = dml_log2(mode_lib->soc.vmm_page_size_bytes); soc 519 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c vmpg_bytes = mode_lib->soc.vmm_page_size_bytes; soc 1077 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c line_wait = mode_lib->soc.urgent_latency_us; soc 1079 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); soc 1081 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c line_wait = dml_max(mode_lib->soc.dram_clock_change_latency_us soc 1082 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c + mode_lib->soc.urgent_latency_us, soc 378 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c const unsigned int log2_vmpg_bytes = dml_log2(mode_lib->soc.vmm_page_size_bytes); soc 519 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c vmpg_bytes = mode_lib->soc.vmm_page_size_bytes; soc 1077 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c line_wait = mode_lib->soc.urgent_latency_us; soc 1079 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); soc 1081 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c line_wait = dml_max(mode_lib->soc.dram_clock_change_latency_us soc 1082 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c + mode_lib->soc.urgent_latency_us, soc 1638 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c mode_lib->vba.soc.clock_limits[mode_lib->vba.soc.num_states - 1].dispclk_mhz, soc 3542 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 3584 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 3938 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 3958 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c && i == mode_lib->vba.soc.num_states) soc 3965 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c && i == mode_lib->vba.soc.num_states) soc 4033 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c if (i != mode_lib->vba.soc.num_states) { soc 4065 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4082 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4114 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4239 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4250 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4283 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4303 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 4370 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; ++i) { soc 4389 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 5019 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; ++i) { soc 5039 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 5103 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = mode_lib->vba.soc.num_states; i >= 0; i--) { soc 5162 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c mode_lib->vba.VoltageLevel = mode_lib->vba.soc.num_states + 1; soc 5163 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c for (i = mode_lib->vba.VoltageOverrideLevel; i <= mode_lib->vba.soc.num_states; i++) { soc 369 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c const unsigned int log2_vmpg_bytes = dml_log2(mode_lib->soc.vmm_page_size_bytes); soc 514 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c vmpg_bytes = mode_lib->soc.vmm_page_size_bytes; soc 1124 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c line_wait = mode_lib->soc.urgent_latency_pixel_data_only_us; soc 1126 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); soc 1129 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c mode_lib->soc.dram_clock_change_latency_us soc 1130 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c + mode_lib->soc.urgent_latency_pixel_data_only_us, // TODO: Should this be urgent_latency_pixel_mixed_with_vm_data_us? soc 69 drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c lib->soc = *soc_bb; soc 71 drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h struct _vcs_dpi_soc_bounding_box_st soc; soc 57 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c bool need_recalculate = memcmp(&mode_lib->soc, &mode_lib->vba.soc, sizeof(mode_lib->vba.soc)) != 0 soc 63 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.soc = mode_lib->soc; soc 195 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc_bounding_box_st *soc = &mode_lib->vba.soc; soc 199 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.ReturnBusWidth = soc->return_bus_width_bytes; soc 200 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.NumberOfChannels = soc->num_chans; soc 202 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc->pct_ideal_dram_sdp_bw_after_urgent_pixel_only; // there's always that one bastard variable that's so long it throws everything out of alignment! soc 204 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc->pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm; soc 206 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc->pct_ideal_dram_sdp_bw_after_urgent_vm_only; soc 208 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc->max_avg_sdp_bw_use_normal_percent; soc 210 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc->max_avg_dram_bw_use_normal_percent; soc 211 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.UrgentLatencyPixelDataOnly = soc->urgent_latency_pixel_data_only_us; soc 212 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.UrgentLatencyPixelMixedWithVMData = soc->urgent_latency_pixel_mixed_with_vm_data_us; soc 213 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.UrgentLatencyVMDataOnly = soc->urgent_latency_vm_data_only_us; soc 214 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.RoundTripPingLatencyCycles = soc->round_trip_ping_latency_dcfclk_cycles; soc 216 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc->urgent_out_of_order_return_per_channel_pixel_only_bytes; soc 218 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc->urgent_out_of_order_return_per_channel_pixel_and_vm_bytes; soc 220 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc->urgent_out_of_order_return_per_channel_vm_only_bytes; soc 221 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.WritebackLatency = soc->writeback_latency_us; soc 222 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.SRExitTime = soc->sr_exit_time_us; soc 223 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.SREnterPlusExitTime = soc->sr_enter_plus_exit_time_us; soc 224 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.DRAMClockChangeLatency = soc->dram_clock_change_latency_us; soc 225 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.Downspreading = soc->downspread_percent; soc 226 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.DRAMChannelWidth = soc->dram_channel_width_bytes; // new! soc 227 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.FabricDatapathToDCNDataReturn = soc->fabric_datapath_to_dcn_data_return_bytes; // new! soc 228 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading = soc->dcn_downspread_percent; // new soc 229 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.DISPCLKDPPCLKVCOSpeed = soc->dispclk_dppclk_vco_speed_mhz; // new soc 230 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.VMMPageSize = soc->vmm_page_size_bytes; soc 231 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.GPUVMMinPageSize = soc->vmm_page_size_bytes / 1024; soc 232 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.HostVMMinPageSize = soc->hostvm_min_page_size_bytes / 1024; soc 235 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c for (i = 0; i < mode_lib->vba.soc.num_states; i++) soc 236 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c if (soc->clock_limits[i].state == mode_lib->vba.VoltageLevel) soc 239 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.DCFCLK = soc->clock_limits[i].dcfclk_mhz; soc 240 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.SOCCLK = soc->clock_limits[i].socclk_mhz; soc 241 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.DRAMSpeed = soc->clock_limits[i].dram_speed_mts; soc 242 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.FabricClock = soc->clock_limits[i].fabricclk_mhz; soc 244 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.XFCBusTransportTime = soc->xfc_bus_transport_time_us; soc 245 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.XFCXBUFLatencyTolerance = soc->xfc_xbuf_latency_tolerance_us; soc 246 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.UseUrgentBurstBandwidth = soc->use_urgent_burst_bw; soc 253 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { soc 254 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.DCFCLKPerState[i] = soc->clock_limits[i].dcfclk_mhz; soc 255 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.FabricClockPerState[i] = soc->clock_limits[i].fabricclk_mhz; soc 256 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.SOCCLKPerState[i] = soc->clock_limits[i].socclk_mhz; soc 257 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.PHYCLKPerState[i] = soc->clock_limits[i].phyclk_mhz; soc 258 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.PHYCLKD18PerState[i] = soc->clock_limits[i].phyclk_d18_mhz; soc 259 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.MaxDppclk[i] = soc->clock_limits[i].dppclk_mhz; soc 260 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.MaxDSCCLK[i] = soc->clock_limits[i].dscclk_mhz; soc 261 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.DRAMSpeedPerState[i] = soc->clock_limits[i].dram_speed_mts; soc 263 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.MaxDispclk[i] = soc->clock_limits[i].dispclk_mhz; soc 267 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc->do_urgent_latency_adjustment; soc 269 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc->urgent_latency_adjustment_fabric_clock_component_us; soc 271 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc->urgent_latency_adjustment_fabric_clock_reference_mhz; soc 686 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c if (memcmp(&mode_lib->soc, &mode_lib->vba.soc, sizeof(mode_lib->vba.soc)) != 0 soc 693 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.soc = mode_lib->soc; soc 801 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c soc_bounding_box_st *soc = &mode_lib->vba.soc; soc 818 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.DISPCLK = soc->clock_limits[mode_lib->vba.VoltageLevel].dispclk_mhz; soc 122 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h soc_bounding_box_st soc; soc 461 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c log2_vmpg_bytes = dml_log2(mode_lib->soc.vmm_page_size_bytes); soc 749 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c vmpg_bytes = mode_lib->soc.vmm_page_size_bytes; soc 778 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c log2_vmpg_bytes = dml_log2(mode_lib->soc.vmm_page_size_bytes); soc 1285 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c line_wait = mode_lib->soc.urgent_latency_us; soc 1287 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); soc 1290 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c mode_lib->soc.dram_clock_change_latency_us soc 1291 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c + mode_lib->soc.urgent_latency_us, soc 1302 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c (double) mode_lib->soc.sr_enter_plus_exit_time_us); soc 1306 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c (double) mode_lib->soc.dram_clock_change_latency_us); soc 1310 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c mode_lib->soc.urgent_latency_us); soc 1402 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c t_vm_us = dml_max(mode_lib->soc.urgent_latency_us, t_vm_us); soc 1417 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c t_r0_us = dml_max(mode_lib->soc.urgent_latency_us * 2.0, t_r0_us); soc 261 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c fsl_dev->soc = id->data; soc 193 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h const struct fsl_dcu_soc_data *soc; soc 24 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c unsigned int total_layer = fsl_dev->soc->total_layer; soc 154 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c if (!strcmp(fsl_dev->soc->name, "ls1021a")) { soc 201 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c for (i = 0; i < fsl_dev->soc->total_layer; i++) { soc 202 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c for (j = 1; j <= fsl_dev->soc->layer_regs; j++) soc 4755 drivers/gpu/drm/omapdrm/dss/dispc.c const struct soc_device_attribute *soc; soc 4777 drivers/gpu/drm/omapdrm/dss/dispc.c soc = soc_device_match(dispc_soc_devices); soc 4778 drivers/gpu/drm/omapdrm/dss/dispc.c if (soc) soc 4779 drivers/gpu/drm/omapdrm/dss/dispc.c dispc->feat = soc->data; soc 5264 drivers/gpu/drm/omapdrm/dss/dsi.c const struct soc_device_attribute *soc; soc 5334 drivers/gpu/drm/omapdrm/dss/dsi.c soc = soc_device_match(dsi_soc_devices); soc 5335 drivers/gpu/drm/omapdrm/dss/dsi.c if (soc) soc 5336 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->data = soc->data; soc 1397 drivers/gpu/drm/omapdrm/dss/dss.c const struct soc_device_attribute *soc; soc 1420 drivers/gpu/drm/omapdrm/dss/dss.c soc = soc_device_match(dss_soc_devices); soc 1421 drivers/gpu/drm/omapdrm/dss/dss.c if (soc) soc 1422 drivers/gpu/drm/omapdrm/dss/dss.c dss->feat = soc->data; soc 914 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c const struct soc_device_attribute *soc; soc 916 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c soc = soc_device_match(hdmi4_soc_devices); soc 917 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c if (!soc) soc 920 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c features = soc->data; soc 558 drivers/gpu/drm/omapdrm/omap_drv.c const struct soc_device_attribute *soc; soc 580 drivers/gpu/drm/omapdrm/omap_drv.c soc = soc_device_match(omapdrm_soc_devices); soc 581 drivers/gpu/drm/omapdrm/omap_drv.c priv->omaprev = soc ? (unsigned int)soc->data : 0; soc 33 drivers/gpu/drm/rcar-du/rcar_du_of.c #define RCAR_DU_OF_DTB(type, soc) \ soc 34 drivers/gpu/drm/rcar-du/rcar_du_of.c extern char __dtb_rcar_du_of_##type##_##soc##_begin[]; \ soc 35 drivers/gpu/drm/rcar-du/rcar_du_of.c extern char __dtb_rcar_du_of_##type##_##soc##_end[] soc 37 drivers/gpu/drm/rcar-du/rcar_du_of.c #define RCAR_DU_OF_OVERLAY(type, soc) \ soc 39 drivers/gpu/drm/rcar-du/rcar_du_of.c .compatible = "renesas,du-" #soc, \ soc 40 drivers/gpu/drm/rcar-du/rcar_du_of.c .begin = __dtb_rcar_du_of_##type##_##soc##_begin, \ soc 41 drivers/gpu/drm/rcar-du/rcar_du_of.c .end = __dtb_rcar_du_of_##type##_##soc##_end, \ soc 315 drivers/gpu/drm/tegra/dc.c if (plane->index == 0 && dc->soc->has_win_a_without_filters) soc 330 drivers/gpu/drm/tegra/dc.c if (plane->index == 0 && dc->soc->has_win_a_without_filters) soc 333 drivers/gpu/drm/tegra/dc.c if (plane->index == 2 && dc->soc->has_win_c_without_vert_filter) soc 413 drivers/gpu/drm/tegra/dc.c if (dc->soc->supports_block_linear) { soc 516 drivers/gpu/drm/tegra/dc.c if (dc->soc->has_legacy_blending) soc 626 drivers/gpu/drm/tegra/dc.c if (dc->soc->has_legacy_blending) { soc 637 drivers/gpu/drm/tegra/dc.c !dc->soc->supports_block_linear) { soc 777 drivers/gpu/drm/tegra/dc.c num_formats = dc->soc->num_primary_formats; soc 778 drivers/gpu/drm/tegra/dc.c formats = dc->soc->primary_formats; soc 779 drivers/gpu/drm/tegra/dc.c modifiers = dc->soc->modifiers; soc 1058 drivers/gpu/drm/tegra/dc.c num_formats = dc->soc->num_overlay_formats; soc 1059 drivers/gpu/drm/tegra/dc.c formats = dc->soc->overlay_formats; soc 1094 drivers/gpu/drm/tegra/dc.c for (i = 0; i < dc->soc->num_wgrps; i++) { soc 1095 drivers/gpu/drm/tegra/dc.c const struct tegra_windowgroup_soc *wgrp = &dc->soc->wgrps[i]; soc 1134 drivers/gpu/drm/tegra/dc.c if (dc->soc->supports_cursor) soc 1542 drivers/gpu/drm/tegra/dc.c if (dc->syncpt && !dc->soc->has_nvdisplay) soc 1592 drivers/gpu/drm/tegra/dc.c if (!dc->soc->has_nvdisplay) { soc 1676 drivers/gpu/drm/tegra/dc.c if (!dc->soc->has_nvdisplay) { soc 1791 drivers/gpu/drm/tegra/dc.c if (dc->soc->has_nvdisplay) soc 1803 drivers/gpu/drm/tegra/dc.c if (dc->soc->has_nvdisplay) { soc 1850 drivers/gpu/drm/tegra/dc.c if (dc->soc->supports_background_color) soc 1862 drivers/gpu/drm/tegra/dc.c if (dc->soc->supports_interlacing) { soc 1873 drivers/gpu/drm/tegra/dc.c if (!dc->soc->has_nvdisplay) { soc 1881 drivers/gpu/drm/tegra/dc.c if (dc->soc->has_nvdisplay) { soc 1982 drivers/gpu/drm/tegra/dc.c if (!dc->soc->wgrps) soc 1985 drivers/gpu/drm/tegra/dc.c for (i = 0; i < dc->soc->num_wgrps; i++) { soc 1986 drivers/gpu/drm/tegra/dc.c const struct tegra_windowgroup_soc *wgrp = &dc->soc->wgrps[i]; soc 2024 drivers/gpu/drm/tegra/dc.c if (dc->soc->wgrps) soc 2034 drivers/gpu/drm/tegra/dc.c if (dc->soc->supports_cursor) { soc 2060 drivers/gpu/drm/tegra/dc.c if (dc->soc->pitch_align > tegra->pitch_align) soc 2061 drivers/gpu/drm/tegra/dc.c tegra->pitch_align = dc->soc->pitch_align; soc 2390 drivers/gpu/drm/tegra/dc.c if (dc->soc->coupled_pm && dc->pipe == 1) { soc 2422 drivers/gpu/drm/tegra/dc.c dc->soc = of_device_get_match_data(&pdev->dev); soc 2462 drivers/gpu/drm/tegra/dc.c if (dc->soc->has_powergate) { soc 2540 drivers/gpu/drm/tegra/dc.c if (dc->soc->has_powergate) soc 2553 drivers/gpu/drm/tegra/dc.c if (dc->soc->has_powergate) { soc 92 drivers/gpu/drm/tegra/dc.h const struct tegra_dc_soc_info *soc; soc 25 drivers/gpu/drm/tegra/gr2d.c const struct gr2d_soc *soc; soc 201 drivers/gpu/drm/tegra/gr2d.c gr2d->soc = of_device_get_match_data(dev); soc 227 drivers/gpu/drm/tegra/gr2d.c gr2d->client.version = gr2d->soc->version; soc 34 drivers/gpu/drm/tegra/gr3d.c const struct gr3d_soc *soc; soc 295 drivers/gpu/drm/tegra/gr3d.c gr3d->soc = of_device_get_match_data(&pdev->dev); soc 354 drivers/gpu/drm/tegra/gr3d.c gr3d->client.version = gr3d->soc->version; soc 141 drivers/gpu/drm/tegra/hub.c for (i = 0; i < hub->soc->num_wgrps; i++) { soc 158 drivers/gpu/drm/tegra/hub.c for (i = 0; i < hub->soc->num_wgrps; i++) { soc 350 drivers/gpu/drm/tegra/hub.c !dc->soc->supports_block_linear) { soc 491 drivers/gpu/drm/tegra/hub.c if (dc->soc->supports_block_linear) { soc 755 drivers/gpu/drm/tegra/hub.c hub->soc = of_device_get_match_data(&pdev->dev); soc 763 drivers/gpu/drm/tegra/hub.c if (hub->soc->supports_dsc) { soc 783 drivers/gpu/drm/tegra/hub.c hub->wgrps = devm_kcalloc(&pdev->dev, hub->soc->num_wgrps, soc 788 drivers/gpu/drm/tegra/hub.c for (i = 0; i < hub->soc->num_wgrps; i++) { soc 51 drivers/gpu/drm/tegra/hub.h const struct tegra_display_hub_soc *soc; soc 400 drivers/gpu/drm/tegra/sor.c const struct tegra_sor_soc *soc; soc 630 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0); soc 634 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0); soc 636 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0); soc 639 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0); soc 643 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0); soc 646 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0); soc 1097 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->head_state1 + dc->pipe); soc 1104 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->head_state2 + dc->pipe); soc 1111 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->head_state3 + dc->pipe); soc 1118 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->head_state4 + dc->pipe); soc 1121 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, 0x001, sor->soc->regs->head_state5 + dc->pipe); soc 1203 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0); soc 1206 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0); soc 1226 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 1228 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll2); soc 1232 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll0); soc 1234 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll0); soc 1236 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 1239 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll2); soc 1727 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 1729 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll2); soc 1732 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll3); soc 1734 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll3); soc 1738 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll0); soc 1740 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 1744 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll2); soc 1747 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll1); soc 1750 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 1757 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 1760 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll2); soc 1773 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 1776 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll2); soc 1778 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll0); soc 1780 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll0); soc 1782 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0); soc 1784 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0); soc 1794 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 1796 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll2); soc 1801 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll0); soc 1804 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll0); soc 1806 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 1808 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll2); soc 1813 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 1815 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll2); soc 1831 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0); soc 1848 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0); soc 1892 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0); soc 1894 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0); soc 2401 drivers/gpu/drm/tegra/sor.c if (!sor->soc->has_nvdisplay) soc 2456 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 2458 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll2); soc 2462 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll3); soc 2464 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll3); soc 2466 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll0); soc 2469 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll0); soc 2471 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 2473 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll2); soc 2477 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll2); soc 2480 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll2); soc 2484 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0); soc 2487 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0); soc 2548 drivers/gpu/drm/tegra/sor.c if (!sor->soc->has_nvdisplay) { soc 2585 drivers/gpu/drm/tegra/sor.c if (!sor->soc->has_nvdisplay) { soc 2601 drivers/gpu/drm/tegra/sor.c if (!dc->soc->has_nvdisplay) { soc 2634 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0); soc 2636 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0); soc 2646 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll0); soc 2653 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll0); soc 2656 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll1); soc 2662 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll1); soc 2664 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->pll3); soc 2673 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->pll3); soc 2687 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0); soc 2691 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0); soc 2693 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl2); soc 2696 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl2); soc 2699 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0); soc 2701 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0); soc 2703 drivers/gpu/drm/tegra/sor.c if (!dc->soc->has_nvdisplay) { soc 2749 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->head_state0 + dc->pipe); soc 2752 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->head_state0 + dc->pipe); soc 2755 drivers/gpu/drm/tegra/sor.c value = tegra_sor_readl(sor, sor->soc->regs->head_state0 + dc->pipe); soc 2758 drivers/gpu/drm/tegra/sor.c tegra_sor_writel(sor, value, sor->soc->regs->head_state0 + dc->pipe); soc 2776 drivers/gpu/drm/tegra/sor.c if (!sor->soc->has_nvdisplay) soc 2783 drivers/gpu/drm/tegra/sor.c if (dc->soc->has_nvdisplay) { soc 2817 drivers/gpu/drm/tegra/sor.c if (sor->soc->supports_hdmi) { soc 2821 drivers/gpu/drm/tegra/sor.c } else if (sor->soc->supports_lvds) { soc 2826 drivers/gpu/drm/tegra/sor.c if (sor->soc->supports_edp) { soc 2830 drivers/gpu/drm/tegra/sor.c } else if (sor->soc->supports_dp) { soc 3191 drivers/gpu/drm/tegra/sor.c if (sor->soc->has_nvdisplay) { soc 3204 drivers/gpu/drm/tegra/sor.c if (sor->soc->supports_edp) soc 3214 drivers/gpu/drm/tegra/sor.c sor->xbar_cfg[i] = sor->soc->xbar_cfg[i]; soc 3262 drivers/gpu/drm/tegra/sor.c sor->soc = of_device_get_match_data(&pdev->dev); soc 3265 drivers/gpu/drm/tegra/sor.c sor->settings = devm_kmemdup(&pdev->dev, sor->soc->settings, soc 3266 drivers/gpu/drm/tegra/sor.c sor->soc->num_settings * soc 3272 drivers/gpu/drm/tegra/sor.c sor->num_settings = sor->soc->num_settings; soc 3284 drivers/gpu/drm/tegra/sor.c if (sor->soc->supports_hdmi) { soc 3287 drivers/gpu/drm/tegra/sor.c } else if (sor->soc->supports_lvds) { soc 3295 drivers/gpu/drm/tegra/sor.c if (sor->soc->supports_edp) { soc 3298 drivers/gpu/drm/tegra/sor.c } else if (sor->soc->supports_dp) { soc 3374 drivers/gpu/drm/tegra/sor.c if (sor->soc->supports_hdmi || sor->soc->supports_dp) { soc 120 drivers/gpu/host1x/mipi.c const struct tegra_mipi_soc *soc; soc 160 drivers/gpu/host1x/mipi.c if (mipi->soc->needs_vclamp_ref) soc 200 drivers/gpu/host1x/mipi.c if (mipi->soc->needs_vclamp_ref) soc 315 drivers/gpu/host1x/mipi.c const struct tegra_mipi_soc *soc = device->mipi->soc; soc 326 drivers/gpu/host1x/mipi.c value = MIPI_CAL_BIAS_PAD_DRV_DN_REF(soc->pad_drive_down_ref) | soc 327 drivers/gpu/host1x/mipi.c MIPI_CAL_BIAS_PAD_DRV_UP_REF(soc->pad_drive_up_ref); soc 333 drivers/gpu/host1x/mipi.c value |= MIPI_CAL_BIAS_PAD_VCLAMP(soc->pad_vclamp_level); soc 334 drivers/gpu/host1x/mipi.c value |= MIPI_CAL_BIAS_PAD_VAUXP(soc->pad_vauxp_level); soc 337 drivers/gpu/host1x/mipi.c for (i = 0; i < soc->num_pads; i++) { soc 342 drivers/gpu/host1x/mipi.c MIPI_CAL_CONFIG_HSPDOS(soc->hspdos) | soc 343 drivers/gpu/host1x/mipi.c MIPI_CAL_CONFIG_HSPUOS(soc->hspuos) | soc 344 drivers/gpu/host1x/mipi.c MIPI_CAL_CONFIG_TERMOS(soc->termos); soc 346 drivers/gpu/host1x/mipi.c MIPI_CAL_CONFIG_HSCLKPDOSD(soc->hsclkpdos) | soc 347 drivers/gpu/host1x/mipi.c MIPI_CAL_CONFIG_HSCLKPUOSD(soc->hsclkpuos); soc 350 drivers/gpu/host1x/mipi.c tegra_mipi_writel(device->mipi, data, soc->pads[i].data); soc 352 drivers/gpu/host1x/mipi.c if (soc->has_clk_lane && soc->pads[i].clk != 0) soc 353 drivers/gpu/host1x/mipi.c tegra_mipi_writel(device->mipi, clk, soc->pads[i].clk); soc 362 drivers/gpu/host1x/mipi.c if (!soc->clock_enable_override) soc 512 drivers/gpu/host1x/mipi.c mipi->soc = match->data; soc 154 drivers/iio/adc/mxs-lradc-adc.c if (lradc->soc == IMX28_LRADC) soc 494 drivers/iio/adc/mxs-lradc-adc.c if (lradc->soc == IMX28_LRADC) soc 530 drivers/iio/adc/mxs-lradc-adc.c if (lradc->soc == IMX28_LRADC) soc 731 drivers/iio/adc/mxs-lradc-adc.c if (lradc->soc == IMX23_LRADC) { soc 770 drivers/iio/adc/mxs-lradc-adc.c adc->vref_mv = mxs_lradc_adc_vref_mv[lradc->soc]; soc 282 drivers/input/touchscreen/mxs-lradc-ts.c writel(info[lradc->soc].mask, soc 284 drivers/input/touchscreen/mxs-lradc-ts.c writel(info[lradc->soc].bit, soc 304 drivers/input/touchscreen/mxs-lradc-ts.c writel(info[lradc->soc].mask, soc 306 drivers/input/touchscreen/mxs-lradc-ts.c writel(info[lradc->soc].x_plate, soc 330 drivers/input/touchscreen/mxs-lradc-ts.c writel(info[lradc->soc].mask, soc 332 drivers/input/touchscreen/mxs-lradc-ts.c writel(info[lradc->soc].y_plate, soc 356 drivers/input/touchscreen/mxs-lradc-ts.c writel(info[lradc->soc].mask, soc 358 drivers/input/touchscreen/mxs-lradc-ts.c writel(info[lradc->soc].pressure, soc 544 drivers/input/touchscreen/mxs-lradc-ts.c writel(info[lradc->soc].mask, soc 566 drivers/input/touchscreen/mxs-lradc-ts.c if (lradc->soc == IMX28_LRADC) { soc 22 drivers/iommu/tegra-smmu.c const struct tegra_smmu_group_soc *soc; soc 31 drivers/iommu/tegra-smmu.c const struct tegra_smmu_soc *soc; soc 83 drivers/iommu/tegra-smmu.c ((smmu)->soc->num_tlb_lines & (smmu)->tlb_mask) soc 177 drivers/iommu/tegra-smmu.c offset &= ~(smmu->mc->soc->atom_size - 1); soc 179 drivers/iommu/tegra-smmu.c if (smmu->mc->soc->num_address_bits > 32) { soc 202 drivers/iommu/tegra-smmu.c if (smmu->soc->num_asids == 4) soc 217 drivers/iommu/tegra-smmu.c if (smmu->soc->num_asids == 4) soc 232 drivers/iommu/tegra-smmu.c if (smmu->soc->num_asids == 4) soc 252 drivers/iommu/tegra-smmu.c id = find_first_zero_bit(smmu->asids, smmu->soc->num_asids); soc 253 drivers/iommu/tegra-smmu.c if (id >= smmu->soc->num_asids) { soc 337 drivers/iommu/tegra-smmu.c for (i = 0; i < smmu->soc->num_swgroups; i++) { soc 338 drivers/iommu/tegra-smmu.c if (smmu->soc->swgroups[i].swgroup == swgroup) { soc 339 drivers/iommu/tegra-smmu.c group = &smmu->soc->swgroups[i]; soc 354 drivers/iommu/tegra-smmu.c for (i = 0; i < smmu->soc->num_clients; i++) { soc 355 drivers/iommu/tegra-smmu.c const struct tegra_mc_client *client = &smmu->soc->clients[i]; soc 391 drivers/iommu/tegra-smmu.c for (i = 0; i < smmu->soc->num_clients; i++) { soc 392 drivers/iommu/tegra-smmu.c const struct tegra_mc_client *client = &smmu->soc->clients[i]; soc 818 drivers/iommu/tegra-smmu.c for (i = 0; i < smmu->soc->num_groups; i++) soc 819 drivers/iommu/tegra-smmu.c for (j = 0; j < smmu->soc->groups[i].num_swgroups; j++) soc 820 drivers/iommu/tegra-smmu.c if (smmu->soc->groups[i].swgroups[j] == swgroup) soc 821 drivers/iommu/tegra-smmu.c return &smmu->soc->groups[i]; soc 829 drivers/iommu/tegra-smmu.c const struct tegra_smmu_group_soc *soc; soc 832 drivers/iommu/tegra-smmu.c soc = tegra_smmu_find_group(smmu, swgroup); soc 833 drivers/iommu/tegra-smmu.c if (!soc) soc 839 drivers/iommu/tegra-smmu.c if (group->soc == soc) { soc 851 drivers/iommu/tegra-smmu.c group->soc = soc; soc 927 drivers/iommu/tegra-smmu.c for (i = 0; i < smmu->soc->num_swgroups; i++) { soc 928 drivers/iommu/tegra-smmu.c const struct tegra_smmu_swgroup *group = &smmu->soc->swgroups[i]; soc 959 drivers/iommu/tegra-smmu.c for (i = 0; i < smmu->soc->num_clients; i++) { soc 960 drivers/iommu/tegra-smmu.c const struct tegra_mc_client *client = &smmu->soc->clients[i]; soc 996 drivers/iommu/tegra-smmu.c const struct tegra_smmu_soc *soc, soc 1018 drivers/iommu/tegra-smmu.c size = BITS_TO_LONGS(soc->num_asids) * sizeof(long); soc 1028 drivers/iommu/tegra-smmu.c smmu->soc = soc; soc 1032 drivers/iommu/tegra-smmu.c smmu->pfn_mask = BIT_MASK(mc->soc->num_address_bits - PAGE_SHIFT) - 1; soc 1034 drivers/iommu/tegra-smmu.c mc->soc->num_address_bits, smmu->pfn_mask); soc 1035 drivers/iommu/tegra-smmu.c smmu->tlb_mask = (smmu->soc->num_tlb_lines << 1) - 1; soc 1036 drivers/iommu/tegra-smmu.c dev_dbg(dev, "TLB lines: %u, mask: %#lx\n", smmu->soc->num_tlb_lines, soc 1041 drivers/iommu/tegra-smmu.c if (soc->supports_request_limit) soc 1049 drivers/iommu/tegra-smmu.c if (soc->supports_round_robin_arbitration) soc 280 drivers/irqchip/irq-tegra.c const struct tegra_ictlr_soc *soc; soc 299 drivers/irqchip/irq-tegra.c soc = match->data; soc 328 drivers/irqchip/irq-tegra.c WARN(num_ictlrs != soc->num_ictlrs, soc 330 drivers/irqchip/irq-tegra.c node, num_ictlrs, soc->num_ictlrs); soc 87 drivers/mailbox/tegra-hsp.c const struct tegra_hsp_soc *soc; soc 446 drivers/mailbox/tegra-hsp.c if (hsp->soc->has_per_mb_ie) { soc 465 drivers/mailbox/tegra-hsp.c if (hsp->soc->has_per_mb_ie) { soc 557 drivers/mailbox/tegra-hsp.c const struct tegra_hsp_db_map *map = hsp->soc->map; soc 644 drivers/mailbox/tegra-hsp.c hsp->soc = of_device_get_match_data(&pdev->dev); soc 138 drivers/memory/tegra/mc.c for (i = 0; i < mc->soc->num_resets; i++) soc 139 drivers/memory/tegra/mc.c if (mc->soc->resets[i].id == id) soc 140 drivers/memory/tegra/mc.c return &mc->soc->resets[i]; soc 158 drivers/memory/tegra/mc.c rst_ops = mc->soc->reset_ops; soc 210 drivers/memory/tegra/mc.c rst_ops = mc->soc->reset_ops; soc 248 drivers/memory/tegra/mc.c rst_ops = mc->soc->reset_ops; soc 269 drivers/memory/tegra/mc.c mc->reset.nr_resets = mc->soc->num_resets; soc 294 drivers/memory/tegra/mc.c for (i = 0; i < mc->soc->num_clients; i++) { soc 295 drivers/memory/tegra/mc.c const struct tegra_mc_la *la = &mc->soc->clients[i].la; soc 328 drivers/memory/tegra/mc.c for (i = 0; i < mc->soc->num_emem_regs; ++i) soc 329 drivers/memory/tegra/mc.c mc_writel(mc, timing->emem_data[i], mc->soc->emem_regs[i]); soc 358 drivers/memory/tegra/mc.c timing->emem_data = devm_kcalloc(mc->dev, mc->soc->num_emem_regs, soc 365 drivers/memory/tegra/mc.c mc->soc->num_emem_regs); soc 461 drivers/memory/tegra/mc.c status = mc_readl(mc, MC_INTSTATUS) & mc->soc->intmask; soc 478 drivers/memory/tegra/mc.c if (mc->soc->num_address_bits > 32) { soc 495 drivers/memory/tegra/mc.c id = value & mc->soc->client_id_mask; soc 497 drivers/memory/tegra/mc.c for (i = 0; i < mc->soc->num_clients; i++) { soc 498 drivers/memory/tegra/mc.c if (mc->soc->clients[i].id == id) { soc 499 drivers/memory/tegra/mc.c client = mc->soc->clients[i].name; soc 558 drivers/memory/tegra/mc.c status = mc_readl(mc, MC_INTSTATUS) & mc->soc->intmask; soc 575 drivers/memory/tegra/mc.c id = value & mc->soc->client_id_mask; soc 586 drivers/memory/tegra/mc.c id = (value >> 1) & mc->soc->client_id_mask; soc 597 drivers/memory/tegra/mc.c id = value & mc->soc->client_id_mask; soc 610 drivers/memory/tegra/mc.c client = mc->soc->clients[id].name; soc 637 drivers/memory/tegra/mc.c mc->soc = of_device_get_match_data(&pdev->dev); soc 656 drivers/memory/tegra/mc.c if (mc->soc == &tegra20_mc_soc) { soc 685 drivers/memory/tegra/mc.c WARN(!mc->soc->client_id_mask, "missing client ID mask for this SoC\n"); soc 687 drivers/memory/tegra/mc.c mc_writel(mc, mc->soc->intmask, MC_INTMASK); soc 702 drivers/memory/tegra/mc.c if (IS_ENABLED(CONFIG_TEGRA_IOMMU_SMMU) && mc->soc->smmu) { soc 703 drivers/memory/tegra/mc.c mc->smmu = tegra_smmu_probe(&pdev->dev, mc->soc->smmu, mc); soc 711 drivers/memory/tegra/mc.c if (IS_ENABLED(CONFIG_TEGRA_IOMMU_GART) && !mc->soc->smmu) { soc 145 drivers/mfd/mxs-lradc.c lradc->soc = (enum mxs_lradc_id)of_id->data; soc 170 drivers/mfd/mxs-lradc.c if (lradc->soc == IMX28_LRADC) { soc 195 drivers/mfd/mxs-lradc.c switch (lradc->soc) { soc 325 drivers/mmc/host/renesas_sdhi_internal_dmac.c const struct soc_device_attribute *soc = soc_device_match(soc_whitelist); soc 328 drivers/mmc/host/renesas_sdhi_internal_dmac.c if (!soc) soc 331 drivers/mmc/host/renesas_sdhi_internal_dmac.c global_flags |= (unsigned long)soc->data; soc 1039 drivers/mmc/host/sdhci-omap.c const struct soc_device_attribute *soc; soc 1075 drivers/mmc/host/sdhci-omap.c soc = soc_device_match(sdhci_omap_soc_devices); soc 1076 drivers/mmc/host/sdhci-omap.c if (soc) { soc 1242 drivers/mmc/host/sdhci-tegra.c const struct sdhci_tegra_soc_data *soc = tegra->soc_data; soc 1245 drivers/mmc/host/sdhci-tegra.c if (soc->dma_mask) soc 1246 drivers/mmc/host/sdhci-tegra.c return dma_set_mask_and_coherent(dev, soc->dma_mask); soc 18 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c struct brcmnand_soc soc; soc 29 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c static bool bcm63138_nand_intc_ack(struct brcmnand_soc *soc) soc 32 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c container_of(soc, struct bcm63138_nand_soc, soc); soc 44 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c static void bcm63138_nand_intc_set(struct brcmnand_soc *soc, bool en) soc 47 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c container_of(soc, struct bcm63138_nand_soc, soc); soc 63 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c struct brcmnand_soc *soc; soc 69 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c soc = &priv->soc; soc 76 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c soc->ctlrdy_ack = bcm63138_nand_intc_ack; soc 77 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c soc->ctlrdy_set_enabled = bcm63138_nand_intc_set; soc 79 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c return brcmnand_probe(pdev, soc); soc 27 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c struct brcmnand_soc soc; soc 50 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c static bool bcm6368_nand_intc_ack(struct brcmnand_soc *soc) soc 53 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c container_of(soc, struct bcm6368_nand_soc, soc); soc 68 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c static void bcm6368_nand_intc_set(struct brcmnand_soc *soc, bool en) soc 71 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c container_of(soc, struct bcm6368_nand_soc, soc); soc 90 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c struct brcmnand_soc *soc; soc 96 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c soc = &priv->soc; soc 104 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c soc->ctlrdy_ack = bcm6368_nand_intc_ack; soc 105 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c soc->ctlrdy_set_enabled = bcm6368_nand_intc_set; soc 112 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c return brcmnand_probe(pdev, soc); soc 169 drivers/mtd/nand/raw/brcmnand/brcmnand.c struct brcmnand_soc *soc; soc 1305 drivers/mtd/nand/raw/brcmnand/brcmnand.c if (ctrl->soc->ctlrdy_ack(ctrl->soc)) soc 1525 drivers/mtd/nand/raw/brcmnand/brcmnand.c brcmnand_soc_data_bus_prepare(ctrl->soc, true); soc 1538 drivers/mtd/nand/raw/brcmnand/brcmnand.c brcmnand_soc_data_bus_unprepare(ctrl->soc, true); soc 1742 drivers/mtd/nand/raw/brcmnand/brcmnand.c brcmnand_soc_data_bus_prepare(ctrl->soc, false); soc 1747 drivers/mtd/nand/raw/brcmnand/brcmnand.c brcmnand_soc_data_bus_unprepare(ctrl->soc, false); soc 1986 drivers/mtd/nand/raw/brcmnand/brcmnand.c brcmnand_soc_data_bus_prepare(ctrl->soc, false); soc 1991 drivers/mtd/nand/raw/brcmnand/brcmnand.c brcmnand_soc_data_bus_unprepare(ctrl->soc, false); soc 2498 drivers/mtd/nand/raw/brcmnand/brcmnand.c if (ctrl->soc) { soc 2500 drivers/mtd/nand/raw/brcmnand/brcmnand.c ctrl->soc->ctlrdy_ack(ctrl->soc); soc 2501 drivers/mtd/nand/raw/brcmnand/brcmnand.c ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true); soc 2540 drivers/mtd/nand/raw/brcmnand/brcmnand.c int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) soc 2679 drivers/mtd/nand/raw/brcmnand/brcmnand.c if (soc) { soc 2680 drivers/mtd/nand/raw/brcmnand/brcmnand.c ctrl->soc = soc; soc 2686 drivers/mtd/nand/raw/brcmnand/brcmnand.c ctrl->soc->ctlrdy_ack(ctrl->soc); soc 2687 drivers/mtd/nand/raw/brcmnand/brcmnand.c ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true); soc 16 drivers/mtd/nand/raw/brcmnand/brcmnand.h bool (*ctlrdy_ack)(struct brcmnand_soc *soc); soc 17 drivers/mtd/nand/raw/brcmnand/brcmnand.h void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en); soc 18 drivers/mtd/nand/raw/brcmnand/brcmnand.h void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare, soc 22 drivers/mtd/nand/raw/brcmnand/brcmnand.h static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc, soc 25 drivers/mtd/nand/raw/brcmnand/brcmnand.h if (soc && soc->prepare_data_bus) soc 26 drivers/mtd/nand/raw/brcmnand/brcmnand.h soc->prepare_data_bus(soc, true, is_param); soc 29 drivers/mtd/nand/raw/brcmnand/brcmnand.h static inline void brcmnand_soc_data_bus_unprepare(struct brcmnand_soc *soc, soc 32 drivers/mtd/nand/raw/brcmnand/brcmnand.h if (soc && soc->prepare_data_bus) soc 33 drivers/mtd/nand/raw/brcmnand/brcmnand.h soc->prepare_data_bus(soc, false, is_param); soc 61 drivers/mtd/nand/raw/brcmnand/brcmnand.h int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc); soc 18 drivers/mtd/nand/raw/brcmnand/iproc_nand.c struct brcmnand_soc soc; soc 32 drivers/mtd/nand/raw/brcmnand/iproc_nand.c static bool iproc_nand_intc_ack(struct brcmnand_soc *soc) soc 35 drivers/mtd/nand/raw/brcmnand/iproc_nand.c container_of(soc, struct iproc_nand_soc, soc); soc 47 drivers/mtd/nand/raw/brcmnand/iproc_nand.c static void iproc_nand_intc_set(struct brcmnand_soc *soc, bool en) soc 50 drivers/mtd/nand/raw/brcmnand/iproc_nand.c container_of(soc, struct iproc_nand_soc, soc); soc 69 drivers/mtd/nand/raw/brcmnand/iproc_nand.c static void iproc_nand_apb_access(struct brcmnand_soc *soc, bool prepare, soc 73 drivers/mtd/nand/raw/brcmnand/iproc_nand.c container_of(soc, struct iproc_nand_soc, soc); soc 105 drivers/mtd/nand/raw/brcmnand/iproc_nand.c struct brcmnand_soc *soc; soc 111 drivers/mtd/nand/raw/brcmnand/iproc_nand.c soc = &priv->soc; soc 125 drivers/mtd/nand/raw/brcmnand/iproc_nand.c soc->ctlrdy_ack = iproc_nand_intc_ack; soc 126 drivers/mtd/nand/raw/brcmnand/iproc_nand.c soc->ctlrdy_set_enabled = iproc_nand_intc_set; soc 127 drivers/mtd/nand/raw/brcmnand/iproc_nand.c soc->prepare_data_bus = iproc_nand_apb_access; soc 129 drivers/mtd/nand/raw/brcmnand/iproc_nand.c return brcmnand_probe(pdev, soc); soc 3649 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c u8 soc = 0, eoc = 0; soc 3652 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c soc = (i == 0) ? 1 : 0; soc 3669 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c FW_HMA_CMD_SOC_V(soc) | FW_HMA_CMD_EOC_V(eoc)); soc 217 drivers/net/ethernet/mediatek/mtk_eth_path.c if (!MTK_HAS_CAPS(eth->soc->caps, path)) { soc 223 drivers/net/ethernet/mediatek/mtk_eth_path.c if (!MTK_HAS_CAPS(eth->soc->caps, MTK_MUX)) soc 228 drivers/net/ethernet/mediatek/mtk_eth_path.c if (MTK_HAS_CAPS(eth->soc->caps, mtk_eth_muxc[i].cap_bit)) { soc 211 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && soc 218 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (!MTK_HAS_CAPS(mac->hw->soc->caps, soc 229 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_RGMII)) { soc 238 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) { soc 245 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_GEPHY)) { soc 258 drivers/net/ethernet/mediatek/mtk_eth_soc.c MTK_HAS_CAPS(mac->hw->soc->caps, MTK_GMAC1_TRGMII)) { soc 259 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(mac->hw->soc->caps, soc 323 drivers/net/ethernet/mediatek/mtk_eth_soc.c sid = (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII)) ? soc 462 drivers/net/ethernet/mediatek/mtk_eth_soc.c !(MTK_HAS_CAPS(mac->hw->soc->caps, MTK_RGMII) && soc 464 drivers/net/ethernet/mediatek/mtk_eth_soc.c !(MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII) && soc 466 drivers/net/ethernet/mediatek/mtk_eth_soc.c !(MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SGMII) && soc 509 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SGMII)) { soc 514 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_RGMII)) { soc 519 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_GEPHY)) { soc 648 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { soc 849 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { soc 888 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { soc 971 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA) || soc 1023 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { soc 1041 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { soc 1061 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) soc 1254 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { soc 1319 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) soc 1437 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) soc 1473 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) soc 1560 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { soc 1584 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { soc 1689 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) soc 2008 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { soc 2034 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { soc 2047 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { soc 2068 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { soc 2184 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { soc 2282 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) soc 2345 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { soc 2860 drivers/net/ethernet/mediatek/mtk_eth_soc.c eth->netdev[id]->hw_features = eth->soc->hw_features; soc 2864 drivers/net/ethernet/mediatek/mtk_eth_soc.c eth->netdev[id]->vlan_features = eth->soc->hw_features & soc 2866 drivers/net/ethernet/mediatek/mtk_eth_soc.c eth->netdev[id]->features |= eth->soc->hw_features; soc 2889 drivers/net/ethernet/mediatek/mtk_eth_soc.c eth->soc = of_device_get_match_data(&pdev->dev); soc 2896 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { soc 2904 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { soc 2915 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { soc 2924 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_INFRA)) { soc 2933 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) { soc 2940 drivers/net/ethernet/mediatek/mtk_eth_soc.c eth->soc->ana_rgc3); soc 2946 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (eth->soc->required_pctl) { soc 2956 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT) && i > 0) soc 2971 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (eth->soc->required_clks & BIT(i)) { soc 2987 drivers/net/ethernet/mediatek/mtk_eth_soc.c eth->hwlro = MTK_HAS_CAPS(eth->soc->caps, MTK_HWLRO); soc 3004 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT)) { soc 3023 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { soc 890 drivers/net/ethernet/mediatek/mtk_eth_soc.h const struct mtk_soc_data *soc; soc 117 drivers/net/ethernet/mediatek/mtk_sgmii.c sid = (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII)) ? soc 74 drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c #define DELAY_ENABLE(soc, tx, rx) \ soc 75 drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c (((tx) ? soc##_GMAC_TXCLK_DLY_ENABLE : soc##_GMAC_TXCLK_DLY_DISABLE) | \ soc 76 drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c ((rx) ? soc##_GMAC_RXCLK_DLY_ENABLE : soc##_GMAC_RXCLK_DLY_DISABLE)) soc 2769 drivers/net/ethernet/ti/cpsw.c const struct soc_device_attribute *soc; soc 2836 drivers/net/ethernet/ti/cpsw.c soc = soc_device_match(cpsw_soc_devices); soc 2837 drivers/net/ethernet/ti/cpsw.c if (soc) soc 389 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc; soc 524 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = port->pcie->soc; soc 537 drivers/pci/controller/pci-tegra.c ret = soc->afi_pex2_ctrl; soc 571 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = port->pcie->soc; soc 597 drivers/pci/controller/pci-tegra.c if (soc->update_clamp_threshold) { soc 609 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = port->pcie->soc; soc 614 drivers/pci/controller/pci-tegra.c value |= soc->ectl.regs.rp_ectl_2_r1; soc 619 drivers/pci/controller/pci-tegra.c value |= soc->ectl.regs.rp_ectl_4_r1 << soc 625 drivers/pci/controller/pci-tegra.c value |= soc->ectl.regs.rp_ectl_5_r1; soc 630 drivers/pci/controller/pci-tegra.c value |= soc->ectl.regs.rp_ectl_6_r1; soc 635 drivers/pci/controller/pci-tegra.c value |= soc->ectl.regs.rp_ectl_2_r2; soc 640 drivers/pci/controller/pci-tegra.c value |= soc->ectl.regs.rp_ectl_4_r2 << soc 646 drivers/pci/controller/pci-tegra.c value |= soc->ectl.regs.rp_ectl_5_r2; soc 651 drivers/pci/controller/pci-tegra.c value |= soc->ectl.regs.rp_ectl_6_r2; soc 657 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = port->pcie->soc; soc 665 drivers/pci/controller/pci-tegra.c if (soc->program_deskew_time) { soc 673 drivers/pci/controller/pci-tegra.c if (soc->raw_violation_fixup) { soc 685 drivers/pci/controller/pci-tegra.c value |= soc->update_fc_threshold; soc 689 drivers/pci/controller/pci-tegra.c if (soc->update_fc_timer) { soc 692 drivers/pci/controller/pci-tegra.c value |= soc->update_fc_threshold; soc 711 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = port->pcie->soc; soc 718 drivers/pci/controller/pci-tegra.c if (soc->has_pex_clkreq_en) soc 727 drivers/pci/controller/pci-tegra.c if (soc->force_pca_enable) { soc 735 drivers/pci/controller/pci-tegra.c if (soc->ectl.enable) soc 744 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = port->pcie->soc; soc 755 drivers/pci/controller/pci-tegra.c if (soc->has_pex_clkreq_en) soc 952 drivers/pci/controller/pci-tegra.c if (pcie->soc->has_cache_bars) { soc 969 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 975 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, soc->pads_pll_ctl); soc 986 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 1002 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, soc->pads_pll_ctl); soc 1004 drivers/pci/controller/pci-tegra.c value |= PADS_PLL_CTL_REFCLK_INTERNAL_CML | soc->tx_ref_sel; soc 1005 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, soc->pads_pll_ctl); soc 1008 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, soc->pads_pll_ctl); soc 1010 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, soc->pads_pll_ctl); soc 1015 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, soc->pads_pll_ctl); soc 1017 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, soc->pads_pll_ctl); soc 1041 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 1055 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, soc->pads_pll_ctl); soc 1057 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, soc->pads_pll_ctl); soc 1163 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 1176 drivers/pci/controller/pci-tegra.c if (soc->has_pex_bias_ctrl) soc 1192 drivers/pci/controller/pci-tegra.c if (soc->has_gen2) { soc 1212 drivers/pci/controller/pci-tegra.c if (soc->has_intr_prsnt_sense) soc 1228 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 1234 drivers/pci/controller/pci-tegra.c if (soc->has_cml_clk) soc 1249 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 1283 drivers/pci/controller/pci-tegra.c if (soc->has_cml_clk) { soc 1302 drivers/pci/controller/pci-tegra.c if (soc->has_cml_clk) soc 1317 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 1320 drivers/pci/controller/pci-tegra.c pads_writel(pcie, soc->pads_refclk_cfg0, PADS_REFCLK_CFG0); soc 1322 drivers/pci/controller/pci-tegra.c if (soc->num_ports > 2) soc 1323 drivers/pci/controller/pci-tegra.c pads_writel(pcie, soc->pads_refclk_cfg1, PADS_REFCLK_CFG1); soc 1329 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 1343 drivers/pci/controller/pci-tegra.c if (soc->has_cml_clk) { soc 1449 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 1454 drivers/pci/controller/pci-tegra.c if (!soc->has_gen2 || of_find_property(np, "phys", NULL) != NULL) soc 1495 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 1510 drivers/pci/controller/pci-tegra.c if (soc->program_uphy) { soc 1568 drivers/pci/controller/pci-tegra.c if (soc->program_uphy) soc 1575 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 1580 drivers/pci/controller/pci-tegra.c if (soc->program_uphy) soc 1589 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 1595 drivers/pci/controller/pci-tegra.c val |= (0x1 << soc->ports[port->index].pme.turnoff_bit); soc 1598 drivers/pci/controller/pci-tegra.c ack_bit = soc->ports[port->index].pme.ack_bit; soc 1608 drivers/pci/controller/pci-tegra.c val &= ~(0x1 << soc->ports[port->index].pme.turnoff_bit); soc 1816 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 1820 drivers/pci/controller/pci-tegra.c afi_writel(pcie, msi->phys >> soc->msi_base_shift, AFI_MSI_FPCI_BAR_ST); soc 2159 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; soc 2245 drivers/pci/controller/pci-tegra.c if (index < 1 || index > soc->num_ports) { soc 2479 drivers/pci/controller/pci-tegra.c if (pcie->soc->has_gen2) soc 2779 drivers/pci/controller/pci-tegra.c pcie->soc = of_device_get_match_data(dev); soc 2893 drivers/pci/controller/pci-tegra.c if (pcie->soc->program_uphy) { soc 2942 drivers/pci/controller/pci-tegra.c if (pcie->soc->program_uphy) { soc 221 drivers/pci/controller/pcie-mediatek.c const struct mtk_pcie_soc *soc; soc 665 drivers/pci/controller/pcie-mediatek.c const struct mtk_pcie_soc *soc = port->pcie->soc; soc 694 drivers/pci/controller/pcie-mediatek.c if (soc->need_fix_class_id) { soc 702 drivers/pci/controller/pcie-mediatek.c if (soc->need_fix_device_id) soc 703 drivers/pci/controller/pcie-mediatek.c writew(soc->device_id, port->base + PCIE_CONF_DEVICE_ID); soc 869 drivers/pci/controller/pcie-mediatek.c if (!pcie->soc->startup(port)) soc 963 drivers/pci/controller/pcie-mediatek.c if (pcie->soc->setup_irq) { soc 964 drivers/pci/controller/pcie-mediatek.c err = pcie->soc->setup_irq(port, node); soc 1105 drivers/pci/controller/pcie-mediatek.c pcie->soc = of_device_get_match_data(dev); soc 1115 drivers/pci/controller/pcie-mediatek.c host->ops = pcie->soc->ops; soc 161 drivers/pcmcia/sa1111_generic.c s->soc.nr = ops->first + i; soc 162 drivers/pcmcia/sa1111_generic.c s->soc.clk = clk; soc 164 drivers/pcmcia/sa1111_generic.c soc_pcmcia_init_one(&s->soc, ops, &dev->dev); soc 166 drivers/pcmcia/sa1111_generic.c if (s->soc.nr) { soc 167 drivers/pcmcia/sa1111_generic.c s->soc.socket.pci_irq = irqs[IDX_IRQ_S1_READY_NINT]; soc 168 drivers/pcmcia/sa1111_generic.c s->soc.stat[SOC_STAT_CD].irq = irqs[IDX_IRQ_S1_CD_VALID]; soc 169 drivers/pcmcia/sa1111_generic.c s->soc.stat[SOC_STAT_CD].name = "SA1111 CF card detect"; soc 170 drivers/pcmcia/sa1111_generic.c s->soc.stat[SOC_STAT_BVD1].irq = irqs[IDX_IRQ_S1_BVD1_STSCHG]; soc 171 drivers/pcmcia/sa1111_generic.c s->soc.stat[SOC_STAT_BVD1].name = "SA1111 CF BVD1"; soc 173 drivers/pcmcia/sa1111_generic.c s->soc.socket.pci_irq = irqs[IDX_IRQ_S0_READY_NINT]; soc 174 drivers/pcmcia/sa1111_generic.c s->soc.stat[SOC_STAT_CD].irq = irqs[IDX_IRQ_S0_CD_VALID]; soc 175 drivers/pcmcia/sa1111_generic.c s->soc.stat[SOC_STAT_CD].name = "SA1111 PCMCIA card detect"; soc 176 drivers/pcmcia/sa1111_generic.c s->soc.stat[SOC_STAT_BVD1].irq = irqs[IDX_IRQ_S0_BVD1_STSCHG]; soc 177 drivers/pcmcia/sa1111_generic.c s->soc.stat[SOC_STAT_BVD1].name = "SA1111 PCMCIA BVD1"; soc 180 drivers/pcmcia/sa1111_generic.c ret = add(&s->soc); soc 249 drivers/pcmcia/sa1111_generic.c soc_pcmcia_remove_one(&s->soc); soc 6 drivers/pcmcia/sa1111_generic.h struct soc_pcmcia_socket soc; soc 13 drivers/pcmcia/sa1111_generic.h return container_of(s, struct sa1111_pcmcia_socket, soc); soc 438 drivers/phy/tegra/xusb-tegra124.c usb2->base.soc = &pad->soc->lanes[index]; soc 610 drivers/phy/tegra/xusb-tegra124.c const struct tegra_xusb_pad_soc *soc, soc 625 drivers/phy/tegra/xusb-tegra124.c pad->soc = soc; soc 687 drivers/phy/tegra/xusb-tegra124.c ulpi->base.soc = &pad->soc->lanes[index]; soc 747 drivers/phy/tegra/xusb-tegra124.c const struct tegra_xusb_pad_soc *soc, soc 760 drivers/phy/tegra/xusb-tegra124.c pad->soc = soc; soc 823 drivers/phy/tegra/xusb-tegra124.c hsic->base.soc = &pad->soc->lanes[index]; soc 963 drivers/phy/tegra/xusb-tegra124.c const struct tegra_xusb_pad_soc *soc, soc 976 drivers/phy/tegra/xusb-tegra124.c pad->soc = soc; soc 1043 drivers/phy/tegra/xusb-tegra124.c pcie->base.soc = &pad->soc->lanes[index]; soc 1151 drivers/phy/tegra/xusb-tegra124.c const struct tegra_xusb_pad_soc *soc, soc 1164 drivers/phy/tegra/xusb-tegra124.c pad->soc = soc; soc 1221 drivers/phy/tegra/xusb-tegra124.c sata->base.soc = &pad->soc->lanes[index]; soc 1347 drivers/phy/tegra/xusb-tegra124.c const struct tegra_xusb_pad_soc *soc, soc 1360 drivers/phy/tegra/xusb-tegra124.c pad->soc = soc; soc 1686 drivers/phy/tegra/xusb-tegra124.c const struct tegra_xusb_padctl_soc *soc) soc 1696 drivers/phy/tegra/xusb-tegra124.c padctl->base.soc = soc; soc 158 drivers/phy/tegra/xusb-tegra186.c usb2->base.soc = &pad->soc->lanes[index]; soc 447 drivers/phy/tegra/xusb-tegra186.c const struct tegra_xusb_pad_soc *soc, soc 461 drivers/phy/tegra/xusb-tegra186.c pad->soc = soc; soc 553 drivers/phy/tegra/xusb-tegra186.c usb3->base.soc = &pad->soc->lanes[index]; soc 717 drivers/phy/tegra/xusb-tegra186.c const struct tegra_xusb_pad_soc *soc, soc 730 drivers/phy/tegra/xusb-tegra186.c pad->soc = soc; soc 797 drivers/phy/tegra/xusb-tegra186.c count = padctl->base.soc->ports.usb2.count; soc 837 drivers/phy/tegra/xusb-tegra186.c const struct tegra_xusb_padctl_soc *soc) soc 847 drivers/phy/tegra/xusb-tegra186.c priv->base.soc = soc; soc 874 drivers/phy/tegra/xusb-tegra210.c usb2->base.soc = &pad->soc->lanes[index]; soc 1091 drivers/phy/tegra/xusb-tegra210.c const struct tegra_xusb_pad_soc *soc, soc 1104 drivers/phy/tegra/xusb-tegra210.c pad->soc = soc; soc 1173 drivers/phy/tegra/xusb-tegra210.c hsic->base.soc = &pad->soc->lanes[index]; soc 1345 drivers/phy/tegra/xusb-tegra210.c const struct tegra_xusb_pad_soc *soc, soc 1358 drivers/phy/tegra/xusb-tegra210.c pad->soc = soc; soc 1435 drivers/phy/tegra/xusb-tegra210.c pcie->base.soc = &pad->soc->lanes[index]; soc 1522 drivers/phy/tegra/xusb-tegra210.c const struct tegra_xusb_pad_soc *soc, soc 1535 drivers/phy/tegra/xusb-tegra210.c pad->soc = soc; soc 1606 drivers/phy/tegra/xusb-tegra210.c sata->base.soc = &pad->soc->lanes[index]; soc 1693 drivers/phy/tegra/xusb-tegra210.c const struct tegra_xusb_pad_soc *soc, soc 1706 drivers/phy/tegra/xusb-tegra210.c pad->soc = soc; soc 1982 drivers/phy/tegra/xusb-tegra210.c const struct tegra_xusb_padctl_soc *soc) soc 1992 drivers/phy/tegra/xusb-tegra210.c padctl->base.soc = soc; soc 34 drivers/phy/tegra/xusb.c for (i = 0; i < pad->soc->num_lanes; i++) { soc 97 drivers/phy/tegra/xusb.c np = of_get_child_by_name(lanes, pad->soc->lanes[index].name); soc 114 drivers/phy/tegra/xusb.c err = match_string(lane->soc->funcs, lane->soc->num_funcs, function); soc 140 drivers/phy/tegra/xusb.c pad->soc->ops->remove(pad); soc 160 drivers/phy/tegra/xusb.c err = dev_set_name(&pad->dev, "%s", pad->soc->name); soc 187 drivers/phy/tegra/xusb.c pad->lanes = devm_kcalloc(&pad->dev, pad->soc->num_lanes, sizeof(lane), soc 194 drivers/phy/tegra/xusb.c for (i = 0; i < pad->soc->num_lanes; i++) { soc 242 drivers/phy/tegra/xusb.c unsigned int i = pad->soc->num_lanes; soc 254 drivers/phy/tegra/xusb.c const struct tegra_xusb_pad_soc *soc) soc 260 drivers/phy/tegra/xusb.c np = tegra_xusb_find_pad_node(padctl, soc->name); soc 264 drivers/phy/tegra/xusb.c pad = soc->ops->probe(padctl, soc, np); soc 268 drivers/phy/tegra/xusb.c soc->name, err); soc 273 drivers/phy/tegra/xusb.c if (strcmp(soc->name, "pcie") == 0) soc 276 drivers/phy/tegra/xusb.c if (strcmp(soc->name, "sata") == 0) soc 279 drivers/phy/tegra/xusb.c if (strcmp(soc->name, "usb2") == 0) soc 282 drivers/phy/tegra/xusb.c if (strcmp(soc->name, "ulpi") == 0) soc 285 drivers/phy/tegra/xusb.c if (strcmp(soc->name, "hsic") == 0) soc 311 drivers/phy/tegra/xusb.c const struct tegra_xusb_lane_soc *soc = lane->soc; soc 315 drivers/phy/tegra/xusb.c if (soc->num_funcs < 2) soc 319 drivers/phy/tegra/xusb.c value = padctl_readl(padctl, soc->offset); soc 320 drivers/phy/tegra/xusb.c value &= ~(soc->mask << soc->shift); soc 321 drivers/phy/tegra/xusb.c value |= lane->function << soc->shift; soc 322 drivers/phy/tegra/xusb.c padctl_writel(padctl, value, soc->offset); soc 329 drivers/phy/tegra/xusb.c for (i = 0; i < pad->soc->num_lanes; i++) { soc 346 drivers/phy/tegra/xusb.c for (i = 0; i < padctl->soc->num_pads; i++) { soc 347 drivers/phy/tegra/xusb.c const struct tegra_xusb_pad_soc *soc = padctl->soc->pads[i]; soc 350 drivers/phy/tegra/xusb.c pad = tegra_xusb_pad_create(padctl, soc); soc 354 drivers/phy/tegra/xusb.c soc->name, err); soc 376 drivers/phy/tegra/xusb.c const char *func = lane->soc->funcs[lane->function]; soc 393 drivers/phy/tegra/xusb.c if (strcmp(lane->soc->name, name) == 0) { soc 424 drivers/phy/tegra/xusb.c map->type, map->index, match->soc->name); soc 604 drivers/phy/tegra/xusb.c usb2->base.ops = padctl->soc->ports.usb2.ops; soc 656 drivers/phy/tegra/xusb.c ulpi->base.ops = padctl->soc->ports.ulpi.ops; soc 704 drivers/phy/tegra/xusb.c hsic->base.ops = padctl->soc->ports.hsic.ops; soc 772 drivers/phy/tegra/xusb.c usb3->base.ops = padctl->soc->ports.usb3.ops; soc 811 drivers/phy/tegra/xusb.c for (i = 0; i < padctl->soc->ports.usb2.count; i++) { soc 817 drivers/phy/tegra/xusb.c for (i = 0; i < padctl->soc->ports.ulpi.count; i++) { soc 823 drivers/phy/tegra/xusb.c for (i = 0; i < padctl->soc->ports.hsic.count; i++) { soc 829 drivers/phy/tegra/xusb.c for (i = 0; i < padctl->soc->ports.usb3.count; i++) { soc 861 drivers/phy/tegra/xusb.c const struct tegra_xusb_padctl_soc *soc; soc 878 drivers/phy/tegra/xusb.c soc = match->data; soc 880 drivers/phy/tegra/xusb.c padctl = soc->ops->probe(&pdev->dev, soc); soc 903 drivers/phy/tegra/xusb.c padctl->supplies = devm_kcalloc(&pdev->dev, padctl->soc->num_supplies, soc 910 drivers/phy/tegra/xusb.c for (i = 0; i < padctl->soc->num_supplies; i++) soc 911 drivers/phy/tegra/xusb.c padctl->supplies[i].supply = padctl->soc->supply_names[i]; soc 913 drivers/phy/tegra/xusb.c err = devm_regulator_bulk_get(&pdev->dev, padctl->soc->num_supplies, soc 924 drivers/phy/tegra/xusb.c err = regulator_bulk_enable(padctl->soc->num_supplies, soc 948 drivers/phy/tegra/xusb.c regulator_bulk_disable(padctl->soc->num_supplies, padctl->supplies); soc 952 drivers/phy/tegra/xusb.c soc->ops->remove(padctl); soc 964 drivers/phy/tegra/xusb.c err = regulator_bulk_disable(padctl->soc->num_supplies, soc 973 drivers/phy/tegra/xusb.c padctl->soc->ops->remove(padctl); soc 1031 drivers/phy/tegra/xusb.c if (padctl->soc->ops->usb3_save_context) soc 1032 drivers/phy/tegra/xusb.c return padctl->soc->ops->usb3_save_context(padctl, port); soc 1041 drivers/phy/tegra/xusb.c if (padctl->soc->ops->hsic_set_idle) soc 1042 drivers/phy/tegra/xusb.c return padctl->soc->ops->hsic_set_idle(padctl, port, idle); soc 1051 drivers/phy/tegra/xusb.c if (padctl->soc->ops->usb3_set_lfps_detect) soc 1052 drivers/phy/tegra/xusb.c return padctl->soc->ops->usb3_set_lfps_detect(padctl, port, soc 40 drivers/phy/tegra/xusb.h const struct tegra_xusb_lane_soc *soc; soc 138 drivers/phy/tegra/xusb.h const struct tegra_xusb_pad_soc *soc, soc 153 drivers/phy/tegra/xusb.h const struct tegra_xusb_pad_soc *soc; soc 366 drivers/phy/tegra/xusb.h const struct tegra_xusb_padctl_soc *soc); soc 400 drivers/phy/tegra/xusb.h const struct tegra_xusb_padctl_soc *soc; soc 47 drivers/pinctrl/actions/pinctrl-owl.c const struct owl_pinctrl_soc_data *soc; soc 91 drivers/pinctrl/actions/pinctrl-owl.c return pctrl->soc->ngroups; soc 99 drivers/pinctrl/actions/pinctrl-owl.c return pctrl->soc->groups[group].name; soc 109 drivers/pinctrl/actions/pinctrl-owl.c *pins = pctrl->soc->groups[group].pads; soc 110 drivers/pinctrl/actions/pinctrl-owl.c *num_pins = pctrl->soc->groups[group].npads; soc 137 drivers/pinctrl/actions/pinctrl-owl.c return pctrl->soc->nfunctions; soc 145 drivers/pinctrl/actions/pinctrl-owl.c return pctrl->soc->functions[function].name; soc 155 drivers/pinctrl/actions/pinctrl-owl.c *groups = pctrl->soc->functions[function].groups; soc 156 drivers/pinctrl/actions/pinctrl-owl.c *num_groups = pctrl->soc->functions[function].ngroups; soc 197 drivers/pinctrl/actions/pinctrl-owl.c g = &pctrl->soc->groups[group]; soc 259 drivers/pinctrl/actions/pinctrl-owl.c info = &pctrl->soc->padinfo[pin]; soc 267 drivers/pinctrl/actions/pinctrl-owl.c if (!pctrl->soc->padctl_val2arg) soc 270 drivers/pinctrl/actions/pinctrl-owl.c ret = pctrl->soc->padctl_val2arg(info, param, &arg); soc 291 drivers/pinctrl/actions/pinctrl-owl.c info = &pctrl->soc->padinfo[pin]; soc 301 drivers/pinctrl/actions/pinctrl-owl.c if (!pctrl->soc->padctl_arg2val) soc 304 drivers/pinctrl/actions/pinctrl-owl.c ret = pctrl->soc->padctl_arg2val(info, param, &arg); soc 428 drivers/pinctrl/actions/pinctrl-owl.c g = &pctrl->soc->groups[group]; soc 458 drivers/pinctrl/actions/pinctrl-owl.c g = &pctrl->soc->groups[group]; soc 503 drivers/pinctrl/actions/pinctrl-owl.c for (i = 0; i < pctrl->soc->nports; i++) { soc 504 drivers/pinctrl/actions/pinctrl-owl.c const struct owl_gpio_port *port = &pctrl->soc->ports[i]; soc 838 drivers/pinctrl/actions/pinctrl-owl.c for (i = 0; i < pctrl->soc->nports; i++) { soc 839 drivers/pinctrl/actions/pinctrl-owl.c port = &pctrl->soc->ports[i]; soc 871 drivers/pinctrl/actions/pinctrl-owl.c chip->ngpio = pctrl->soc->ngpios; soc 897 drivers/pinctrl/actions/pinctrl-owl.c for (i = 0, offset = 0; i < pctrl->soc->nports; i++) { soc 898 drivers/pinctrl/actions/pinctrl-owl.c const struct owl_gpio_port *port = &pctrl->soc->ports[i]; soc 957 drivers/pinctrl/actions/pinctrl-owl.c pctrl->soc = soc_data; soc 25 drivers/pinctrl/freescale/pinctrl-mxs.c struct mxs_pinctrl_soc_data *soc; soc 32 drivers/pinctrl/freescale/pinctrl-mxs.c return d->soc->ngroups; soc 40 drivers/pinctrl/freescale/pinctrl-mxs.c return d->soc->groups[group].name; soc 48 drivers/pinctrl/freescale/pinctrl-mxs.c *pins = d->soc->groups[group].pins; soc 49 drivers/pinctrl/freescale/pinctrl-mxs.c *num_pins = d->soc->groups[group].npins; soc 166 drivers/pinctrl/freescale/pinctrl-mxs.c return d->soc->nfunctions; soc 174 drivers/pinctrl/freescale/pinctrl-mxs.c return d->soc->functions[function].name; soc 184 drivers/pinctrl/freescale/pinctrl-mxs.c *groups = d->soc->functions[group].groups; soc 185 drivers/pinctrl/freescale/pinctrl-mxs.c *num_groups = d->soc->functions[group].ngroups; soc 204 drivers/pinctrl/freescale/pinctrl-mxs.c struct mxs_group *g = &d->soc->groups[group]; soc 213 drivers/pinctrl/freescale/pinctrl-mxs.c reg = d->base + d->soc->regs->muxsel; soc 248 drivers/pinctrl/freescale/pinctrl-mxs.c *config = d->soc->groups[group].config; soc 258 drivers/pinctrl/freescale/pinctrl-mxs.c struct mxs_group *g = &d->soc->groups[group]; soc 278 drivers/pinctrl/freescale/pinctrl-mxs.c reg = d->base + d->soc->regs->drive; soc 298 drivers/pinctrl/freescale/pinctrl-mxs.c reg = d->base + d->soc->regs->pull; soc 352 drivers/pinctrl/freescale/pinctrl-mxs.c struct mxs_group *g = &d->soc->groups[idx]; soc 398 drivers/pinctrl/freescale/pinctrl-mxs.c struct mxs_pinctrl_soc_data *soc = d->soc; soc 419 drivers/pinctrl/freescale/pinctrl-mxs.c soc->ngroups++; soc 425 drivers/pinctrl/freescale/pinctrl-mxs.c soc->nfunctions++; soc 429 drivers/pinctrl/freescale/pinctrl-mxs.c soc->functions = devm_kcalloc(&pdev->dev, soc 430 drivers/pinctrl/freescale/pinctrl-mxs.c soc->nfunctions, soc 431 drivers/pinctrl/freescale/pinctrl-mxs.c sizeof(*soc->functions), soc 433 drivers/pinctrl/freescale/pinctrl-mxs.c if (!soc->functions) soc 436 drivers/pinctrl/freescale/pinctrl-mxs.c soc->groups = devm_kcalloc(&pdev->dev, soc 437 drivers/pinctrl/freescale/pinctrl-mxs.c soc->ngroups, sizeof(*soc->groups), soc 439 drivers/pinctrl/freescale/pinctrl-mxs.c if (!soc->groups) soc 444 drivers/pinctrl/freescale/pinctrl-mxs.c f = &soc->functions[idxf]; soc 476 drivers/pinctrl/freescale/pinctrl-mxs.c f = &soc->functions[idxf++]; soc 499 drivers/pinctrl/freescale/pinctrl-mxs.c f = &soc->functions[idxf++]; soc 523 drivers/pinctrl/freescale/pinctrl-mxs.c struct mxs_pinctrl_soc_data *soc) soc 534 drivers/pinctrl/freescale/pinctrl-mxs.c d->soc = soc; soc 540 drivers/pinctrl/freescale/pinctrl-mxs.c mxs_pinctrl_desc.pins = d->soc->pins; soc 541 drivers/pinctrl/freescale/pinctrl-mxs.c mxs_pinctrl_desc.npins = d->soc->npins; soc 82 drivers/pinctrl/freescale/pinctrl-mxs.h struct mxs_pinctrl_soc_data *soc); soc 114 drivers/pinctrl/intel/pinctrl-intel.c const struct intel_pinctrl_soc_data *soc; soc 297 drivers/pinctrl/intel/pinctrl-intel.c return pctrl->soc->ngroups; soc 305 drivers/pinctrl/intel/pinctrl-intel.c return pctrl->soc->groups[group].name; soc 313 drivers/pinctrl/intel/pinctrl-intel.c *pins = pctrl->soc->groups[group].pins; soc 314 drivers/pinctrl/intel/pinctrl-intel.c *npins = pctrl->soc->groups[group].npins; soc 380 drivers/pinctrl/intel/pinctrl-intel.c return pctrl->soc->nfunctions; soc 388 drivers/pinctrl/intel/pinctrl-intel.c return pctrl->soc->functions[function].name; soc 398 drivers/pinctrl/intel/pinctrl-intel.c *groups = pctrl->soc->functions[function].groups; soc 399 drivers/pinctrl/intel/pinctrl-intel.c *ngroups = pctrl->soc->functions[function].ngroups; soc 407 drivers/pinctrl/intel/pinctrl-intel.c const struct intel_pingroup *grp = &pctrl->soc->groups[group]; soc 1324 drivers/pinctrl/intel/pinctrl-intel.c const struct intel_pinctrl_soc_data *soc = pctrl->soc; soc 1329 drivers/pinctrl/intel/pinctrl-intel.c pads = devm_kcalloc(pctrl->dev, soc->npins, sizeof(*pads), GFP_KERNEL); soc 1379 drivers/pinctrl/intel/pinctrl-intel.c pctrl->soc = soc_data; soc 1386 drivers/pinctrl/intel/pinctrl-intel.c pctrl->ncommunities = pctrl->soc->ncommunities; soc 1397 drivers/pinctrl/intel/pinctrl-intel.c *community = pctrl->soc->communities[i]; soc 1438 drivers/pinctrl/intel/pinctrl-intel.c pctrl->pctldesc.pins = pctrl->soc->pins; soc 1439 drivers/pinctrl/intel/pinctrl-intel.c pctrl->pctldesc.npins = pctrl->soc->npins; soc 1528 drivers/pinctrl/intel/pinctrl-intel.c for (i = 0; i < pctrl->soc->npins; i++) { soc 1529 drivers/pinctrl/intel/pinctrl-intel.c const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i]; soc 1621 drivers/pinctrl/intel/pinctrl-intel.c for (i = 0; i < pctrl->soc->npins; i++) { soc 1622 drivers/pinctrl/intel/pinctrl-intel.c const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i]; soc 62 drivers/pinctrl/mediatek/pinctrl-moore.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; soc 78 drivers/pinctrl/mediatek/pinctrl-moore.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; soc 81 drivers/pinctrl/mediatek/pinctrl-moore.c hw->soc->gpio_m); soc 91 drivers/pinctrl/mediatek/pinctrl-moore.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; soc 105 drivers/pinctrl/mediatek/pinctrl-moore.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; soc 109 drivers/pinctrl/mediatek/pinctrl-moore.c if (hw->soc->bias_disable_get) { soc 110 drivers/pinctrl/mediatek/pinctrl-moore.c err = hw->soc->bias_disable_get(hw, desc, &ret); soc 118 drivers/pinctrl/mediatek/pinctrl-moore.c if (hw->soc->bias_get) { soc 119 drivers/pinctrl/mediatek/pinctrl-moore.c err = hw->soc->bias_get(hw, desc, 1, &ret); soc 127 drivers/pinctrl/mediatek/pinctrl-moore.c if (hw->soc->bias_get) { soc 128 drivers/pinctrl/mediatek/pinctrl-moore.c err = hw->soc->bias_get(hw, desc, 0, &ret); soc 170 drivers/pinctrl/mediatek/pinctrl-moore.c if (hw->soc->drive_get) { soc 171 drivers/pinctrl/mediatek/pinctrl-moore.c err = hw->soc->drive_get(hw, desc, &ret); soc 192 drivers/pinctrl/mediatek/pinctrl-moore.c if (hw->soc->adv_pull_get) { soc 196 drivers/pinctrl/mediatek/pinctrl-moore.c err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); soc 220 drivers/pinctrl/mediatek/pinctrl-moore.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; soc 228 drivers/pinctrl/mediatek/pinctrl-moore.c if (hw->soc->bias_disable_set) { soc 229 drivers/pinctrl/mediatek/pinctrl-moore.c err = hw->soc->bias_disable_set(hw, desc); soc 237 drivers/pinctrl/mediatek/pinctrl-moore.c if (hw->soc->bias_set) { soc 238 drivers/pinctrl/mediatek/pinctrl-moore.c err = hw->soc->bias_set(hw, desc, 1); soc 246 drivers/pinctrl/mediatek/pinctrl-moore.c if (hw->soc->bias_set) { soc 247 drivers/pinctrl/mediatek/pinctrl-moore.c err = hw->soc->bias_set(hw, desc, 0); soc 267 drivers/pinctrl/mediatek/pinctrl-moore.c if (hw->soc->ies_present) { soc 311 drivers/pinctrl/mediatek/pinctrl-moore.c if (hw->soc->drive_set) { soc 312 drivers/pinctrl/mediatek/pinctrl-moore.c err = hw->soc->drive_set(hw, desc, arg); soc 330 drivers/pinctrl/mediatek/pinctrl-moore.c if (hw->soc->adv_pull_set) { soc 334 drivers/pinctrl/mediatek/pinctrl-moore.c err = hw->soc->adv_pull_set(hw, desc, pullup, soc 437 drivers/pinctrl/mediatek/pinctrl-moore.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; soc 451 drivers/pinctrl/mediatek/pinctrl-moore.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; soc 477 drivers/pinctrl/mediatek/pinctrl-moore.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; soc 492 drivers/pinctrl/mediatek/pinctrl-moore.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; soc 520 drivers/pinctrl/mediatek/pinctrl-moore.c chip->ngpio = hw->soc->npins; soc 551 drivers/pinctrl/mediatek/pinctrl-moore.c for (i = 0; i < hw->soc->ngrps; i++) { soc 552 drivers/pinctrl/mediatek/pinctrl-moore.c const struct group_desc *group = hw->soc->grps + i; soc 571 drivers/pinctrl/mediatek/pinctrl-moore.c for (i = 0; i < hw->soc->nfuncs ; i++) { soc 572 drivers/pinctrl/mediatek/pinctrl-moore.c const struct function_desc *func = hw->soc->funcs + i; soc 589 drivers/pinctrl/mediatek/pinctrl-moore.c const struct mtk_pin_soc *soc) soc 600 drivers/pinctrl/mediatek/pinctrl-moore.c hw->soc = soc; soc 603 drivers/pinctrl/mediatek/pinctrl-moore.c if (!hw->soc->nbase_names) { soc 609 drivers/pinctrl/mediatek/pinctrl-moore.c hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, soc 614 drivers/pinctrl/mediatek/pinctrl-moore.c for (i = 0; i < hw->soc->nbase_names; i++) { soc 616 drivers/pinctrl/mediatek/pinctrl-moore.c hw->soc->base_names[i]); soc 627 drivers/pinctrl/mediatek/pinctrl-moore.c hw->nbase = hw->soc->nbase_names; soc 630 drivers/pinctrl/mediatek/pinctrl-moore.c pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins), soc 635 drivers/pinctrl/mediatek/pinctrl-moore.c for (i = 0; i < hw->soc->npins; i++) { soc 636 drivers/pinctrl/mediatek/pinctrl-moore.c pins[i].number = hw->soc->pins[i].number; soc 637 drivers/pinctrl/mediatek/pinctrl-moore.c pins[i].name = hw->soc->pins[i].name; soc 642 drivers/pinctrl/mediatek/pinctrl-moore.c mtk_desc.npins = hw->soc->npins; soc 49 drivers/pinctrl/mediatek/pinctrl-moore.h const struct mtk_pin_soc *soc); soc 73 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) { soc 74 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c rc = &hw->soc->reg_cal[field]; soc 218 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c desc = (const struct mtk_pin_desc *)hw->soc->pins; soc 220 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c while (i < hw->soc->npins) { soc 236 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c desc = (const struct mtk_pin_desc *)hw->soc->pins; soc 260 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; soc 281 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; soc 340 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c if (!hw->soc->eint_hw) soc 344 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c hw->eint->hw = hw->soc->eint_hw; soc 624 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c if (hw->soc->bias_set) { soc 625 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c err = hw->soc->bias_set(hw, desc, pullup); soc 649 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c if (hw->soc->bias_get) { soc 650 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c err = hw->soc->bias_get(hw, desc, pullup, val); soc 245 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h const struct mtk_pin_soc *soc; soc 57 drivers/pinctrl/mediatek/pinctrl-paris.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; soc 60 drivers/pinctrl/mediatek/pinctrl-paris.c hw->soc->gpio_m); soc 70 drivers/pinctrl/mediatek/pinctrl-paris.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; soc 84 drivers/pinctrl/mediatek/pinctrl-paris.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; soc 88 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->bias_disable_get) { soc 89 drivers/pinctrl/mediatek/pinctrl-paris.c err = hw->soc->bias_disable_get(hw, desc, &ret); soc 97 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->bias_get) { soc 98 drivers/pinctrl/mediatek/pinctrl-paris.c err = hw->soc->bias_get(hw, desc, 1, &ret); soc 106 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->bias_get) { soc 107 drivers/pinctrl/mediatek/pinctrl-paris.c err = hw->soc->bias_get(hw, desc, 0, &ret); soc 149 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->drive_get) { soc 150 drivers/pinctrl/mediatek/pinctrl-paris.c err = hw->soc->drive_get(hw, desc, &ret); soc 171 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->adv_pull_get) { soc 175 drivers/pinctrl/mediatek/pinctrl-paris.c err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); soc 183 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->adv_drive_get) { soc 184 drivers/pinctrl/mediatek/pinctrl-paris.c err = hw->soc->adv_drive_get(hw, desc, &ret); soc 209 drivers/pinctrl/mediatek/pinctrl-paris.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; soc 213 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->bias_disable_set) { soc 214 drivers/pinctrl/mediatek/pinctrl-paris.c err = hw->soc->bias_disable_set(hw, desc); soc 222 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->bias_set) { soc 223 drivers/pinctrl/mediatek/pinctrl-paris.c err = hw->soc->bias_set(hw, desc, 1); soc 231 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->bias_set) { soc 232 drivers/pinctrl/mediatek/pinctrl-paris.c err = hw->soc->bias_set(hw, desc, 0); soc 251 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->ies_present) { soc 295 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->drive_set) { soc 296 drivers/pinctrl/mediatek/pinctrl-paris.c err = hw->soc->drive_set(hw, desc, arg); soc 314 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->adv_pull_set) { soc 318 drivers/pinctrl/mediatek/pinctrl-paris.c err = hw->soc->adv_pull_set(hw, desc, pullup, soc 327 drivers/pinctrl/mediatek/pinctrl-paris.c if (hw->soc->adv_drive_set) { soc 328 drivers/pinctrl/mediatek/pinctrl-paris.c err = hw->soc->adv_drive_set(hw, desc, arg); soc 348 drivers/pinctrl/mediatek/pinctrl-paris.c for (i = 0; i < hw->soc->ngrps; i++) { soc 361 drivers/pinctrl/mediatek/pinctrl-paris.c const struct mtk_pin_desc *pin = hw->soc->pins + pin_num; soc 378 drivers/pinctrl/mediatek/pinctrl-paris.c for (i = 0; i < hw->soc->npins; i++) { soc 379 drivers/pinctrl/mediatek/pinctrl-paris.c const struct mtk_pin_desc *pin = hw->soc->pins + i; soc 484 drivers/pinctrl/mediatek/pinctrl-paris.c if (pin >= hw->soc->npins || soc 555 drivers/pinctrl/mediatek/pinctrl-paris.c return hw->soc->ngrps; soc 605 drivers/pinctrl/mediatek/pinctrl-paris.c *num_groups = hw->soc->ngrps; soc 631 drivers/pinctrl/mediatek/pinctrl-paris.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[grp->pin]; soc 696 drivers/pinctrl/mediatek/pinctrl-paris.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; soc 711 drivers/pinctrl/mediatek/pinctrl-paris.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; soc 725 drivers/pinctrl/mediatek/pinctrl-paris.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; soc 751 drivers/pinctrl/mediatek/pinctrl-paris.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; soc 766 drivers/pinctrl/mediatek/pinctrl-paris.c desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; soc 795 drivers/pinctrl/mediatek/pinctrl-paris.c chip->ngpio = hw->soc->npins; soc 812 drivers/pinctrl/mediatek/pinctrl-paris.c hw->groups = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps, soc 818 drivers/pinctrl/mediatek/pinctrl-paris.c hw->grp_names = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps, soc 823 drivers/pinctrl/mediatek/pinctrl-paris.c for (i = 0; i < hw->soc->npins; i++) { soc 824 drivers/pinctrl/mediatek/pinctrl-paris.c const struct mtk_pin_desc *pin = hw->soc->pins + i; soc 837 drivers/pinctrl/mediatek/pinctrl-paris.c const struct mtk_pin_soc *soc) soc 849 drivers/pinctrl/mediatek/pinctrl-paris.c hw->soc = soc; soc 852 drivers/pinctrl/mediatek/pinctrl-paris.c if (!hw->soc->nbase_names) { soc 858 drivers/pinctrl/mediatek/pinctrl-paris.c hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, soc 863 drivers/pinctrl/mediatek/pinctrl-paris.c for (i = 0; i < hw->soc->nbase_names; i++) { soc 865 drivers/pinctrl/mediatek/pinctrl-paris.c hw->soc->base_names[i]); soc 876 drivers/pinctrl/mediatek/pinctrl-paris.c hw->nbase = hw->soc->nbase_names; soc 885 drivers/pinctrl/mediatek/pinctrl-paris.c pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins), soc 890 drivers/pinctrl/mediatek/pinctrl-paris.c for (i = 0; i < hw->soc->npins; i++) { soc 891 drivers/pinctrl/mediatek/pinctrl-paris.c pins[i].number = hw->soc->pins[i].number; soc 892 drivers/pinctrl/mediatek/pinctrl-paris.c pins[i].name = hw->soc->pins[i].name; soc 897 drivers/pinctrl/mediatek/pinctrl-paris.c mtk_desc.npins = hw->soc->npins; soc 61 drivers/pinctrl/mediatek/pinctrl-paris.h const struct mtk_pin_soc *soc); soc 382 drivers/pinctrl/mvebu/pinctrl-armada-370.c struct mvebu_pinctrl_soc_info *soc = &armada_370_pinctrl_info; soc 384 drivers/pinctrl/mvebu/pinctrl-armada-370.c soc->variant = 0; /* no variants for Armada 370 */ soc 385 drivers/pinctrl/mvebu/pinctrl-armada-370.c soc->controls = mv88f6710_mpp_controls; soc 386 drivers/pinctrl/mvebu/pinctrl-armada-370.c soc->ncontrols = ARRAY_SIZE(mv88f6710_mpp_controls); soc 387 drivers/pinctrl/mvebu/pinctrl-armada-370.c soc->modes = mv88f6710_mpp_modes; soc 388 drivers/pinctrl/mvebu/pinctrl-armada-370.c soc->nmodes = ARRAY_SIZE(mv88f6710_mpp_modes); soc 389 drivers/pinctrl/mvebu/pinctrl-armada-370.c soc->gpioranges = mv88f6710_mpp_gpio_ranges; soc 390 drivers/pinctrl/mvebu/pinctrl-armada-370.c soc->ngpioranges = ARRAY_SIZE(mv88f6710_mpp_gpio_ranges); soc 392 drivers/pinctrl/mvebu/pinctrl-armada-370.c pdev->dev.platform_data = soc; soc 400 drivers/pinctrl/mvebu/pinctrl-armada-375.c struct mvebu_pinctrl_soc_info *soc = &armada_375_pinctrl_info; soc 402 drivers/pinctrl/mvebu/pinctrl-armada-375.c soc->variant = 0; /* no variants for Armada 375 */ soc 403 drivers/pinctrl/mvebu/pinctrl-armada-375.c soc->controls = mv88f6720_mpp_controls; soc 404 drivers/pinctrl/mvebu/pinctrl-armada-375.c soc->ncontrols = ARRAY_SIZE(mv88f6720_mpp_controls); soc 405 drivers/pinctrl/mvebu/pinctrl-armada-375.c soc->modes = mv88f6720_mpp_modes; soc 406 drivers/pinctrl/mvebu/pinctrl-armada-375.c soc->nmodes = ARRAY_SIZE(mv88f6720_mpp_modes); soc 407 drivers/pinctrl/mvebu/pinctrl-armada-375.c soc->gpioranges = mv88f6720_mpp_gpio_ranges; soc 408 drivers/pinctrl/mvebu/pinctrl-armada-375.c soc->ngpioranges = ARRAY_SIZE(mv88f6720_mpp_gpio_ranges); soc 410 drivers/pinctrl/mvebu/pinctrl-armada-375.c pdev->dev.platform_data = soc; soc 406 drivers/pinctrl/mvebu/pinctrl-armada-38x.c struct mvebu_pinctrl_soc_info *soc = &armada_38x_pinctrl_info; soc 413 drivers/pinctrl/mvebu/pinctrl-armada-38x.c soc->variant = (unsigned) match->data & 0xff; soc 414 drivers/pinctrl/mvebu/pinctrl-armada-38x.c soc->controls = armada_38x_mpp_controls; soc 415 drivers/pinctrl/mvebu/pinctrl-armada-38x.c soc->ncontrols = ARRAY_SIZE(armada_38x_mpp_controls); soc 416 drivers/pinctrl/mvebu/pinctrl-armada-38x.c soc->gpioranges = armada_38x_mpp_gpio_ranges; soc 417 drivers/pinctrl/mvebu/pinctrl-armada-38x.c soc->ngpioranges = ARRAY_SIZE(armada_38x_mpp_gpio_ranges); soc 418 drivers/pinctrl/mvebu/pinctrl-armada-38x.c soc->modes = armada_38x_mpp_modes; soc 419 drivers/pinctrl/mvebu/pinctrl-armada-38x.c soc->nmodes = armada_38x_mpp_controls[0].npins; soc 421 drivers/pinctrl/mvebu/pinctrl-armada-38x.c pdev->dev.platform_data = soc; soc 388 drivers/pinctrl/mvebu/pinctrl-armada-39x.c struct mvebu_pinctrl_soc_info *soc = &armada_39x_pinctrl_info; soc 395 drivers/pinctrl/mvebu/pinctrl-armada-39x.c soc->variant = (unsigned) match->data & 0xff; soc 396 drivers/pinctrl/mvebu/pinctrl-armada-39x.c soc->controls = armada_39x_mpp_controls; soc 397 drivers/pinctrl/mvebu/pinctrl-armada-39x.c soc->ncontrols = ARRAY_SIZE(armada_39x_mpp_controls); soc 398 drivers/pinctrl/mvebu/pinctrl-armada-39x.c soc->gpioranges = armada_39x_mpp_gpio_ranges; soc 399 drivers/pinctrl/mvebu/pinctrl-armada-39x.c soc->ngpioranges = ARRAY_SIZE(armada_39x_mpp_gpio_ranges); soc 400 drivers/pinctrl/mvebu/pinctrl-armada-39x.c soc->modes = armada_39x_mpp_modes; soc 401 drivers/pinctrl/mvebu/pinctrl-armada-39x.c soc->nmodes = armada_39x_mpp_controls[0].npins; soc 403 drivers/pinctrl/mvebu/pinctrl-armada-39x.c pdev->dev.platform_data = soc; soc 108 drivers/pinctrl/mvebu/pinctrl-armada-ap806.c struct mvebu_pinctrl_soc_info *soc = &armada_ap806_pinctrl_info; soc 115 drivers/pinctrl/mvebu/pinctrl-armada-ap806.c soc->variant = 0; /* no variants for Armada AP806 */ soc 116 drivers/pinctrl/mvebu/pinctrl-armada-ap806.c soc->controls = armada_ap806_mpp_controls; soc 117 drivers/pinctrl/mvebu/pinctrl-armada-ap806.c soc->ncontrols = ARRAY_SIZE(armada_ap806_mpp_controls); soc 118 drivers/pinctrl/mvebu/pinctrl-armada-ap806.c soc->gpioranges = armada_ap806_mpp_gpio_ranges; soc 119 drivers/pinctrl/mvebu/pinctrl-armada-ap806.c soc->ngpioranges = ARRAY_SIZE(armada_ap806_mpp_gpio_ranges); soc 120 drivers/pinctrl/mvebu/pinctrl-armada-ap806.c soc->modes = armada_ap806_mpp_modes; soc 121 drivers/pinctrl/mvebu/pinctrl-armada-ap806.c soc->nmodes = armada_ap806_mpp_controls[0].npins; soc 123 drivers/pinctrl/mvebu/pinctrl-armada-ap806.c pdev->dev.platform_data = soc; soc 640 drivers/pinctrl/mvebu/pinctrl-armada-cp110.c struct mvebu_pinctrl_soc_info *soc; soc 648 drivers/pinctrl/mvebu/pinctrl-armada-cp110.c soc = devm_kzalloc(&pdev->dev, soc 650 drivers/pinctrl/mvebu/pinctrl-armada-cp110.c if (!soc) soc 653 drivers/pinctrl/mvebu/pinctrl-armada-cp110.c soc->variant = (unsigned long) match->data & 0xff; soc 654 drivers/pinctrl/mvebu/pinctrl-armada-cp110.c soc->controls = armada_cp110_mpp_controls; soc 655 drivers/pinctrl/mvebu/pinctrl-armada-cp110.c soc->ncontrols = ARRAY_SIZE(armada_cp110_mpp_controls); soc 656 drivers/pinctrl/mvebu/pinctrl-armada-cp110.c soc->modes = armada_cp110_mpp_modes; soc 657 drivers/pinctrl/mvebu/pinctrl-armada-cp110.c soc->nmodes = ARRAY_SIZE(armada_cp110_mpp_modes); soc 680 drivers/pinctrl/mvebu/pinctrl-armada-cp110.c pdev->dev.platform_data = soc; soc 542 drivers/pinctrl/mvebu/pinctrl-armada-xp.c struct mvebu_pinctrl_soc_info *soc = soc 546 drivers/pinctrl/mvebu/pinctrl-armada-xp.c nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); soc 549 drivers/pinctrl/mvebu/pinctrl-armada-xp.c mpp_saved_regs[i] = readl(soc->control_data[0].base + i * 4); soc 556 drivers/pinctrl/mvebu/pinctrl-armada-xp.c struct mvebu_pinctrl_soc_info *soc = soc 560 drivers/pinctrl/mvebu/pinctrl-armada-xp.c nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); soc 563 drivers/pinctrl/mvebu/pinctrl-armada-xp.c writel(mpp_saved_regs[i], soc->control_data[0].base + i * 4); soc 570 drivers/pinctrl/mvebu/pinctrl-armada-xp.c struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info; soc 578 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->variant = (unsigned) match->data & 0xff; soc 580 drivers/pinctrl/mvebu/pinctrl-armada-xp.c switch (soc->variant) { soc 582 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->controls = mv78230_mpp_controls; soc 583 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->ncontrols = ARRAY_SIZE(mv78230_mpp_controls); soc 584 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->modes = armada_xp_mpp_modes; soc 588 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->nmodes = mv78230_mpp_controls[0].npins; soc 589 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->gpioranges = mv78230_mpp_gpio_ranges; soc 590 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->ngpioranges = ARRAY_SIZE(mv78230_mpp_gpio_ranges); soc 593 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->controls = mv78260_mpp_controls; soc 594 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->ncontrols = ARRAY_SIZE(mv78260_mpp_controls); soc 595 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->modes = armada_xp_mpp_modes; soc 599 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->nmodes = mv78260_mpp_controls[0].npins; soc 600 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->gpioranges = mv78260_mpp_gpio_ranges; soc 601 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->ngpioranges = ARRAY_SIZE(mv78260_mpp_gpio_ranges); soc 604 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->controls = mv78460_mpp_controls; soc 605 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->ncontrols = ARRAY_SIZE(mv78460_mpp_controls); soc 606 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->modes = armada_xp_mpp_modes; soc 610 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->nmodes = mv78460_mpp_controls[0].npins; soc 611 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->gpioranges = mv78460_mpp_gpio_ranges; soc 612 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->ngpioranges = ARRAY_SIZE(mv78460_mpp_gpio_ranges); soc 618 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->controls = mv98dx3236_mpp_controls; soc 619 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->ncontrols = ARRAY_SIZE(mv98dx3236_mpp_controls); soc 620 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->modes = mv98dx3236_mpp_modes; soc 621 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->nmodes = mv98dx3236_mpp_controls[0].npins; soc 622 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->gpioranges = mv98dx3236_mpp_gpio_ranges; soc 623 drivers/pinctrl/mvebu/pinctrl-armada-xp.c soc->ngpioranges = ARRAY_SIZE(mv98dx3236_mpp_gpio_ranges); soc 627 drivers/pinctrl/mvebu/pinctrl-armada-xp.c nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); soc 634 drivers/pinctrl/mvebu/pinctrl-armada-xp.c pdev->dev.platform_data = soc; soc 570 drivers/pinctrl/mvebu/pinctrl-mvebu.c struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); soc 579 drivers/pinctrl/mvebu/pinctrl-mvebu.c if (!soc || !soc->controls || !soc->modes) { soc 594 drivers/pinctrl/mvebu/pinctrl-mvebu.c pctl->variant = soc->variant; soc 602 drivers/pinctrl/mvebu/pinctrl-mvebu.c for (n = 0; n < soc->ncontrols; n++) { soc 603 drivers/pinctrl/mvebu/pinctrl-mvebu.c const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; soc 647 drivers/pinctrl/mvebu/pinctrl-mvebu.c for (n = 0; n < soc->ncontrols; n++) { soc 648 drivers/pinctrl/mvebu/pinctrl-mvebu.c const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; soc 649 drivers/pinctrl/mvebu/pinctrl-mvebu.c struct mvebu_mpp_ctrl_data *data = soc->control_data ? soc 650 drivers/pinctrl/mvebu/pinctrl-mvebu.c &soc->control_data[n] : NULL; soc 686 drivers/pinctrl/mvebu/pinctrl-mvebu.c for (n = 0; n < soc->nmodes; n++) { soc 687 drivers/pinctrl/mvebu/pinctrl-mvebu.c struct mvebu_mpp_mode *mode = &soc->modes[n]; soc 745 drivers/pinctrl/mvebu/pinctrl-mvebu.c for (n = 0; n < soc->ngpioranges; n++) soc 746 drivers/pinctrl/mvebu/pinctrl-mvebu.c pinctrl_add_gpio_range(pctl->pctldev, &soc->gpioranges[n]); soc 760 drivers/pinctrl/mvebu/pinctrl-mvebu.c struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); soc 771 drivers/pinctrl/mvebu/pinctrl-mvebu.c mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data), soc 776 drivers/pinctrl/mvebu/pinctrl-mvebu.c for (i = 0; i < soc->ncontrols; i++) soc 779 drivers/pinctrl/mvebu/pinctrl-mvebu.c soc->control_data = mpp_data; soc 814 drivers/pinctrl/mvebu/pinctrl-mvebu.c struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); soc 823 drivers/pinctrl/mvebu/pinctrl-mvebu.c mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data), soc 828 drivers/pinctrl/mvebu/pinctrl-mvebu.c for (i = 0; i < soc->ncontrols; i++) { soc 833 drivers/pinctrl/mvebu/pinctrl-mvebu.c soc->control_data = mpp_data; soc 479 drivers/pinctrl/nomadik/pinctrl-ab8500.c void abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc) soc 481 drivers/pinctrl/nomadik/pinctrl-ab8500.c *soc = &ab8500_soc; soc 375 drivers/pinctrl/nomadik/pinctrl-ab8505.c abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc) soc 377 drivers/pinctrl/nomadik/pinctrl-ab8505.c *soc = &ab8505_soc; soc 82 drivers/pinctrl/nomadik/pinctrl-abx500.c struct abx500_pinctrl_soc_data *soc; soc 243 drivers/pinctrl/nomadik/pinctrl-abx500.c struct alternate_functions af = pct->soc->alternate_functions[gpio]; soc 368 drivers/pinctrl/nomadik/pinctrl-abx500.c struct alternate_functions af = pct->soc->alternate_functions[gpio]; soc 543 drivers/pinctrl/nomadik/pinctrl-abx500.c return pct->soc->nfunctions; soc 551 drivers/pinctrl/nomadik/pinctrl-abx500.c return pct->soc->functions[function].name; soc 561 drivers/pinctrl/nomadik/pinctrl-abx500.c *groups = pct->soc->functions[function].groups; soc 562 drivers/pinctrl/nomadik/pinctrl-abx500.c *num_groups = pct->soc->functions[function].ngroups; soc 576 drivers/pinctrl/nomadik/pinctrl-abx500.c g = &pct->soc->groups[group]; soc 609 drivers/pinctrl/nomadik/pinctrl-abx500.c for (i = 0; i < pct->soc->gpio_num_ranges; i++) { soc 610 drivers/pinctrl/nomadik/pinctrl-abx500.c p = &pct->soc->gpio_ranges[i]; soc 616 drivers/pinctrl/nomadik/pinctrl-abx500.c if (i == pct->soc->gpio_num_ranges) { soc 651 drivers/pinctrl/nomadik/pinctrl-abx500.c return pct->soc->ngroups; soc 659 drivers/pinctrl/nomadik/pinctrl-abx500.c return pct->soc->groups[selector].name; soc 669 drivers/pinctrl/nomadik/pinctrl-abx500.c *pins = pct->soc->groups[selector].pins; soc 670 drivers/pinctrl/nomadik/pinctrl-abx500.c *num_pins = pct->soc->groups[selector].npins; soc 733 drivers/pinctrl/nomadik/pinctrl-abx500.c for (i = 0; i < npct->soc->npins; i++) soc 734 drivers/pinctrl/nomadik/pinctrl-abx500.c if (npct->soc->pins[i].number == pin_number) soc 735 drivers/pinctrl/nomadik/pinctrl-abx500.c return npct->soc->pins[i].name; soc 939 drivers/pinctrl/nomadik/pinctrl-abx500.c static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc) soc 952 drivers/pinctrl/nomadik/pinctrl-abx500.c for (i = 0; i < soc->gpio_num_ranges; i++) { soc 957 drivers/pinctrl/nomadik/pinctrl-abx500.c p = &soc->gpio_ranges[i]; soc 1017 drivers/pinctrl/nomadik/pinctrl-abx500.c abx500_pinctrl_ab8500_init(&pct->soc); soc 1020 drivers/pinctrl/nomadik/pinctrl-abx500.c abx500_pinctrl_ab8505_init(&pct->soc); soc 1027 drivers/pinctrl/nomadik/pinctrl-abx500.c if (!pct->soc) { soc 1032 drivers/pinctrl/nomadik/pinctrl-abx500.c pct->chip.ngpio = abx500_get_gpio_num(pct->soc); soc 1033 drivers/pinctrl/nomadik/pinctrl-abx500.c pct->irq_cluster = pct->soc->gpio_irq_cluster; soc 1034 drivers/pinctrl/nomadik/pinctrl-abx500.c pct->irq_cluster_size = pct->soc->ngpio_irq_cluster; soc 1043 drivers/pinctrl/nomadik/pinctrl-abx500.c abx500_pinctrl_desc.pins = pct->soc->pins; soc 1044 drivers/pinctrl/nomadik/pinctrl-abx500.c abx500_pinctrl_desc.npins = pct->soc->npins; soc 1056 drivers/pinctrl/nomadik/pinctrl-abx500.c for (i = 0; i < pct->soc->gpio_num_ranges; i++) { soc 1057 drivers/pinctrl/nomadik/pinctrl-abx500.c const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i]; soc 181 drivers/pinctrl/nomadik/pinctrl-abx500.h void abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc); soc 186 drivers/pinctrl/nomadik/pinctrl-abx500.h abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc) soc 194 drivers/pinctrl/nomadik/pinctrl-abx500.h void abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc); soc 199 drivers/pinctrl/nomadik/pinctrl-abx500.h abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc) soc 1245 drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc) soc 1247 drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c *soc = &nmk_db8500_soc; soc 365 drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c void nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc) soc 367 drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c *soc = &nmk_stn8815_soc; soc 279 drivers/pinctrl/nomadik/pinctrl-nomadik.c const struct nmk_pinctrl_soc_data *soc; soc 465 drivers/pinctrl/nomadik/pinctrl-nomadik.c for (i = 0 ; i < npct->soc->npins_altcx ; i++) { soc 466 drivers/pinctrl/nomadik/pinctrl-nomadik.c if (npct->soc->altcx_pins[i].pin == offset) soc 469 drivers/pinctrl/nomadik/pinctrl-nomadik.c if (i == npct->soc->npins_altcx) { soc 475 drivers/pinctrl/nomadik/pinctrl-nomadik.c pin_desc = npct->soc->altcx_pins + i; soc 476 drivers/pinctrl/nomadik/pinctrl-nomadik.c gpiocr_regs = npct->soc->prcm_gpiocr_registers; soc 590 drivers/pinctrl/nomadik/pinctrl-nomadik.c for (i = 0; i < npct->soc->npins_altcx; i++) { soc 591 drivers/pinctrl/nomadik/pinctrl-nomadik.c if (npct->soc->altcx_pins[i].pin == gpio) soc 594 drivers/pinctrl/nomadik/pinctrl-nomadik.c if (i == npct->soc->npins_altcx) soc 597 drivers/pinctrl/nomadik/pinctrl-nomadik.c pin_desc = npct->soc->altcx_pins + i; soc 598 drivers/pinctrl/nomadik/pinctrl-nomadik.c gpiocr_regs = npct->soc->prcm_gpiocr_registers; soc 1212 drivers/pinctrl/nomadik/pinctrl-nomadik.c return npct->soc->ngroups; soc 1220 drivers/pinctrl/nomadik/pinctrl-nomadik.c return npct->soc->groups[selector].name; soc 1229 drivers/pinctrl/nomadik/pinctrl-nomadik.c *pins = npct->soc->groups[selector].pins; soc 1230 drivers/pinctrl/nomadik/pinctrl-nomadik.c *num_pins = npct->soc->groups[selector].npins; soc 1400 drivers/pinctrl/nomadik/pinctrl-nomadik.c for (i = 0; i < npct->soc->npins; i++) soc 1401 drivers/pinctrl/nomadik/pinctrl-nomadik.c if (npct->soc->pins[i].number == pin_number) soc 1402 drivers/pinctrl/nomadik/pinctrl-nomadik.c return npct->soc->pins[i].name; soc 1532 drivers/pinctrl/nomadik/pinctrl-nomadik.c return npct->soc->nfunctions; soc 1540 drivers/pinctrl/nomadik/pinctrl-nomadik.c return npct->soc->functions[function].name; soc 1550 drivers/pinctrl/nomadik/pinctrl-nomadik.c *groups = npct->soc->functions[function].groups; soc 1551 drivers/pinctrl/nomadik/pinctrl-nomadik.c *num_groups = npct->soc->functions[function].ngroups; soc 1567 drivers/pinctrl/nomadik/pinctrl-nomadik.c g = &npct->soc->groups[group]; soc 1894 drivers/pinctrl/nomadik/pinctrl-nomadik.c nmk_pinctrl_stn8815_init(&npct->soc); soc 1896 drivers/pinctrl/nomadik/pinctrl-nomadik.c nmk_pinctrl_db8500_init(&npct->soc); soc 1898 drivers/pinctrl/nomadik/pinctrl-nomadik.c nmk_pinctrl_db8540_init(&npct->soc); soc 1939 drivers/pinctrl/nomadik/pinctrl-nomadik.c nmk_pinctrl_desc.pins = npct->soc->pins; soc 1940 drivers/pinctrl/nomadik/pinctrl-nomadik.c nmk_pinctrl_desc.npins = npct->soc->npins; soc 152 drivers/pinctrl/nomadik/pinctrl-nomadik.h void nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc); soc 157 drivers/pinctrl/nomadik/pinctrl-nomadik.h nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc) soc 165 drivers/pinctrl/nomadik/pinctrl-nomadik.h void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc); soc 170 drivers/pinctrl/nomadik/pinctrl-nomadik.h nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc) soc 178 drivers/pinctrl/nomadik/pinctrl-nomadik.h void nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc); soc 183 drivers/pinctrl/nomadik/pinctrl-nomadik.h nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc) soc 1757 drivers/pinctrl/pinctrl-single.c const struct pcs_soc_data *soc; soc 1760 drivers/pinctrl/pinctrl-single.c soc = of_device_get_match_data(&pdev->dev); soc 1761 drivers/pinctrl/pinctrl-single.c if (WARN_ON(!soc)) soc 1773 drivers/pinctrl/pinctrl-single.c pcs->flags = soc->flags; soc 1774 drivers/pinctrl/pinctrl-single.c memcpy(&pcs->socdata, soc, sizeof(*soc)); soc 65 drivers/pinctrl/qcom/pinctrl-msm.c const struct msm_pinctrl_soc_data *soc; soc 91 drivers/pinctrl/qcom/pinctrl-msm.c return pctrl->soc->ngroups; soc 99 drivers/pinctrl/qcom/pinctrl-msm.c return pctrl->soc->groups[group].name; soc 109 drivers/pinctrl/qcom/pinctrl-msm.c *pins = pctrl->soc->groups[group].pins; soc 110 drivers/pinctrl/qcom/pinctrl-msm.c *num_pins = pctrl->soc->groups[group].npins; soc 134 drivers/pinctrl/qcom/pinctrl-msm.c return pctrl->soc->nfunctions; soc 142 drivers/pinctrl/qcom/pinctrl-msm.c return pctrl->soc->functions[function].name; soc 152 drivers/pinctrl/qcom/pinctrl-msm.c *groups = pctrl->soc->functions[function].groups; soc 153 drivers/pinctrl/qcom/pinctrl-msm.c *num_groups = pctrl->soc->functions[function].ngroups; soc 167 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[group]; soc 195 drivers/pinctrl/qcom/pinctrl-msm.c const struct msm_pingroup *g = &pctrl->soc->groups[offset]; soc 268 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[group]; soc 290 drivers/pinctrl/qcom/pinctrl-msm.c if (pctrl->soc->pull_no_keeper) soc 298 drivers/pinctrl/qcom/pinctrl-msm.c if (pctrl->soc->pull_no_keeper) soc 347 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[group]; soc 366 drivers/pinctrl/qcom/pinctrl-msm.c if (pctrl->soc->pull_no_keeper) soc 372 drivers/pinctrl/qcom/pinctrl-msm.c if (pctrl->soc->pull_no_keeper) soc 438 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[offset]; soc 458 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[offset]; soc 484 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[offset]; soc 498 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[offset]; soc 511 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[offset]; soc 559 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[offset]; soc 576 drivers/pinctrl/qcom/pinctrl-msm.c if (pctrl->soc->pull_no_keeper) soc 603 drivers/pinctrl/qcom/pinctrl-msm.c const int *reserved = pctrl->soc->reserved_gpios; soc 710 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[d->hwirq]; soc 754 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[d->hwirq]; soc 798 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[d->hwirq]; soc 823 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[d->hwirq]; soc 977 drivers/pinctrl/qcom/pinctrl-msm.c g = &pctrl->soc->groups[i]; soc 995 drivers/pinctrl/qcom/pinctrl-msm.c if (pctrl->soc->reserved_gpios) soc 1006 drivers/pinctrl/qcom/pinctrl-msm.c unsigned ngpio = pctrl->soc->ngpios; soc 1092 drivers/pinctrl/qcom/pinctrl-msm.c const struct msm_function *func = pctrl->soc->functions; soc 1094 drivers/pinctrl/qcom/pinctrl-msm.c for (i = 0; i < pctrl->soc->nfunctions; i++) soc 1139 drivers/pinctrl/qcom/pinctrl-msm.c pctrl->soc = soc_data; soc 1170 drivers/pinctrl/qcom/pinctrl-msm.c pctrl->desc.pins = pctrl->soc->pins; soc 1171 drivers/pinctrl/qcom/pinctrl-msm.c pctrl->desc.npins = pctrl->soc->npins; soc 83 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c const struct tegra_xusb_padctl_soc *soc; soc 109 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c return padctl->soc->num_pins; soc 117 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c return padctl->soc->pins[group].name; soc 269 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c return padctl->soc->num_functions; soc 278 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c return padctl->soc->functions[function].name; soc 288 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c *num_groups = padctl->soc->functions[function].num_groups; soc 289 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c *groups = padctl->soc->functions[function].groups; soc 303 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c lane = &padctl->soc->lanes[group]; soc 337 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c lane = &padctl->soc->lanes[group]; soc 376 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c lane = &padctl->soc->lanes[group]; soc 889 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c padctl->soc = match->data; soc 44 drivers/pinctrl/tegra/pinctrl-tegra.c return pmx->soc->ngroups; soc 52 drivers/pinctrl/tegra/pinctrl-tegra.c return pmx->soc->groups[group].name; soc 62 drivers/pinctrl/tegra/pinctrl-tegra.c *pins = pmx->soc->groups[group].pins; soc 63 drivers/pinctrl/tegra/pinctrl-tegra.c *num_pins = pmx->soc->groups[group].npins; soc 225 drivers/pinctrl/tegra/pinctrl-tegra.c return pmx->soc->nfunctions; soc 233 drivers/pinctrl/tegra/pinctrl-tegra.c return pmx->soc->functions[function].name; soc 243 drivers/pinctrl/tegra/pinctrl-tegra.c *groups = pmx->soc->functions[function].groups; soc 244 drivers/pinctrl/tegra/pinctrl-tegra.c *num_groups = pmx->soc->functions[function].ngroups; soc 258 drivers/pinctrl/tegra/pinctrl-tegra.c g = &pmx->soc->groups[group]; soc 335 drivers/pinctrl/tegra/pinctrl-tegra.c if (pmx->soc->hsm_in_mux) { soc 346 drivers/pinctrl/tegra/pinctrl-tegra.c if (pmx->soc->schmitt_in_mux) { soc 387 drivers/pinctrl/tegra/pinctrl-tegra.c if (pmx->soc->drvtype_in_mux) { soc 451 drivers/pinctrl/tegra/pinctrl-tegra.c g = &pmx->soc->groups[group]; soc 480 drivers/pinctrl/tegra/pinctrl-tegra.c g = &pmx->soc->groups[group]; soc 548 drivers/pinctrl/tegra/pinctrl-tegra.c g = &pmx->soc->groups[group]; soc 616 drivers/pinctrl/tegra/pinctrl-tegra.c for (i = 0; i < pmx->soc->ngroups; ++i) { soc 617 drivers/pinctrl/tegra/pinctrl-tegra.c g = &pmx->soc->groups[i]; soc 723 drivers/pinctrl/tegra/pinctrl-tegra.c pmx->soc = soc_data; soc 760 drivers/pinctrl/tegra/pinctrl-tegra.c tegra_pinctrl_gpio_range.npins = pmx->soc->ngpios; soc 762 drivers/pinctrl/tegra/pinctrl-tegra.c tegra_pinctrl_desc.pins = pmx->soc->pins; soc 763 drivers/pinctrl/tegra/pinctrl-tegra.c tegra_pinctrl_desc.npins = pmx->soc->npins; soc 798 drivers/pinctrl/tegra/pinctrl-tegra.c if (!gpio_node_has_range(pmx->soc->gpio_compatible)) soc 15 drivers/pinctrl/tegra/pinctrl-tegra.h const struct tegra_pinctrl_soc_data *soc; soc 1514 drivers/pinctrl/tegra/pinctrl-tegra114.c FUNCTION(soc), soc 1678 drivers/pinctrl/tegra/pinctrl-tegra124.c FUNCTION(soc), soc 1243 drivers/pinctrl/tegra/pinctrl-tegra210.c FUNCTION(soc), soc 366 drivers/power/supply/88pm860x_battery.c static int calc_soc(struct pm860x_battery_info *info, int state, int *soc) soc 373 drivers/power/supply/88pm860x_battery.c if (!soc) soc 389 drivers/power/supply/88pm860x_battery.c *soc = 0; soc 395 drivers/power/supply/88pm860x_battery.c *soc = array_soc[i][1]; soc 436 drivers/power/supply/88pm860x_battery.c int soc; soc 499 drivers/power/supply/88pm860x_battery.c calc_soc(info, OCV_MODE_ACTIVE, &soc); soc 512 drivers/power/supply/88pm860x_battery.c if (data > soc + 15) soc 513 drivers/power/supply/88pm860x_battery.c info->start_soc = soc; soc 514 drivers/power/supply/88pm860x_battery.c else if (data < soc - 15) soc 515 drivers/power/supply/88pm860x_battery.c info->start_soc = soc; soc 518 drivers/power/supply/88pm860x_battery.c dev_dbg(info->dev, "soc_rtc %d, soc_ocv :%d\n", data, soc); soc 522 drivers/power/supply/88pm860x_battery.c info->start_soc = soc; soc 721 drivers/power/supply/88pm860x_battery.c soc: soc 731 drivers/power/supply/88pm860x_battery.c goto soc; soc 1336 drivers/power/supply/bq27xxx_battery.c int soc; soc 1339 drivers/power/supply/bq27xxx_battery.c soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true); soc 1341 drivers/power/supply/bq27xxx_battery.c soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false); soc 1343 drivers/power/supply/bq27xxx_battery.c if (soc < 0) soc 1346 drivers/power/supply/bq27xxx_battery.c return soc; soc 84 drivers/power/supply/da9150-fg.c int soc; soc 346 drivers/power/supply/da9150-fg.c if (val.intval != fg->soc) { soc 347 drivers/power/supply/da9150-fg.c fg->soc = val.intval; soc 368 drivers/power/supply/da9150-fg.c int soc; soc 370 drivers/power/supply/da9150-fg.c soc = da9150_fg_read_attr_sync(fg, DA9150_QIF_SOC_PCT, soc 373 drivers/power/supply/da9150-fg.c if (soc > fg->warn_soc) { soc 378 drivers/power/supply/da9150-fg.c } else if ((soc <= fg->warn_soc) && (soc > fg->crit_soc)) { soc 390 drivers/power/supply/da9150-fg.c } else if (soc <= fg->crit_soc) { soc 42 drivers/power/supply/max17040_battery.c int soc; soc 64 drivers/power/supply/max17040_battery.c val->intval = chip->soc; soc 114 drivers/power/supply/max17040_battery.c u16 soc; soc 116 drivers/power/supply/max17040_battery.c soc = max17040_read_reg(client, MAX17040_SOC); soc 118 drivers/power/supply/max17040_battery.c chip->soc = (soc >> 8); soc 159 drivers/power/supply/max17040_battery.c if (chip->soc > MAX17040_BATTERY_FULL) soc 829 drivers/power/supply/max17042_battery.c u32 soc, soc_tr; soc 834 drivers/power/supply/max17042_battery.c regmap_read(map, MAX17042_RepSOC, &soc); soc 835 drivers/power/supply/max17042_battery.c soc >>= 8; soc 836 drivers/power/supply/max17042_battery.c soc_tr = (soc + off) << 8; soc 837 drivers/power/supply/max17042_battery.c soc_tr |= (soc - off); soc 258 drivers/power/supply/olpc_battery.c uint8_t soc; soc 262 drivers/power/supply/olpc_battery.c ret = olpc_ec_cmd(EC_BAT_SOC, NULL, 0, &soc, 1); soc 270 drivers/power/supply/olpc_battery.c val->intval = soc * (full.intval / 100); soc 54 drivers/pwm/pwm-fsl-ftm.c const struct fsl_ftm_soc *soc; soc 95 drivers/pwm/pwm-fsl-ftm.c if (!ret && fpc->soc->has_enable_bits) { soc 109 drivers/pwm/pwm-fsl-ftm.c if (fpc->soc->has_enable_bits) { soc 412 drivers/pwm/pwm-fsl-ftm.c fpc->soc = of_device_get_match_data(&pdev->dev); soc 40 drivers/pwm/pwm-hibvt.c const struct hibvt_pwm_soc *soc; soc 167 drivers/pwm/pwm-hibvt.c if (hi_pwm_chip->soc->quirk_force_enable && state->enabled) soc 190 drivers/pwm/pwm-hibvt.c const struct hibvt_pwm_soc *soc = soc 211 drivers/pwm/pwm-hibvt.c pwm_chip->chip.npwm = soc->num_pwms; soc 214 drivers/pwm/pwm-hibvt.c pwm_chip->soc = soc; soc 56 drivers/pwm/pwm-mediatek.c const struct pwm_mediatek_of_data *soc; soc 152 drivers/pwm/pwm-mediatek.c if (pc->soc->pwm45_fixup && pwm->hwpwm > 2) { soc 218 drivers/pwm/pwm-mediatek.c pc->soc = of_device_get_match_data(&pdev->dev); soc 225 drivers/pwm/pwm-mediatek.c pc->clk_pwms = devm_kcalloc(&pdev->dev, pc->soc->num_pwms, soc 244 drivers/pwm/pwm-mediatek.c for (i = 0; i < pc->soc->num_pwms; i++) { soc 262 drivers/pwm/pwm-mediatek.c pc->chip.npwm = pc->soc->num_pwms; soc 47 drivers/pwm/pwm-tegra.c const struct tegra_pwm_soc *soc; soc 180 drivers/pwm/pwm-tegra.c pwm->soc = of_device_get_match_data(&pdev->dev); soc 195 drivers/pwm/pwm-tegra.c ret = clk_set_rate(pwm->clk, pwm->soc->max_frequency); soc 220 drivers/pwm/pwm-tegra.c pwm->chip.npwm = pwm->soc->num_channels; soc 134 drivers/regulator/cpcap-regulator.c const struct cpcap_regulator *soc; soc 528 drivers/regulator/cpcap-regulator.c ddata->soc = match_data; soc 536 drivers/regulator/cpcap-regulator.c const struct cpcap_regulator *regulator = &ddata->soc[i]; soc 65 drivers/reset/tegra/reset-bpmp.c bpmp->rstc.nr_resets = bpmp->soc->num_resets; soc 211 drivers/soc/atmel/soc.c const struct at91_soc *soc; soc 230 drivers/soc/atmel/soc.c for (soc = socs; soc->name; soc++) { soc 231 drivers/soc/atmel/soc.c if (soc->cidr_match != (cidr & AT91_CIDR_MATCH_MASK)) soc 234 drivers/soc/atmel/soc.c if (!(cidr & AT91_CIDR_EXT) || soc->exid_match == exid) soc 238 drivers/soc/atmel/soc.c if (!soc->name) { soc 247 drivers/soc/atmel/soc.c soc_dev_attr->family = soc->family; soc 248 drivers/soc/atmel/soc.c soc_dev_attr->soc_id = soc->name; soc 259 drivers/soc/atmel/soc.c if (soc->family) soc 260 drivers/soc/atmel/soc.c pr_info("Detected SoC family: %s\n", soc->family); soc 261 drivers/soc/atmel/soc.c pr_info("Detected SoC: %s, revision %X\n", soc->name, soc 514 drivers/soc/fsl/qe/qe.c if (firmware->soc.model) soc 517 drivers/soc/fsl/qe/qe.c firmware->id, be16_to_cpu(firmware->soc.model), soc 518 drivers/soc/fsl/qe/qe.c firmware->soc.major, firmware->soc.minor); soc 1032 drivers/soc/mediatek/mtk-scpsys.c const struct scp_soc_data *soc; soc 1037 drivers/soc/mediatek/mtk-scpsys.c soc = of_device_get_match_data(&pdev->dev); soc 1039 drivers/soc/mediatek/mtk-scpsys.c scp = init_scp(pdev, soc->domains, soc->num_domains, &soc->regs, soc 1040 drivers/soc/mediatek/mtk-scpsys.c soc->bus_prot_reg_update); soc 1044 drivers/soc/mediatek/mtk-scpsys.c mtk_register_power_domains(pdev, scp, soc->num_domains); soc 1048 drivers/soc/mediatek/mtk-scpsys.c for (i = 0, sd = soc->subdomains; i < soc->num_subdomains; i++, sd++) { soc 286 drivers/soc/renesas/renesas-soc.c const struct renesas_soc *soc; soc 296 drivers/soc/renesas/renesas-soc.c soc = match->data; soc 297 drivers/soc/renesas/renesas-soc.c family = soc->family; soc 308 drivers/soc/renesas/renesas-soc.c if (soc->id && ((product >> 16) & 0xff) != soc->id) { soc 329 drivers/soc/renesas/renesas-soc.c } else if (soc->id && family->reg) { soc 341 drivers/soc/renesas/renesas-soc.c if (soc->id && ((product >> 8) & 0xff) != soc->id) { soc 90 drivers/soc/tegra/fuse/fuse-tegra.c .soc = NULL, soc 147 drivers/soc/tegra/fuse/fuse-tegra.c if (fuse->soc->probe) { soc 148 drivers/soc/tegra/fuse/fuse-tegra.c err = fuse->soc->probe(fuse); soc 155 drivers/soc/tegra/fuse/fuse-tegra.c if (tegra_fuse_create_sysfs(&pdev->dev, fuse->soc->info->size, soc 156 drivers/soc/tegra/fuse/fuse-tegra.c fuse->soc->info)) soc 177 drivers/soc/tegra/fuse/fuse-tegra.c unsigned int offset = fuse->soc->info->spare + spare * 4; soc 268 drivers/soc/tegra/fuse/fuse-tegra.c fuse->soc = &tegra20_fuse_soc; soc 274 drivers/soc/tegra/fuse/fuse-tegra.c fuse->soc = &tegra30_fuse_soc; soc 280 drivers/soc/tegra/fuse/fuse-tegra.c fuse->soc = &tegra114_fuse_soc; soc 286 drivers/soc/tegra/fuse/fuse-tegra.c fuse->soc = &tegra124_fuse_soc; soc 311 drivers/soc/tegra/fuse/fuse-tegra.c fuse->soc = match->data; soc 332 drivers/soc/tegra/fuse/fuse-tegra.c fuse->soc->init(fuse); soc 350 drivers/soc/tegra/fuse/fuse-tegra.c struct device *soc; soc 359 drivers/soc/tegra/fuse/fuse-tegra.c soc = tegra_soc_device_register(); soc 360 drivers/soc/tegra/fuse/fuse-tegra.c if (IS_ERR(soc)) { soc 361 drivers/soc/tegra/fuse/fuse-tegra.c pr_err("failed to register SoC device: %ld\n", PTR_ERR(soc)); soc 362 drivers/soc/tegra/fuse/fuse-tegra.c return PTR_ERR(soc); soc 158 drivers/soc/tegra/fuse/fuse-tegra20.c fuse->soc->speedo_init(&tegra_sku_info); soc 95 drivers/soc/tegra/fuse/fuse-tegra30.c if (fuse->soc->speedo_init) soc 96 drivers/soc/tegra/fuse/fuse-tegra30.c fuse->soc->speedo_init(&tegra_sku_info); soc 40 drivers/soc/tegra/fuse/fuse.h const struct tegra_fuse_soc *soc; soc 322 drivers/soc/tegra/pmc.c const struct tegra_pmc_soc *soc; soc 427 drivers/soc/tegra/pmc.c if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps) soc 435 drivers/soc/tegra/pmc.c return (pmc->soc && pmc->soc->powergates[id]); soc 447 drivers/soc/tegra/pmc.c if (!pmc || !pmc->soc || !name) soc 450 drivers/soc/tegra/pmc.c for (i = 0; i < pmc->soc->num_powergates; i++) { soc 454 drivers/soc/tegra/pmc.c if (!strcmp(name, pmc->soc->powergates[i])) soc 473 drivers/soc/tegra/pmc.c if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps) soc 505 drivers/soc/tegra/pmc.c if (pmc->soc->has_gpu_clamps) { soc 598 drivers/soc/tegra/pmc.c if (pg->pmc->soc->needs_mbist_war) soc 798 drivers/soc/tegra/pmc.c if (pmc->soc && cpuid < pmc->soc->num_cpu_powergates) soc 799 drivers/soc/tegra/pmc.c return pmc->soc->cpu_powergates[cpuid]; soc 855 drivers/soc/tegra/pmc.c value = tegra_pmc_scratch_readl(pmc, pmc->soc->regs->scratch0); soc 869 drivers/soc/tegra/pmc.c tegra_pmc_scratch_writel(pmc, value, pmc->soc->regs->scratch0); soc 892 drivers/soc/tegra/pmc.c for (i = 0; i < pmc->soc->num_powergates; i++) { soc 897 drivers/soc/tegra/pmc.c seq_printf(s, " %9s %7s\n", pmc->soc->powergates[i], soc 1146 drivers/soc/tegra/pmc.c for (i = 0; i < pmc->soc->num_io_pads; i++) soc 1147 drivers/soc/tegra/pmc.c if (pmc->soc->io_pads[i].id == id) soc 1148 drivers/soc/tegra/pmc.c return &pmc->soc->io_pads[i]; soc 1173 drivers/soc/tegra/pmc.c *status = pmc->soc->regs->dpd_status; soc 1174 drivers/soc/tegra/pmc.c *request = pmc->soc->regs->dpd_req; soc 1176 drivers/soc/tegra/pmc.c *status = pmc->soc->regs->dpd2_status; soc 1177 drivers/soc/tegra/pmc.c *request = pmc->soc->regs->dpd2_req; soc 1339 drivers/soc/tegra/pmc.c if (pmc->soc->has_impl_33v_pwr) { soc 1384 drivers/soc/tegra/pmc.c if (pmc->soc->has_impl_33v_pwr) soc 1551 drivers/soc/tegra/pmc.c if (pmc->soc->init) soc 1552 drivers/soc/tegra/pmc.c pmc->soc->init(pmc); soc 1563 drivers/soc/tegra/pmc.c if (!pmc->soc->has_tsense_reset) soc 1635 drivers/soc/tegra/pmc.c return pmc->soc->num_io_pads; soc 1643 drivers/soc/tegra/pmc.c return pmc->soc->io_pads[group].name; soc 1653 drivers/soc/tegra/pmc.c *pins = &pmc->soc->io_pads[group].id; soc 1765 drivers/soc/tegra/pmc.c if (!pmc->soc->num_pin_descs) soc 1769 drivers/soc/tegra/pmc.c tegra_pmc_pctl_desc.pins = pmc->soc->pin_descs; soc 1770 drivers/soc/tegra/pmc.c tegra_pmc_pctl_desc.npins = pmc->soc->num_pin_descs; soc 1789 drivers/soc/tegra/pmc.c value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status); soc 1790 drivers/soc/tegra/pmc.c value &= pmc->soc->regs->rst_source_mask; soc 1791 drivers/soc/tegra/pmc.c value >>= pmc->soc->regs->rst_source_shift; soc 1793 drivers/soc/tegra/pmc.c if (WARN_ON(value >= pmc->soc->num_reset_sources)) soc 1796 drivers/soc/tegra/pmc.c return sprintf(buf, "%s\n", pmc->soc->reset_sources[value]); soc 1806 drivers/soc/tegra/pmc.c value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status); soc 1807 drivers/soc/tegra/pmc.c value &= pmc->soc->regs->rst_level_mask; soc 1808 drivers/soc/tegra/pmc.c value >>= pmc->soc->regs->rst_level_shift; soc 1810 drivers/soc/tegra/pmc.c if (WARN_ON(value >= pmc->soc->num_reset_levels)) soc 1813 drivers/soc/tegra/pmc.c return sprintf(buf, "%s\n", pmc->soc->reset_levels[value]); soc 1823 drivers/soc/tegra/pmc.c if (pmc->soc->reset_sources) { soc 1831 drivers/soc/tegra/pmc.c if (pmc->soc->reset_levels) { soc 1858 drivers/soc/tegra/pmc.c const struct tegra_pmc_soc *soc = pmc->soc; soc 1866 drivers/soc/tegra/pmc.c for (i = 0; i < soc->num_wake_events; i++) { soc 1867 drivers/soc/tegra/pmc.c const struct tegra_wake_event *event = &soc->wake_events[i]; soc 1925 drivers/soc/tegra/pmc.c if (i == soc->num_wake_events) { soc 2059 drivers/soc/tegra/pmc.c if (WARN_ON(!pmc->base || !pmc->soc)) soc 2820 drivers/soc/tegra/pmc.c saved = readl(pmc->base + pmc->soc->regs->scratch0); soc 2827 drivers/soc/tegra/pmc.c writel(value, pmc->base + pmc->soc->regs->scratch0); soc 2828 drivers/soc/tegra/pmc.c value = readl(pmc->base + pmc->soc->regs->scratch0); soc 2837 drivers/soc/tegra/pmc.c writel(saved, pmc->base + pmc->soc->regs->scratch0); soc 2903 drivers/soc/tegra/pmc.c pmc->soc = match->data; soc 2905 drivers/soc/tegra/pmc.c if (pmc->soc->maybe_tz_only) soc 2909 drivers/soc/tegra/pmc.c for (i = 0; i < pmc->soc->num_powergates; i++) soc 2910 drivers/soc/tegra/pmc.c if (pmc->soc->powergates[i]) soc 2919 drivers/soc/tegra/pmc.c pmc->soc->setup_irq_polarity(pmc, np, invert); soc 178 drivers/thermal/samsung/exynos_tmu.c enum soc_type soc; soc 238 drivers/thermal/samsung/exynos_tmu.c (data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_MASK soc 271 drivers/thermal/samsung/exynos_tmu.c if (data->soc != SOC_ARCH_EXYNOS5433) /* FIXME */ soc 331 drivers/thermal/samsung/exynos_tmu.c if (data->soc == SOC_ARCH_EXYNOS4412 || soc 332 drivers/thermal/samsung/exynos_tmu.c data->soc == SOC_ARCH_EXYNOS3250) soc 424 drivers/thermal/samsung/exynos_tmu.c if (data->soc == SOC_ARCH_EXYNOS3250 || soc 425 drivers/thermal/samsung/exynos_tmu.c data->soc == SOC_ARCH_EXYNOS4412 || soc 426 drivers/thermal/samsung/exynos_tmu.c data->soc == SOC_ARCH_EXYNOS5250) { soc 427 drivers/thermal/samsung/exynos_tmu.c if (data->soc == SOC_ARCH_EXYNOS3250) { soc 438 drivers/thermal/samsung/exynos_tmu.c if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) soc 575 drivers/thermal/samsung/exynos_tmu.c if (data->soc != SOC_ARCH_EXYNOS4210) soc 688 drivers/thermal/samsung/exynos_tmu.c if (data->soc == SOC_ARCH_EXYNOS7) { soc 714 drivers/thermal/samsung/exynos_tmu.c if (data->soc == SOC_ARCH_EXYNOS5260) soc 716 drivers/thermal/samsung/exynos_tmu.c else if (data->soc == SOC_ARCH_EXYNOS5433) soc 718 drivers/thermal/samsung/exynos_tmu.c else if (data->soc == SOC_ARCH_EXYNOS7) soc 733 drivers/thermal/samsung/exynos_tmu.c if (data->soc == SOC_ARCH_EXYNOS4210) soc 796 drivers/thermal/samsung/exynos_tmu.c if (data->soc == SOC_ARCH_EXYNOS5260) { soc 799 drivers/thermal/samsung/exynos_tmu.c } else if (data->soc == SOC_ARCH_EXYNOS7) { soc 802 drivers/thermal/samsung/exynos_tmu.c } else if (data->soc == SOC_ARCH_EXYNOS5433) { soc 894 drivers/thermal/samsung/exynos_tmu.c data->soc = (enum soc_type)of_device_get_match_data(&pdev->dev); soc 896 drivers/thermal/samsung/exynos_tmu.c switch (data->soc) { soc 928 drivers/thermal/samsung/exynos_tmu.c if (data->soc != SOC_ARCH_EXYNOS5420 && soc 929 drivers/thermal/samsung/exynos_tmu.c data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO) soc 979 drivers/thermal/samsung/exynos_tmu.c if (data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO) soc 1048 drivers/thermal/samsung/exynos_tmu.c if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) { soc 1067 drivers/thermal/samsung/exynos_tmu.c switch (data->soc) { soc 342 drivers/thermal/tegra/soctherm.c struct tegra_soctherm_soc *soc; soc 387 drivers/thermal/tegra/soctherm.c const struct tegra_tsensor *sensor = &tegra->soc->tsensors[i]; soc 484 drivers/thermal/tegra/soctherm.c temp = enforce_temp_range(dev, trip_temp) / ts->soc->thresh_grain; soc 525 drivers/thermal/tegra/soctherm.c temp = enforce_temp_range(dev, trip_temp) / ts->soc->thresh_grain; soc 569 drivers/thermal/tegra/soctherm.c struct tsensor_group_thermtrips *tt = ts->soc->thermtrips; soc 575 drivers/thermal/tegra/soctherm.c for (i = 0; i < ts->soc->num_ttgs; i++) { soc 701 drivers/thermal/tegra/soctherm.c lo = enforce_temp_range(zone->dev, lo) / zone->ts->soc->thresh_grain; soc 702 drivers/thermal/tegra/soctherm.c hi = enforce_temp_range(zone->dev, hi) / zone->ts->soc->thresh_grain; soc 1291 drivers/thermal/tegra/soctherm.c const struct tegra_tsensor *tsensors = ts->soc->tsensors; soc 1292 drivers/thermal/tegra/soctherm.c const struct tegra_tsensor_group **ttgs = ts->soc->ttgs; soc 1298 drivers/thermal/tegra/soctherm.c for (i = 0; i < ts->soc->num_tsensors; i++) { soc 1368 drivers/thermal/tegra/soctherm.c for (i = 0; i < ts->soc->num_ttgs; i++) { soc 1379 drivers/thermal/tegra/soctherm.c v = sign_extend32(state, ts->soc->bptt - 1); soc 1380 drivers/thermal/tegra/soctherm.c v *= ts->soc->thresh_grain; soc 1385 drivers/thermal/tegra/soctherm.c v = sign_extend32(state, ts->soc->bptt - 1); soc 1386 drivers/thermal/tegra/soctherm.c v *= ts->soc->thresh_grain; soc 1446 drivers/thermal/tegra/soctherm.c for (i = 0; i < ts->soc->num_ttgs; i++) { soc 1450 drivers/thermal/tegra/soctherm.c state *= ts->soc->thresh_grain; soc 1468 drivers/thermal/tegra/soctherm.c if (ts->soc->use_ccroc) { soc 1571 drivers/thermal/tegra/soctherm.c struct tsensor_group_thermtrips *tt = ts->soc->thermtrips; soc 1572 drivers/thermal/tegra/soctherm.c const int max_num_prop = ts->soc->num_ttgs * 2; soc 1652 drivers/thermal/tegra/soctherm.c ret = of_property_read_u32(np, ts->soc->use_ccroc ? soc 1656 drivers/thermal/tegra/soctherm.c if (ts->soc->use_ccroc && soc 1659 drivers/thermal/tegra/soctherm.c else if (!ts->soc->use_ccroc && val <= 100) soc 1939 drivers/thermal/tegra/soctherm.c if (ts->soc->use_ccroc) soc 1968 drivers/thermal/tegra/soctherm.c if (ts->soc->use_ccroc) { soc 1979 drivers/thermal/tegra/soctherm.c if (ts->soc->use_ccroc) { soc 2053 drivers/thermal/tegra/soctherm.c const struct tegra_tsensor_group **ttgs = tegra->soc->ttgs; soc 2058 drivers/thermal/tegra/soctherm.c for (i = 0; i < tegra->soc->num_tsensors; ++i) soc 2064 drivers/thermal/tegra/soctherm.c for (i = 0; i < tegra->soc->num_ttgs; ++i) { soc 2111 drivers/thermal/tegra/soctherm.c struct tegra_soctherm_soc *soc; soc 2119 drivers/thermal/tegra/soctherm.c soc = (struct tegra_soctherm_soc *)match->data; soc 2120 drivers/thermal/tegra/soctherm.c if (soc->num_ttgs > TEGRA124_SOCTHERM_SENSOR_NUM) soc 2130 drivers/thermal/tegra/soctherm.c tegra->soc = soc; soc 2140 drivers/thermal/tegra/soctherm.c if (!tegra->soc->use_ccroc) { soc 2177 drivers/thermal/tegra/soctherm.c soc->num_tsensors, sizeof(u32), soc 2183 drivers/thermal/tegra/soctherm.c err = tegra_calc_shared_calib(soc->tfuse, &shared_calib); soc 2188 drivers/thermal/tegra/soctherm.c for (i = 0; i < soc->num_tsensors; ++i) { soc 2189 drivers/thermal/tegra/soctherm.c err = tegra_calc_tsensor_calib(&soc->tsensors[i], soc 2197 drivers/thermal/tegra/soctherm.c soc->num_ttgs, sizeof(z), soc 2212 drivers/thermal/tegra/soctherm.c for (i = 0; i < soc->num_ttgs; ++i) { soc 2220 drivers/thermal/tegra/soctherm.c zone->reg = tegra->regs + soc->ttgs[i]->sensor_temp_offset; soc 2222 drivers/thermal/tegra/soctherm.c zone->sg = soc->ttgs[i]; soc 2226 drivers/thermal/tegra/soctherm.c soc->ttgs[i]->id, zone, soc 2236 drivers/thermal/tegra/soctherm.c tegra->thermctl_tzs[soc->ttgs[i]->id] = z; soc 2239 drivers/thermal/tegra/soctherm.c err = tegra_soctherm_set_hwtrips(&pdev->dev, soc->ttgs[i], z); soc 2280 drivers/thermal/tegra/soctherm.c struct tegra_soctherm_soc *soc = tegra->soc; soc 2292 drivers/thermal/tegra/soctherm.c for (i = 0; i < soc->num_ttgs; ++i) { soc 2295 drivers/thermal/tegra/soctherm.c tz = tegra->thermctl_tzs[soc->ttgs[i]->id]; soc 2296 drivers/thermal/tegra/soctherm.c err = tegra_soctherm_set_hwtrips(dev, soc->ttgs[i], tz); soc 122 drivers/tty/serial/lantiq.c const struct ltq_soc_data *soc; soc 381 drivers/tty/serial/lantiq.c retval = ltq_port->soc->request_irq(port); soc 396 drivers/tty/serial/lantiq.c ltq_port->soc->free_irq(port); soc 842 drivers/tty/serial/lantiq.c ltq_port->soc = of_device_get_match_data(&pdev->dev); soc 843 drivers/tty/serial/lantiq.c ret = ltq_port->soc->fetch_irq(&pdev->dev, ltq_port); soc 1132 drivers/tty/serial/ucc_uart.c unsigned int soc; soc 1145 drivers/tty/serial/ucc_uart.c if ((sscanf(soc_string, "PowerPC,%u", &soc) != 1) || !soc) soc 1153 drivers/tty/serial/ucc_uart.c return soc; soc 1222 drivers/tty/serial/ucc_uart.c unsigned int soc; soc 1226 drivers/tty/serial/ucc_uart.c soc = soc_info(&rev_h, &rev_l); soc 1227 drivers/tty/serial/ucc_uart.c if (!soc) { soc 1232 drivers/tty/serial/ucc_uart.c soc, rev_h, rev_l); soc 64 drivers/usb/chipidea/ci_hdrc_tegra.c const struct tegra_udc_soc_info *soc; soc 72 drivers/usb/chipidea/ci_hdrc_tegra.c soc = of_device_get_match_data(&pdev->dev); soc 73 drivers/usb/chipidea/ci_hdrc_tegra.c if (!soc) { soc 107 drivers/usb/chipidea/ci_hdrc_tegra.c udc->data.flags = soc->flags; soc 180 drivers/usb/host/xhci-tegra.c const struct tegra_xusb_soc *soc; soc 462 drivers/usb/host/xhci-tegra.c const struct tegra_xusb_soc *soc = tegra->soc; soc 485 drivers/usb/host/xhci-tegra.c if (tegra->soc->scale_ss_clock) { soc 528 drivers/usb/host/xhci-tegra.c mask = extract_field(msg->data, 1 + soc->ports.hsic.offset, soc 529 drivers/usb/host/xhci-tegra.c soc->ports.hsic.count); soc 556 drivers/usb/host/xhci-tegra.c mask = extract_field(msg->data, 1 + soc->ports.usb3.offset, soc 557 drivers/usb/host/xhci-tegra.c soc->ports.usb3.count); soc 559 drivers/usb/host/xhci-tegra.c for_each_set_bit(port, &mask, soc->ports.usb3.count) { soc 623 drivers/usb/host/xhci-tegra.c if (tegra->soc->has_ipfs) { soc 644 drivers/usb/host/xhci-tegra.c if (tegra->soc->has_ipfs) { soc 683 drivers/usb/host/xhci-tegra.c if (tegra->soc->scale_ss_clock) { soc 758 drivers/usb/host/xhci-tegra.c regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); soc 775 drivers/usb/host/xhci-tegra.c err = regulator_bulk_enable(tegra->soc->num_supplies, tegra->supplies); soc 801 drivers/usb/host/xhci-tegra.c err = request_firmware(&fw, tegra->soc->firmware, tegra->dev); soc 977 drivers/usb/host/xhci-tegra.c tegra->soc = of_device_get_match_data(&pdev->dev); soc 991 drivers/usb/host/xhci-tegra.c if (tegra->soc->has_ipfs) { soc 1115 drivers/usb/host/xhci-tegra.c tegra->supplies = devm_kcalloc(&pdev->dev, tegra->soc->num_supplies, soc 1122 drivers/usb/host/xhci-tegra.c for (i = 0; i < tegra->soc->num_supplies; i++) soc 1123 drivers/usb/host/xhci-tegra.c tegra->supplies[i].supply = tegra->soc->supply_names[i]; soc 1125 drivers/usb/host/xhci-tegra.c err = devm_regulator_bulk_get(&pdev->dev, tegra->soc->num_supplies, soc 1132 drivers/usb/host/xhci-tegra.c for (i = 0; i < tegra->soc->num_types; i++) soc 1133 drivers/usb/host/xhci-tegra.c tegra->num_phys += tegra->soc->phy_types[i].num; soc 1142 drivers/usb/host/xhci-tegra.c for (i = 0, k = 0; i < tegra->soc->num_types; i++) { soc 1145 drivers/usb/host/xhci-tegra.c for (j = 0; j < tegra->soc->phy_types[i].num; j++) { soc 1147 drivers/usb/host/xhci-tegra.c tegra->soc->phy_types[i].name, j); soc 12 include/linux/bcma/bcma_soc.h int __init bcma_host_soc_register(struct bcma_soc *soc); soc 13 include/linux/bcma/bcma_soc.h int __init bcma_host_soc_init(struct bcma_soc *soc); soc 97 include/linux/mbus.h int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base, soc 158 include/linux/mfd/mxs-lradc.h enum mxs_lradc_id soc; soc 168 include/linux/mfd/mxs-lradc.h switch (lradc->soc) { soc 37 include/linux/sys_soc.h struct device *soc_device_to_device(struct soc_device *soc); soc 278 include/soc/fsl/qe/qe.h } __attribute__ ((packed)) soc; soc 60 include/soc/tegra/bpmp.h const struct tegra_bpmp_soc *soc; soc 82 include/soc/tegra/mc.h const struct tegra_smmu_soc *soc, soc 87 include/soc/tegra/mc.h tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc, soc 173 include/soc/tegra/mc.h const struct tegra_mc_soc *soc; soc 33 sound/soc/fsl/fsl_micfil.c const struct fsl_micfil_soc_data *soc; soc 418 sound/soc/fsl/fsl_micfil.c val = MICFIL_FIFO_CTRL_FIFOWMK(micfil->soc->fifo_depth) - 1; soc 659 sound/soc/fsl/fsl_micfil.c micfil->soc = of_id->data; soc 695 sound/soc/fsl/fsl_micfil.c if (micfil->dataline & ~micfil->soc->dataline) { soc 697 sound/soc/fsl/fsl_micfil.c micfil->soc->dataline); soc 294 sound/soc/fsl/fsl_ssi.c const struct fsl_ssi_soc_data *soc; soc 387 sound/soc/fsl/fsl_ssi.c sisr2 = sisr & ssi->soc->sisr_write_mask; soc 420 sound/soc/fsl/fsl_ssi.c if (ssi->soc->offline_config && ssi->streams) soc 423 sound/soc/fsl/fsl_ssi.c if (ssi->soc->offline_config) { soc 537 sound/soc/fsl/fsl_ssi.c if (ssi->soc->offline_config && aactive) soc 540 sound/soc/fsl/fsl_ssi.c if (ssi->soc->offline_config) { soc 571 sound/soc/fsl/fsl_ssi.c if (!ssi->soc->imx21regs) { soc 1098 sound/soc/fsl/fsl_ssi.c if (ssi->soc->imx && ssi->use_dma) soc 1388 sound/soc/fsl/fsl_ssi.c ssi->soc = of_id->data; soc 1495 sound/soc/fsl/fsl_ssi.c if (ssi->soc->imx21regs) { soc 1552 sound/soc/fsl/fsl_ssi.c if (ssi->soc->imx) { soc 1621 sound/soc/fsl/fsl_ssi.c if (ssi->soc->imx) soc 1639 sound/soc/fsl/fsl_ssi.c if (ssi->soc->imx) soc 20 sound/soc/intel/common/soc-intel-quirks.h #define SOC_INTEL_IS_CPU(soc, type) \ soc 21 sound/soc/intel/common/soc-intel-quirks.h static inline bool soc_intel_is_##soc(void) \ soc 23 sound/soc/intel/common/soc-intel-quirks.h static const struct x86_cpu_id soc##_cpu_ids[] = { \ soc 29 sound/soc/intel/common/soc-intel-quirks.h id = x86_match_cpu(soc##_cpu_ids); \ soc 39 sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c for (i = 0; i < afe_priv->soc->i2s_num; i++) { soc 95 sound/soc/mediatek/mt2701/mt2701-afe-common.h const struct mt2701_soc_variants *soc; soc 89 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c if (val < 0 || val >= afe_priv->soc->i2s_num) { soc 114 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c bool mode = afe_priv->soc->has_one_heart_mode; soc 150 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c bool mode = afe_priv->soc->has_one_heart_mode; soc 202 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c if (afe_priv->soc->has_one_heart_mode) { soc 238 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c bool mode = afe_priv->soc->has_one_heart_mode; soc 271 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c bool mode = afe_priv->soc->has_one_heart_mode; soc 1341 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c afe_priv->soc = of_device_get_match_data(&pdev->dev); soc 1346 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c afe_priv->soc->i2s_num, soc 1394 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c for (i = 0; i < afe_priv->soc->i2s_num; i++) { soc 30 sound/soc/tegra/tegra_asoc_utils.c if (data->soc == TEGRA_ASOC_UTILS_SOC_TEGRA20) soc 32 sound/soc/tegra/tegra_asoc_utils.c else if (data->soc == TEGRA_ASOC_UTILS_SOC_TEGRA30) soc 43 sound/soc/tegra/tegra_asoc_utils.c if (data->soc == TEGRA_ASOC_UTILS_SOC_TEGRA20) soc 45 sound/soc/tegra/tegra_asoc_utils.c else if (data->soc == TEGRA_ASOC_UTILS_SOC_TEGRA30) soc 166 sound/soc/tegra/tegra_asoc_utils.c data->soc = TEGRA_ASOC_UTILS_SOC_TEGRA20; soc 168 sound/soc/tegra/tegra_asoc_utils.c data->soc = TEGRA_ASOC_UTILS_SOC_TEGRA30; soc 170 sound/soc/tegra/tegra_asoc_utils.c data->soc = TEGRA_ASOC_UTILS_SOC_TEGRA114; soc 172 sound/soc/tegra/tegra_asoc_utils.c data->soc = TEGRA_ASOC_UTILS_SOC_TEGRA124; soc 24 sound/soc/tegra/tegra_asoc_utils.h enum tegra_asoc_utils_soc soc;