smu8_ps 1039 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct smu8_power_state *smu8_ps = smu8_ps 1049 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->need_dfs_bypass = true; smu8_ps 1064 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->action = smu8_current_ps->action; smu8_ps 1070 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c else if (!force_high && (smu8_ps->action == FORCE_HIGH)) smu8_ps 1071 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->action = CANCEL_FORCE_HIGH; smu8_ps 1072 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c else if (force_high && (smu8_ps->action != FORCE_HIGH)) smu8_ps 1073 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->action = FORCE_HIGH; smu8_ps 1075 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->action = DO_NOTHING; smu8_ps 1301 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct smu8_power_state *smu8_ps; smu8_ps 1311 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps = cast_smu8_power_state(&ps->hardware); smu8_ps 1314 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c return smu8_ps->levels[0].engineClock; smu8_ps 1316 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c return smu8_ps->levels[smu8_ps->level-1].engineClock; smu8_ps 1323 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct smu8_power_state *smu8_ps = cast_smu8_power_state(hw_ps); smu8_ps 1325 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->level = 1; smu8_ps 1326 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->nbps_flags = 0; smu8_ps 1327 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->bapm_flags = 0; smu8_ps 1328 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->levels[0] = data->boot_power_level; smu8_ps 1339 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct smu8_power_state *smu8_ps = cast_smu8_power_state(hw_ps); smu8_ps 1350 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->levels[index].engineClock = table->entries[clock_info_index].clk; smu8_ps 1351 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->levels[index].vddcIndex = (uint8_t)table->entries[clock_info_index].v; smu8_ps 1353 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->level = index + 1; smu8_ps 1356 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->levels[index].dsDividerIndex = 5; smu8_ps 1357 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->levels[index].ssDividerIndex = 5; smu8_ps 1377 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct smu8_power_state *smu8_ps; smu8_ps 1381 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps = cast_smu8_power_state(&(ps->hardware)); smu8_ps 1386 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->uvd_clocks.vclk = ps->uvd_clocks.VCLK; smu8_ps 1387 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK;