smmu_domain 71 drivers/iommu/arm-smmu-impl.c static int cavium_init_context(struct arm_smmu_domain *smmu_domain) smmu_domain 73 drivers/iommu/arm-smmu-impl.c struct cavium_smmu *cs = container_of(smmu_domain->smmu, smmu_domain 76 drivers/iommu/arm-smmu-impl.c if (smmu_domain->stage == ARM_SMMU_DOMAIN_S2) smmu_domain 77 drivers/iommu/arm-smmu-impl.c smmu_domain->cfg.vmid += cs->id_base; smmu_domain 79 drivers/iommu/arm-smmu-impl.c smmu_domain->cfg.asid += cs->id_base; smmu_domain 1543 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = NULL; smmu_domain 1552 drivers/iommu/arm-smmu-v3.c smmu_domain = master->domain; smmu_domain 1556 drivers/iommu/arm-smmu-v3.c if (smmu_domain) { smmu_domain 1557 drivers/iommu/arm-smmu-v3.c switch (smmu_domain->stage) { smmu_domain 1559 drivers/iommu/arm-smmu-v3.c s1_cfg = &smmu_domain->s1_cfg; smmu_domain 1563 drivers/iommu/arm-smmu-v3.c s2_cfg = &smmu_domain->s2_cfg; smmu_domain 1590 drivers/iommu/arm-smmu-v3.c if (!smmu_domain || !(s1_cfg || s2_cfg)) { smmu_domain 1591 drivers/iommu/arm-smmu-v3.c if (!smmu_domain && disable_bypass) smmu_domain 1921 drivers/iommu/arm-smmu-v3.c static int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, smmu_domain 1929 drivers/iommu/arm-smmu-v3.c if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_ATS)) smmu_domain 1946 drivers/iommu/arm-smmu-v3.c if (!atomic_read(&smmu_domain->nr_ats_masters)) smmu_domain 1951 drivers/iommu/arm-smmu-v3.c spin_lock_irqsave(&smmu_domain->devices_lock, flags); smmu_domain 1952 drivers/iommu/arm-smmu-v3.c list_for_each_entry(master, &smmu_domain->devices, domain_head) smmu_domain 1954 drivers/iommu/arm-smmu-v3.c spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); smmu_domain 1962 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = cookie; smmu_domain 1963 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 1966 drivers/iommu/arm-smmu-v3.c if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { smmu_domain 1968 drivers/iommu/arm-smmu-v3.c cmd.tlbi.asid = smmu_domain->s1_cfg.cd.asid; smmu_domain 1972 drivers/iommu/arm-smmu-v3.c cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; smmu_domain 1984 drivers/iommu/arm-smmu-v3.c arm_smmu_atc_inv_domain(smmu_domain, 0, 0, 0); smmu_domain 1989 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain) smmu_domain 1992 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 2004 drivers/iommu/arm-smmu-v3.c if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { smmu_domain 2006 drivers/iommu/arm-smmu-v3.c cmd.tlbi.asid = smmu_domain->s1_cfg.cd.asid; smmu_domain 2009 drivers/iommu/arm-smmu-v3.c cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; smmu_domain 2030 drivers/iommu/arm-smmu-v3.c arm_smmu_atc_inv_domain(smmu_domain, 0, start, size); smmu_domain 2037 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = cookie; smmu_domain 2038 drivers/iommu/arm-smmu-v3.c struct iommu_domain *domain = &smmu_domain->domain; smmu_domain 2077 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain; smmu_domain 2089 drivers/iommu/arm-smmu-v3.c smmu_domain = kzalloc(sizeof(*smmu_domain), GFP_KERNEL); smmu_domain 2090 drivers/iommu/arm-smmu-v3.c if (!smmu_domain) smmu_domain 2094 drivers/iommu/arm-smmu-v3.c iommu_get_dma_cookie(&smmu_domain->domain)) { smmu_domain 2095 drivers/iommu/arm-smmu-v3.c kfree(smmu_domain); smmu_domain 2099 drivers/iommu/arm-smmu-v3.c mutex_init(&smmu_domain->init_mutex); smmu_domain 2100 drivers/iommu/arm-smmu-v3.c INIT_LIST_HEAD(&smmu_domain->devices); smmu_domain 2101 drivers/iommu/arm-smmu-v3.c spin_lock_init(&smmu_domain->devices_lock); smmu_domain 2103 drivers/iommu/arm-smmu-v3.c return &smmu_domain->domain; smmu_domain 2126 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 2127 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 2130 drivers/iommu/arm-smmu-v3.c free_io_pgtable_ops(smmu_domain->pgtbl_ops); smmu_domain 2133 drivers/iommu/arm-smmu-v3.c if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { smmu_domain 2134 drivers/iommu/arm-smmu-v3.c struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg; smmu_domain 2137 drivers/iommu/arm-smmu-v3.c dmam_free_coherent(smmu_domain->smmu->dev, smmu_domain 2145 drivers/iommu/arm-smmu-v3.c struct arm_smmu_s2_cfg *cfg = &smmu_domain->s2_cfg; smmu_domain 2150 drivers/iommu/arm-smmu-v3.c kfree(smmu_domain); smmu_domain 2153 drivers/iommu/arm-smmu-v3.c static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, smmu_domain 2158 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 2159 drivers/iommu/arm-smmu-v3.c struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg; smmu_domain 2185 drivers/iommu/arm-smmu-v3.c static int arm_smmu_domain_finalise_s2(struct arm_smmu_domain *smmu_domain, smmu_domain 2189 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 2190 drivers/iommu/arm-smmu-v3.c struct arm_smmu_s2_cfg *cfg = &smmu_domain->s2_cfg; smmu_domain 2211 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 2212 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 2215 drivers/iommu/arm-smmu-v3.c smmu_domain->stage = ARM_SMMU_DOMAIN_BYPASS; smmu_domain 2221 drivers/iommu/arm-smmu-v3.c smmu_domain->stage = ARM_SMMU_DOMAIN_S2; smmu_domain 2223 drivers/iommu/arm-smmu-v3.c smmu_domain->stage = ARM_SMMU_DOMAIN_S1; smmu_domain 2225 drivers/iommu/arm-smmu-v3.c switch (smmu_domain->stage) { smmu_domain 2253 drivers/iommu/arm-smmu-v3.c if (smmu_domain->non_strict) smmu_domain 2256 drivers/iommu/arm-smmu-v3.c pgtbl_ops = alloc_io_pgtable_ops(fmt, &pgtbl_cfg, smmu_domain); smmu_domain 2264 drivers/iommu/arm-smmu-v3.c ret = finalise_stage_fn(smmu_domain, &pgtbl_cfg); smmu_domain 2270 drivers/iommu/arm-smmu-v3.c smmu_domain->pgtbl_ops = pgtbl_ops; smmu_domain 2342 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = master->domain; smmu_domain 2352 drivers/iommu/arm-smmu-v3.c atomic_inc(&smmu_domain->nr_ats_masters); smmu_domain 2353 drivers/iommu/arm-smmu-v3.c arm_smmu_atc_inv_domain(smmu_domain, 0, 0, 0); smmu_domain 2361 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = master->domain; smmu_domain 2374 drivers/iommu/arm-smmu-v3.c atomic_dec(&smmu_domain->nr_ats_masters); smmu_domain 2380 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = master->domain; smmu_domain 2382 drivers/iommu/arm-smmu-v3.c if (!smmu_domain) smmu_domain 2387 drivers/iommu/arm-smmu-v3.c spin_lock_irqsave(&smmu_domain->devices_lock, flags); smmu_domain 2389 drivers/iommu/arm-smmu-v3.c spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); smmu_domain 2402 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 2413 drivers/iommu/arm-smmu-v3.c mutex_lock(&smmu_domain->init_mutex); smmu_domain 2415 drivers/iommu/arm-smmu-v3.c if (!smmu_domain->smmu) { smmu_domain 2416 drivers/iommu/arm-smmu-v3.c smmu_domain->smmu = smmu; smmu_domain 2419 drivers/iommu/arm-smmu-v3.c smmu_domain->smmu = NULL; smmu_domain 2422 drivers/iommu/arm-smmu-v3.c } else if (smmu_domain->smmu != smmu) { smmu_domain 2425 drivers/iommu/arm-smmu-v3.c dev_name(smmu_domain->smmu->dev), smmu_domain 2431 drivers/iommu/arm-smmu-v3.c master->domain = smmu_domain; smmu_domain 2433 drivers/iommu/arm-smmu-v3.c if (smmu_domain->stage != ARM_SMMU_DOMAIN_BYPASS) smmu_domain 2436 drivers/iommu/arm-smmu-v3.c if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) smmu_domain 2437 drivers/iommu/arm-smmu-v3.c arm_smmu_write_ctx_desc(smmu, &smmu_domain->s1_cfg); smmu_domain 2441 drivers/iommu/arm-smmu-v3.c spin_lock_irqsave(&smmu_domain->devices_lock, flags); smmu_domain 2442 drivers/iommu/arm-smmu-v3.c list_add(&master->domain_head, &smmu_domain->devices); smmu_domain 2443 drivers/iommu/arm-smmu-v3.c spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); smmu_domain 2448 drivers/iommu/arm-smmu-v3.c mutex_unlock(&smmu_domain->init_mutex); smmu_domain 2466 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 2467 drivers/iommu/arm-smmu-v3.c struct io_pgtable_ops *ops = smmu_domain->pgtbl_ops; smmu_domain 2477 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 2479 drivers/iommu/arm-smmu-v3.c if (smmu_domain->smmu) smmu_domain 2480 drivers/iommu/arm-smmu-v3.c arm_smmu_tlb_inv_context(smmu_domain); smmu_domain 2486 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 2489 drivers/iommu/arm-smmu-v3.c gather->pgsize, true, smmu_domain); smmu_domain 2624 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 2630 drivers/iommu/arm-smmu-v3.c *(int *)data = (smmu_domain->stage == ARM_SMMU_DOMAIN_NESTED); smmu_domain 2639 drivers/iommu/arm-smmu-v3.c *(int *)data = smmu_domain->non_strict; smmu_domain 2654 drivers/iommu/arm-smmu-v3.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 2656 drivers/iommu/arm-smmu-v3.c mutex_lock(&smmu_domain->init_mutex); smmu_domain 2662 drivers/iommu/arm-smmu-v3.c if (smmu_domain->smmu) { smmu_domain 2668 drivers/iommu/arm-smmu-v3.c smmu_domain->stage = ARM_SMMU_DOMAIN_NESTED; smmu_domain 2670 drivers/iommu/arm-smmu-v3.c smmu_domain->stage = ARM_SMMU_DOMAIN_S1; smmu_domain 2679 drivers/iommu/arm-smmu-v3.c smmu_domain->non_strict = *(int *)data; smmu_domain 2690 drivers/iommu/arm-smmu-v3.c mutex_unlock(&smmu_domain->init_mutex); smmu_domain 273 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = cookie; smmu_domain 274 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 277 drivers/iommu/arm-smmu.c spin_lock_irqsave(&smmu_domain->cb_lock, flags); smmu_domain 278 drivers/iommu/arm-smmu.c __arm_smmu_tlb_sync(smmu, ARM_SMMU_CB(smmu, smmu_domain->cfg.cbndx), smmu_domain 280 drivers/iommu/arm-smmu.c spin_unlock_irqrestore(&smmu_domain->cb_lock, flags); smmu_domain 285 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = cookie; smmu_domain 287 drivers/iommu/arm-smmu.c arm_smmu_tlb_sync_global(smmu_domain->smmu); smmu_domain 292 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = cookie; smmu_domain 298 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu_domain->smmu, smmu_domain->cfg.cbndx, smmu_domain 299 drivers/iommu/arm-smmu.c ARM_SMMU_CB_S1_TLBIASID, smmu_domain->cfg.asid); smmu_domain 305 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = cookie; smmu_domain 306 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 310 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIVMID, smmu_domain->cfg.vmid); smmu_domain 317 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = cookie; smmu_domain 318 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 319 drivers/iommu/arm-smmu.c struct arm_smmu_cfg *cfg = &smmu_domain->cfg; smmu_domain 347 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = cookie; smmu_domain 348 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 349 drivers/iommu/arm-smmu.c int reg, idx = smmu_domain->cfg.cbndx; smmu_domain 357 drivers/iommu/arm-smmu.c if (smmu_domain->cfg.fmt == ARM_SMMU_CTX_FMT_AARCH64) smmu_domain 374 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = cookie; smmu_domain 375 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 380 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIVMID, smmu_domain->cfg.vmid); smmu_domain 386 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = cookie; smmu_domain 387 drivers/iommu/arm-smmu.c const struct arm_smmu_flush_ops *ops = smmu_domain->flush_ops; smmu_domain 396 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = cookie; smmu_domain 397 drivers/iommu/arm-smmu.c const struct arm_smmu_flush_ops *ops = smmu_domain->flush_ops; smmu_domain 407 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = cookie; smmu_domain 408 drivers/iommu/arm-smmu.c const struct arm_smmu_flush_ops *ops = smmu_domain->flush_ops; smmu_domain 451 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 452 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 453 drivers/iommu/arm-smmu.c int idx = smmu_domain->cfg.cbndx; smmu_domain 494 drivers/iommu/arm-smmu.c static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain, smmu_domain 497 drivers/iommu/arm-smmu.c struct arm_smmu_cfg *cfg = &smmu_domain->cfg; smmu_domain 498 drivers/iommu/arm-smmu.c struct arm_smmu_cb *cb = &smmu_domain->smmu->cbs[cfg->cbndx]; smmu_domain 636 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 637 drivers/iommu/arm-smmu.c struct arm_smmu_cfg *cfg = &smmu_domain->cfg; smmu_domain 639 drivers/iommu/arm-smmu.c mutex_lock(&smmu_domain->init_mutex); smmu_domain 640 drivers/iommu/arm-smmu.c if (smmu_domain->smmu) smmu_domain 644 drivers/iommu/arm-smmu.c smmu_domain->stage = ARM_SMMU_DOMAIN_BYPASS; smmu_domain 645 drivers/iommu/arm-smmu.c smmu_domain->smmu = smmu; smmu_domain 668 drivers/iommu/arm-smmu.c smmu_domain->stage = ARM_SMMU_DOMAIN_S2; smmu_domain 670 drivers/iommu/arm-smmu.c smmu_domain->stage = ARM_SMMU_DOMAIN_S1; smmu_domain 685 drivers/iommu/arm-smmu.c (smmu_domain->stage == ARM_SMMU_DOMAIN_S1)) smmu_domain 698 drivers/iommu/arm-smmu.c switch (smmu_domain->stage) { smmu_domain 715 drivers/iommu/arm-smmu.c smmu_domain->flush_ops = &arm_smmu_s1_tlb_ops; smmu_domain 735 drivers/iommu/arm-smmu.c smmu_domain->flush_ops = &arm_smmu_s2_tlb_ops_v2; smmu_domain 737 drivers/iommu/arm-smmu.c smmu_domain->flush_ops = &arm_smmu_s2_tlb_ops_v1; smmu_domain 756 drivers/iommu/arm-smmu.c if (smmu_domain->stage == ARM_SMMU_DOMAIN_S2) smmu_domain 761 drivers/iommu/arm-smmu.c smmu_domain->smmu = smmu; smmu_domain 763 drivers/iommu/arm-smmu.c ret = smmu->impl->init_context(smmu_domain); smmu_domain 773 drivers/iommu/arm-smmu.c .tlb = &smmu_domain->flush_ops->tlb, smmu_domain 777 drivers/iommu/arm-smmu.c if (smmu_domain->non_strict) smmu_domain 780 drivers/iommu/arm-smmu.c pgtbl_ops = alloc_io_pgtable_ops(fmt, &pgtbl_cfg, smmu_domain); smmu_domain 792 drivers/iommu/arm-smmu.c arm_smmu_init_context_bank(smmu_domain, &pgtbl_cfg); smmu_domain 808 drivers/iommu/arm-smmu.c mutex_unlock(&smmu_domain->init_mutex); smmu_domain 811 drivers/iommu/arm-smmu.c smmu_domain->pgtbl_ops = pgtbl_ops; smmu_domain 816 drivers/iommu/arm-smmu.c smmu_domain->smmu = NULL; smmu_domain 818 drivers/iommu/arm-smmu.c mutex_unlock(&smmu_domain->init_mutex); smmu_domain 824 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 825 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 826 drivers/iommu/arm-smmu.c struct arm_smmu_cfg *cfg = &smmu_domain->cfg; smmu_domain 848 drivers/iommu/arm-smmu.c free_io_pgtable_ops(smmu_domain->pgtbl_ops); smmu_domain 856 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain; smmu_domain 867 drivers/iommu/arm-smmu.c smmu_domain = kzalloc(sizeof(*smmu_domain), GFP_KERNEL); smmu_domain 868 drivers/iommu/arm-smmu.c if (!smmu_domain) smmu_domain 872 drivers/iommu/arm-smmu.c iommu_get_dma_cookie(&smmu_domain->domain))) { smmu_domain 873 drivers/iommu/arm-smmu.c kfree(smmu_domain); smmu_domain 877 drivers/iommu/arm-smmu.c mutex_init(&smmu_domain->init_mutex); smmu_domain 878 drivers/iommu/arm-smmu.c spin_lock_init(&smmu_domain->cb_lock); smmu_domain 880 drivers/iommu/arm-smmu.c return &smmu_domain->domain; smmu_domain 885 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 893 drivers/iommu/arm-smmu.c kfree(smmu_domain); smmu_domain 1083 drivers/iommu/arm-smmu.c static int arm_smmu_domain_add_master(struct arm_smmu_domain *smmu_domain, smmu_domain 1086 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 1088 drivers/iommu/arm-smmu.c u8 cbndx = smmu_domain->cfg.cbndx; smmu_domain 1092 drivers/iommu/arm-smmu.c if (smmu_domain->stage == ARM_SMMU_DOMAIN_BYPASS) smmu_domain 1114 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 1146 drivers/iommu/arm-smmu.c if (smmu_domain->smmu != smmu) { smmu_domain 1149 drivers/iommu/arm-smmu.c dev_name(smmu_domain->smmu->dev), dev_name(smmu->dev)); smmu_domain 1155 drivers/iommu/arm-smmu.c ret = arm_smmu_domain_add_master(smmu_domain, fwspec); smmu_domain 1198 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 1199 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 1201 drivers/iommu/arm-smmu.c if (smmu_domain->flush_ops) { smmu_domain 1203 drivers/iommu/arm-smmu.c smmu_domain->flush_ops->tlb.tlb_flush_all(smmu_domain); smmu_domain 1211 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 1212 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 1214 drivers/iommu/arm-smmu.c if (smmu_domain->flush_ops) { smmu_domain 1216 drivers/iommu/arm-smmu.c smmu_domain->flush_ops->tlb_sync(smmu_domain); smmu_domain 1224 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 1225 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu_domain 1226 drivers/iommu/arm-smmu.c struct arm_smmu_cfg *cfg = &smmu_domain->cfg; smmu_domain 1227 drivers/iommu/arm-smmu.c struct io_pgtable_ops *ops= smmu_domain->pgtbl_ops; smmu_domain 1239 drivers/iommu/arm-smmu.c spin_lock_irqsave(&smmu_domain->cb_lock, flags); smmu_domain 1248 drivers/iommu/arm-smmu.c spin_unlock_irqrestore(&smmu_domain->cb_lock, flags); smmu_domain 1256 drivers/iommu/arm-smmu.c spin_unlock_irqrestore(&smmu_domain->cb_lock, flags); smmu_domain 1271 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 1272 drivers/iommu/arm-smmu.c struct io_pgtable_ops *ops = smmu_domain->pgtbl_ops; smmu_domain 1280 drivers/iommu/arm-smmu.c if (smmu_domain->smmu->features & ARM_SMMU_FEAT_TRANS_OPS && smmu_domain 1281 drivers/iommu/arm-smmu.c smmu_domain->stage == ARM_SMMU_DOMAIN_S1) smmu_domain 1446 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 1452 drivers/iommu/arm-smmu.c *(int *)data = (smmu_domain->stage == ARM_SMMU_DOMAIN_NESTED); smmu_domain 1461 drivers/iommu/arm-smmu.c *(int *)data = smmu_domain->non_strict; smmu_domain 1476 drivers/iommu/arm-smmu.c struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); smmu_domain 1478 drivers/iommu/arm-smmu.c mutex_lock(&smmu_domain->init_mutex); smmu_domain 1484 drivers/iommu/arm-smmu.c if (smmu_domain->smmu) { smmu_domain 1490 drivers/iommu/arm-smmu.c smmu_domain->stage = ARM_SMMU_DOMAIN_NESTED; smmu_domain 1492 drivers/iommu/arm-smmu.c smmu_domain->stage = ARM_SMMU_DOMAIN_S1; smmu_domain 1501 drivers/iommu/arm-smmu.c smmu_domain->non_strict = *(int *)data; smmu_domain 1511 drivers/iommu/arm-smmu.c mutex_unlock(&smmu_domain->init_mutex); smmu_domain 337 drivers/iommu/arm-smmu.h int (*init_context)(struct arm_smmu_domain *smmu_domain);