smmu 363 drivers/acpi/arm64/iort.c struct acpi_iort_smmu_v3 *smmu; smmu 374 drivers/acpi/arm64/iort.c smmu = (struct acpi_iort_smmu_v3 *)node->node_data; smmu 379 drivers/acpi/arm64/iort.c if (smmu->event_gsiv && smmu->pri_gsiv && smmu->gerr_gsiv smmu 380 drivers/acpi/arm64/iort.c && smmu->sync_gsiv) smmu 383 drivers/acpi/arm64/iort.c if (smmu->id_mapping_index >= node->mapping_count) { smmu 389 drivers/acpi/arm64/iort.c return smmu->id_mapping_index; smmu 757 drivers/acpi/arm64/iort.c struct acpi_iort_smmu_v3 *smmu; smmu 759 drivers/acpi/arm64/iort.c smmu = (struct acpi_iort_smmu_v3 *)iommu->node_data; smmu 760 drivers/acpi/arm64/iort.c if (smmu->model == ACPI_IORT_SMMU_V3_HISILICON_HI161X) smmu 1133 drivers/acpi/arm64/iort.c struct acpi_iort_smmu_v3 *smmu; smmu 1138 drivers/acpi/arm64/iort.c smmu = (struct acpi_iort_smmu_v3 *)node->node_data; smmu 1140 drivers/acpi/arm64/iort.c if (smmu->event_gsiv) smmu 1143 drivers/acpi/arm64/iort.c if (smmu->pri_gsiv) smmu 1146 drivers/acpi/arm64/iort.c if (smmu->gerr_gsiv) smmu 1149 drivers/acpi/arm64/iort.c if (smmu->sync_gsiv) smmu 1155 drivers/acpi/arm64/iort.c static bool arm_smmu_v3_is_combined_irq(struct acpi_iort_smmu_v3 *smmu) smmu 1161 drivers/acpi/arm64/iort.c if (smmu->model != ACPI_IORT_SMMU_V3_CAVIUM_CN99XX) smmu 1168 drivers/acpi/arm64/iort.c return smmu->event_gsiv == smmu->pri_gsiv && smmu 1169 drivers/acpi/arm64/iort.c smmu->event_gsiv == smmu->gerr_gsiv && smmu 1170 drivers/acpi/arm64/iort.c smmu->event_gsiv == smmu->sync_gsiv; smmu 1173 drivers/acpi/arm64/iort.c static unsigned long arm_smmu_v3_resource_size(struct acpi_iort_smmu_v3 *smmu) smmu 1179 drivers/acpi/arm64/iort.c if (smmu->model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX) smmu 1188 drivers/acpi/arm64/iort.c struct acpi_iort_smmu_v3 *smmu; smmu 1192 drivers/acpi/arm64/iort.c smmu = (struct acpi_iort_smmu_v3 *)node->node_data; smmu 1194 drivers/acpi/arm64/iort.c res[num_res].start = smmu->base_address; smmu 1195 drivers/acpi/arm64/iort.c res[num_res].end = smmu->base_address + smmu 1196 drivers/acpi/arm64/iort.c arm_smmu_v3_resource_size(smmu) - 1; smmu 1200 drivers/acpi/arm64/iort.c if (arm_smmu_v3_is_combined_irq(smmu)) { smmu 1201 drivers/acpi/arm64/iort.c if (smmu->event_gsiv) smmu 1202 drivers/acpi/arm64/iort.c acpi_iort_register_irq(smmu->event_gsiv, "combined", smmu 1207 drivers/acpi/arm64/iort.c if (smmu->event_gsiv) smmu 1208 drivers/acpi/arm64/iort.c acpi_iort_register_irq(smmu->event_gsiv, "eventq", smmu 1212 drivers/acpi/arm64/iort.c if (smmu->pri_gsiv) smmu 1213 drivers/acpi/arm64/iort.c acpi_iort_register_irq(smmu->pri_gsiv, "priq", smmu 1217 drivers/acpi/arm64/iort.c if (smmu->gerr_gsiv) smmu 1218 drivers/acpi/arm64/iort.c acpi_iort_register_irq(smmu->gerr_gsiv, "gerror", smmu 1222 drivers/acpi/arm64/iort.c if (smmu->sync_gsiv) smmu 1223 drivers/acpi/arm64/iort.c acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync", smmu 1232 drivers/acpi/arm64/iort.c struct acpi_iort_smmu_v3 *smmu; smmu 1236 drivers/acpi/arm64/iort.c smmu = (struct acpi_iort_smmu_v3 *)node->node_data; smmu 1238 drivers/acpi/arm64/iort.c attr = (smmu->flags & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE) ? smmu 1255 drivers/acpi/arm64/iort.c struct acpi_iort_smmu_v3 *smmu; smmu 1257 drivers/acpi/arm64/iort.c smmu = (struct acpi_iort_smmu_v3 *)node->node_data; smmu 1258 drivers/acpi/arm64/iort.c if (smmu->flags & ACPI_IORT_SMMU_V3_PXM_VALID) { smmu 1259 drivers/acpi/arm64/iort.c int dev_node = acpi_map_pxm_to_node(smmu->pxm); smmu 1266 drivers/acpi/arm64/iort.c smmu->base_address, smmu 1267 drivers/acpi/arm64/iort.c smmu->pxm); smmu 1277 drivers/acpi/arm64/iort.c struct acpi_iort_smmu *smmu; smmu 1280 drivers/acpi/arm64/iort.c smmu = (struct acpi_iort_smmu *)node->node_data; smmu 1290 drivers/acpi/arm64/iort.c return smmu->context_interrupt_count + 2; smmu 1296 drivers/acpi/arm64/iort.c struct acpi_iort_smmu *smmu; smmu 1301 drivers/acpi/arm64/iort.c smmu = (struct acpi_iort_smmu *)node->node_data; smmu 1303 drivers/acpi/arm64/iort.c res[num_res].start = smmu->base_address; smmu 1304 drivers/acpi/arm64/iort.c res[num_res].end = smmu->base_address + smmu->span - 1; smmu 1308 drivers/acpi/arm64/iort.c glb_irq = ACPI_ADD_PTR(u64, node, smmu->global_interrupt_offset); smmu 1317 drivers/acpi/arm64/iort.c ctx_irq = ACPI_ADD_PTR(u64, node, smmu->context_interrupt_offset); smmu 1318 drivers/acpi/arm64/iort.c for (i = 0; i < smmu->context_interrupt_count; i++) { smmu 1330 drivers/acpi/arm64/iort.c struct acpi_iort_smmu *smmu; smmu 1334 drivers/acpi/arm64/iort.c smmu = (struct acpi_iort_smmu *)node->node_data; smmu 1336 drivers/acpi/arm64/iort.c attr = (smmu->flags & ACPI_IORT_SMMU_COHERENT_WALK) ? smmu 28 drivers/iommu/arm-smmu-impl.c static u32 arm_smmu_read_ns(struct arm_smmu_device *smmu, int page, smmu 33 drivers/iommu/arm-smmu-impl.c return readl_relaxed(arm_smmu_page(smmu, page) + offset); smmu 36 drivers/iommu/arm-smmu-impl.c static void arm_smmu_write_ns(struct arm_smmu_device *smmu, int page, smmu 41 drivers/iommu/arm-smmu-impl.c writel_relaxed(val, arm_smmu_page(smmu, page) + offset); smmu 52 drivers/iommu/arm-smmu-impl.c struct arm_smmu_device smmu; smmu 56 drivers/iommu/arm-smmu-impl.c static int cavium_cfg_probe(struct arm_smmu_device *smmu) smmu 59 drivers/iommu/arm-smmu-impl.c struct cavium_smmu *cs = container_of(smmu, struct cavium_smmu, smmu); smmu 65 drivers/iommu/arm-smmu-impl.c cs->id_base = atomic_fetch_add(smmu->num_context_banks, &context_count); smmu 66 drivers/iommu/arm-smmu-impl.c dev_notice(smmu->dev, "\tenabling workaround for Cavium erratum 27704\n"); smmu 73 drivers/iommu/arm-smmu-impl.c struct cavium_smmu *cs = container_of(smmu_domain->smmu, smmu 74 drivers/iommu/arm-smmu-impl.c struct cavium_smmu, smmu); smmu 89 drivers/iommu/arm-smmu-impl.c static struct arm_smmu_device *cavium_smmu_impl_init(struct arm_smmu_device *smmu) smmu 93 drivers/iommu/arm-smmu-impl.c cs = devm_kzalloc(smmu->dev, sizeof(*cs), GFP_KERNEL); smmu 97 drivers/iommu/arm-smmu-impl.c cs->smmu = *smmu; smmu 98 drivers/iommu/arm-smmu-impl.c cs->smmu.impl = &cavium_impl; smmu 100 drivers/iommu/arm-smmu-impl.c devm_kfree(smmu->dev, smmu); smmu 102 drivers/iommu/arm-smmu-impl.c return &cs->smmu; smmu 112 drivers/iommu/arm-smmu-impl.c static int arm_mmu500_reset(struct arm_smmu_device *smmu) smmu 121 drivers/iommu/arm-smmu-impl.c reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_ID7); smmu 123 drivers/iommu/arm-smmu-impl.c reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sACR); smmu 131 drivers/iommu/arm-smmu-impl.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sACR, reg); smmu 137 drivers/iommu/arm-smmu-impl.c for (i = 0; i < smmu->num_context_banks; ++i) { smmu 138 drivers/iommu/arm-smmu-impl.c reg = arm_smmu_cb_read(smmu, i, ARM_SMMU_CB_ACTLR); smmu 140 drivers/iommu/arm-smmu-impl.c arm_smmu_cb_write(smmu, i, ARM_SMMU_CB_ACTLR, reg); smmu 151 drivers/iommu/arm-smmu-impl.c struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) smmu 159 drivers/iommu/arm-smmu-impl.c switch (smmu->model) { smmu 161 drivers/iommu/arm-smmu-impl.c smmu->impl = &arm_mmu500_impl; smmu 164 drivers/iommu/arm-smmu-impl.c return cavium_smmu_impl_init(smmu); smmu 169 drivers/iommu/arm-smmu-impl.c if (of_property_read_bool(smmu->dev->of_node, smmu 171 drivers/iommu/arm-smmu-impl.c smmu->impl = &calxeda_impl; smmu 173 drivers/iommu/arm-smmu-impl.c return smmu; smmu 634 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu; smmu 652 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu; smmu 683 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu) smmu 686 drivers/iommu/arm-smmu-v3.c (smmu->options & ARM_SMMU_OPT_PAGE0_REGS_ONLY)) smmu 689 drivers/iommu/arm-smmu-v3.c return smmu->base + offset; smmu 697 drivers/iommu/arm-smmu-v3.c static void parse_driver_options(struct arm_smmu_device *smmu) smmu 702 drivers/iommu/arm-smmu-v3.c if (of_property_read_bool(smmu->dev->of_node, smmu 704 drivers/iommu/arm-smmu-v3.c smmu->options |= arm_smmu_options[i].opt; smmu 705 drivers/iommu/arm-smmu-v3.c dev_notice(smmu->dev, "option %s\n", smmu 781 drivers/iommu/arm-smmu-v3.c static void queue_poll_init(struct arm_smmu_device *smmu, smmu 786 drivers/iommu/arm-smmu-v3.c qp->wfe = !!(smmu->features & ARM_SMMU_FEAT_SEV); smmu 915 drivers/iommu/arm-smmu-v3.c static void arm_smmu_cmdq_build_sync_cmd(u64 *cmd, struct arm_smmu_device *smmu, smmu 918 drivers/iommu/arm-smmu-v3.c struct arm_smmu_queue *q = &smmu->cmdq.q; smmu 927 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_MSI && smmu 928 drivers/iommu/arm-smmu-v3.c smmu->features & ARM_SMMU_FEAT_COHERENCY) { smmu 936 drivers/iommu/arm-smmu-v3.c static void arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu) smmu 947 drivers/iommu/arm-smmu-v3.c struct arm_smmu_queue *q = &smmu->cmdq.q; smmu 954 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "CMDQ error (cons 0x%08x): %s\n", cons, smmu 959 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "retrying command fetch\n"); smmu 981 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "skipping command in error state:\n"); smmu 983 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "\t0x%016llx\n", (unsigned long long)cmd[i]); smmu 987 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "failed to convert to CMD_SYNC\n"); smmu 1155 drivers/iommu/arm-smmu-v3.c static int arm_smmu_cmdq_poll_until_not_full(struct arm_smmu_device *smmu, smmu 1160 drivers/iommu/arm-smmu-v3.c struct arm_smmu_cmdq *cmdq = &smmu->cmdq; smmu 1174 drivers/iommu/arm-smmu-v3.c queue_poll_init(smmu, &qp); smmu 1176 drivers/iommu/arm-smmu-v3.c llq->val = READ_ONCE(smmu->cmdq.q.llq.val); smmu 1190 drivers/iommu/arm-smmu-v3.c static int __arm_smmu_cmdq_poll_until_msi(struct arm_smmu_device *smmu, smmu 1195 drivers/iommu/arm-smmu-v3.c struct arm_smmu_cmdq *cmdq = &smmu->cmdq; smmu 1198 drivers/iommu/arm-smmu-v3.c queue_poll_init(smmu, &qp); smmu 1214 drivers/iommu/arm-smmu-v3.c static int __arm_smmu_cmdq_poll_until_consumed(struct arm_smmu_device *smmu, smmu 1218 drivers/iommu/arm-smmu-v3.c struct arm_smmu_cmdq *cmdq = &smmu->cmdq; smmu 1222 drivers/iommu/arm-smmu-v3.c queue_poll_init(smmu, &qp); smmu 1223 drivers/iommu/arm-smmu-v3.c llq->val = READ_ONCE(smmu->cmdq.q.llq.val); smmu 1264 drivers/iommu/arm-smmu-v3.c static int arm_smmu_cmdq_poll_until_sync(struct arm_smmu_device *smmu, smmu 1267 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_MSI && smmu 1268 drivers/iommu/arm-smmu-v3.c smmu->features & ARM_SMMU_FEAT_COHERENCY) smmu 1269 drivers/iommu/arm-smmu-v3.c return __arm_smmu_cmdq_poll_until_msi(smmu, llq); smmu 1271 drivers/iommu/arm-smmu-v3.c return __arm_smmu_cmdq_poll_until_consumed(smmu, llq); smmu 1307 drivers/iommu/arm-smmu-v3.c static int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu, smmu 1314 drivers/iommu/arm-smmu-v3.c struct arm_smmu_cmdq *cmdq = &smmu->cmdq; smmu 1328 drivers/iommu/arm-smmu-v3.c if (arm_smmu_cmdq_poll_until_not_full(smmu, &llq)) smmu 1329 drivers/iommu/arm-smmu-v3.c dev_err_ratelimited(smmu->dev, "CMDQ timeout\n"); smmu 1354 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_build_sync_cmd(cmd_sync, smmu, prod); smmu 1404 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_cmdq_poll_until_sync(smmu, &llq); smmu 1406 drivers/iommu/arm-smmu-v3.c dev_err_ratelimited(smmu->dev, smmu 1427 drivers/iommu/arm-smmu-v3.c static int arm_smmu_cmdq_issue_cmd(struct arm_smmu_device *smmu, smmu 1433 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "ignoring unknown CMDQ opcode 0x%x\n", smmu 1438 drivers/iommu/arm-smmu-v3.c return arm_smmu_cmdq_issue_cmdlist(smmu, cmd, 1, false); smmu 1441 drivers/iommu/arm-smmu-v3.c static int arm_smmu_cmdq_issue_sync(struct arm_smmu_device *smmu) smmu 1443 drivers/iommu/arm-smmu-v3.c return arm_smmu_cmdq_issue_cmdlist(smmu, NULL, 0, true); smmu 1464 drivers/iommu/arm-smmu-v3.c static void arm_smmu_write_ctx_desc(struct arm_smmu_device *smmu, smmu 1482 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_STALL_FORCE) smmu 1505 drivers/iommu/arm-smmu-v3.c static void arm_smmu_sync_ste_for_sid(struct arm_smmu_device *smmu, u32 sid) smmu 1515 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_cmd(smmu, &cmd); smmu 1516 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_sync(smmu); smmu 1540 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = NULL; smmu 1553 drivers/iommu/arm-smmu-v3.c smmu = master->smmu; smmu 1604 drivers/iommu/arm-smmu-v3.c if (smmu) smmu 1605 drivers/iommu/arm-smmu-v3.c arm_smmu_sync_ste_for_sid(smmu, sid); smmu 1617 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_STALLS && smmu 1618 drivers/iommu/arm-smmu-v3.c !(smmu->features & ARM_SMMU_FEAT_STALL_FORCE)) smmu 1645 drivers/iommu/arm-smmu-v3.c arm_smmu_sync_ste_for_sid(smmu, sid); smmu 1648 drivers/iommu/arm-smmu-v3.c arm_smmu_sync_ste_for_sid(smmu, sid); smmu 1651 drivers/iommu/arm-smmu-v3.c if (!(smmu->options & ARM_SMMU_OPT_SKIP_PREFETCH)) smmu 1652 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_cmd(smmu, &prefetch_cmd); smmu 1665 drivers/iommu/arm-smmu-v3.c static int arm_smmu_init_l2_strtab(struct arm_smmu_device *smmu, u32 sid) smmu 1669 drivers/iommu/arm-smmu-v3.c struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; smmu 1679 drivers/iommu/arm-smmu-v3.c desc->l2ptr = dmam_alloc_coherent(smmu->dev, size, &desc->l2ptr_dma, smmu 1682 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, smmu 1697 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = dev; smmu 1698 drivers/iommu/arm-smmu-v3.c struct arm_smmu_queue *q = &smmu->evtq.q; smmu 1706 drivers/iommu/arm-smmu-v3.c dev_info(smmu->dev, "event 0x%02x received:\n", id); smmu 1708 drivers/iommu/arm-smmu-v3.c dev_info(smmu->dev, "\t0x%016llx\n", smmu 1718 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "EVTQ overflow detected -- events lost\n"); smmu 1727 drivers/iommu/arm-smmu-v3.c static void arm_smmu_handle_ppr(struct arm_smmu_device *smmu, u64 *evt) smmu 1739 drivers/iommu/arm-smmu-v3.c dev_info(smmu->dev, "unexpected PRI request received:\n"); smmu 1740 drivers/iommu/arm-smmu-v3.c dev_info(smmu->dev, smmu 1761 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_cmd(smmu, &cmd); smmu 1767 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = dev; smmu 1768 drivers/iommu/arm-smmu-v3.c struct arm_smmu_queue *q = &smmu->priq.q; smmu 1774 drivers/iommu/arm-smmu-v3.c arm_smmu_handle_ppr(smmu, evt); smmu 1777 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "PRIQ overflow detected -- requests lost\n"); smmu 1787 drivers/iommu/arm-smmu-v3.c static int arm_smmu_device_disable(struct arm_smmu_device *smmu); smmu 1792 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = dev; smmu 1794 drivers/iommu/arm-smmu-v3.c gerror = readl_relaxed(smmu->base + ARM_SMMU_GERROR); smmu 1795 drivers/iommu/arm-smmu-v3.c gerrorn = readl_relaxed(smmu->base + ARM_SMMU_GERRORN); smmu 1801 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, smmu 1806 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "device has entered Service Failure Mode!\n"); smmu 1807 drivers/iommu/arm-smmu-v3.c arm_smmu_device_disable(smmu); smmu 1811 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "GERROR MSI write aborted\n"); smmu 1814 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "PRIQ MSI write aborted\n"); smmu 1817 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "EVTQ MSI write aborted\n"); smmu 1820 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "CMDQ MSI write aborted\n"); smmu 1823 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "PRIQ write aborted -- events may have been lost\n"); smmu 1826 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "EVTQ write aborted -- events may have been lost\n"); smmu 1829 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_skip_err(smmu); smmu 1831 drivers/iommu/arm-smmu-v3.c writel(gerror, smmu->base + ARM_SMMU_GERRORN); smmu 1837 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = dev; smmu 1840 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_PRI) smmu 1915 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_cmd(master->smmu, cmd); smmu 1918 drivers/iommu/arm-smmu-v3.c return arm_smmu_cmdq_issue_sync(master->smmu); smmu 1929 drivers/iommu/arm-smmu-v3.c if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_ATS)) smmu 1963 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 1982 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_cmd(smmu, &cmd); smmu 1983 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_sync(smmu); smmu 1992 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 2014 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_cmdlist(smmu, cmds, i, false); smmu 2024 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_cmdlist(smmu, cmds, i, true); smmu 2127 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 2137 drivers/iommu/arm-smmu-v3.c dmam_free_coherent(smmu_domain->smmu->dev, smmu 2142 drivers/iommu/arm-smmu-v3.c arm_smmu_bitmap_free(smmu->asid_map, cfg->cd.asid); smmu 2147 drivers/iommu/arm-smmu-v3.c arm_smmu_bitmap_free(smmu->vmid_map, cfg->vmid); smmu 2158 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 2161 drivers/iommu/arm-smmu-v3.c asid = arm_smmu_bitmap_alloc(smmu->asid_map, smmu->asid_bits); smmu 2165 drivers/iommu/arm-smmu-v3.c cfg->cdptr = dmam_alloc_coherent(smmu->dev, CTXDESC_CD_DWORDS << 3, smmu 2169 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "failed to allocate context descriptor\n"); smmu 2181 drivers/iommu/arm-smmu-v3.c arm_smmu_bitmap_free(smmu->asid_map, asid); smmu 2189 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 2192 drivers/iommu/arm-smmu-v3.c vmid = arm_smmu_bitmap_alloc(smmu->vmid_map, smmu->vmid_bits); smmu 2212 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 2220 drivers/iommu/arm-smmu-v3.c if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S1)) smmu 2222 drivers/iommu/arm-smmu-v3.c if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S2)) smmu 2227 drivers/iommu/arm-smmu-v3.c ias = (smmu->features & ARM_SMMU_FEAT_VAX) ? 52 : 48; smmu 2229 drivers/iommu/arm-smmu-v3.c oas = smmu->ias; smmu 2235 drivers/iommu/arm-smmu-v3.c ias = smmu->ias; smmu 2236 drivers/iommu/arm-smmu-v3.c oas = smmu->oas; smmu 2245 drivers/iommu/arm-smmu-v3.c .pgsize_bitmap = smmu->pgsize_bitmap, smmu 2248 drivers/iommu/arm-smmu-v3.c .coherent_walk = smmu->features & ARM_SMMU_FEAT_COHERENCY, smmu 2250 drivers/iommu/arm-smmu-v3.c .iommu_dev = smmu->dev, smmu 2274 drivers/iommu/arm-smmu-v3.c static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid) smmu 2277 drivers/iommu/arm-smmu-v3.c struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; smmu 2279 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) { smmu 2299 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = master->smmu; smmu 2303 drivers/iommu/arm-smmu-v3.c __le64 *step = arm_smmu_get_step_for_sid(smmu, sid); smmu 2320 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = master->smmu; smmu 2323 drivers/iommu/arm-smmu-v3.c if (!(smmu->features & ARM_SMMU_FEAT_ATS) || !dev_is_pci(master->dev) || smmu 2341 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = master->smmu; smmu 2349 drivers/iommu/arm-smmu-v3.c stu = __ffs(smmu->pgsize_bitmap); smmu 2401 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu; smmu 2409 drivers/iommu/arm-smmu-v3.c smmu = master->smmu; smmu 2415 drivers/iommu/arm-smmu-v3.c if (!smmu_domain->smmu) { smmu 2416 drivers/iommu/arm-smmu-v3.c smmu_domain->smmu = smmu; smmu 2419 drivers/iommu/arm-smmu-v3.c smmu_domain->smmu = NULL; smmu 2422 drivers/iommu/arm-smmu-v3.c } else if (smmu_domain->smmu != smmu) { smmu 2425 drivers/iommu/arm-smmu-v3.c dev_name(smmu_domain->smmu->dev), smmu 2426 drivers/iommu/arm-smmu-v3.c dev_name(smmu->dev)); smmu 2437 drivers/iommu/arm-smmu-v3.c arm_smmu_write_ctx_desc(smmu, &smmu_domain->s1_cfg); smmu 2479 drivers/iommu/arm-smmu-v3.c if (smmu_domain->smmu) smmu 2517 drivers/iommu/arm-smmu-v3.c static bool arm_smmu_sid_in_range(struct arm_smmu_device *smmu, u32 sid) smmu 2519 drivers/iommu/arm-smmu-v3.c unsigned long limit = smmu->strtab_cfg.num_l1_ents; smmu 2521 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) smmu 2532 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu; smmu 2546 drivers/iommu/arm-smmu-v3.c smmu = master->smmu; smmu 2548 drivers/iommu/arm-smmu-v3.c smmu = arm_smmu_get_by_fwnode(fwspec->iommu_fwnode); smmu 2549 drivers/iommu/arm-smmu-v3.c if (!smmu) smmu 2556 drivers/iommu/arm-smmu-v3.c master->smmu = smmu; smmu 2566 drivers/iommu/arm-smmu-v3.c if (!arm_smmu_sid_in_range(smmu, sid)) smmu 2570 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) { smmu 2571 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_init_l2_strtab(smmu, sid); smmu 2580 drivers/iommu/arm-smmu-v3.c iommu_device_link(&smmu->iommu, dev); smmu 2590 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu; smmu 2596 drivers/iommu/arm-smmu-v3.c smmu = master->smmu; smmu 2599 drivers/iommu/arm-smmu-v3.c iommu_device_unlink(&smmu->iommu, dev); smmu 2662 drivers/iommu/arm-smmu-v3.c if (smmu_domain->smmu) { smmu 2746 drivers/iommu/arm-smmu-v3.c static int arm_smmu_init_one_queue(struct arm_smmu_device *smmu, smmu 2756 drivers/iommu/arm-smmu-v3.c q->base = dmam_alloc_coherent(smmu->dev, qsz, &q->base_dma, smmu 2765 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, smmu 2772 drivers/iommu/arm-smmu-v3.c dev_info(smmu->dev, "allocated %u entries for %s\n", smmu 2776 drivers/iommu/arm-smmu-v3.c q->prod_reg = arm_smmu_page1_fixup(prod_off, smmu); smmu 2777 drivers/iommu/arm-smmu-v3.c q->cons_reg = arm_smmu_page1_fixup(cons_off, smmu); smmu 2794 drivers/iommu/arm-smmu-v3.c static int arm_smmu_cmdq_init(struct arm_smmu_device *smmu) smmu 2797 drivers/iommu/arm-smmu-v3.c struct arm_smmu_cmdq *cmdq = &smmu->cmdq; smmu 2806 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "failed to allocate cmdq bitmap\n"); smmu 2810 drivers/iommu/arm-smmu-v3.c devm_add_action(smmu->dev, arm_smmu_cmdq_free_bitmap, bitmap); smmu 2816 drivers/iommu/arm-smmu-v3.c static int arm_smmu_init_queues(struct arm_smmu_device *smmu) smmu 2821 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_init_one_queue(smmu, &smmu->cmdq.q, ARM_SMMU_CMDQ_PROD, smmu 2827 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_cmdq_init(smmu); smmu 2832 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_init_one_queue(smmu, &smmu->evtq.q, ARM_SMMU_EVTQ_PROD, smmu 2839 drivers/iommu/arm-smmu-v3.c if (!(smmu->features & ARM_SMMU_FEAT_PRI)) smmu 2842 drivers/iommu/arm-smmu-v3.c return arm_smmu_init_one_queue(smmu, &smmu->priq.q, ARM_SMMU_PRIQ_PROD, smmu 2847 drivers/iommu/arm-smmu-v3.c static int arm_smmu_init_l1_strtab(struct arm_smmu_device *smmu) smmu 2850 drivers/iommu/arm-smmu-v3.c struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; smmu 2852 drivers/iommu/arm-smmu-v3.c void *strtab = smmu->strtab_cfg.strtab; smmu 2854 drivers/iommu/arm-smmu-v3.c cfg->l1_desc = devm_kzalloc(smmu->dev, size, GFP_KERNEL); smmu 2856 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "failed to allocate l1 stream table desc\n"); smmu 2868 drivers/iommu/arm-smmu-v3.c static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu) smmu 2873 drivers/iommu/arm-smmu-v3.c struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; smmu 2877 drivers/iommu/arm-smmu-v3.c size = min(size, smmu->sid_bits - STRTAB_SPLIT); smmu 2881 drivers/iommu/arm-smmu-v3.c if (size < smmu->sid_bits) smmu 2882 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, smmu 2884 drivers/iommu/arm-smmu-v3.c size, smmu->sid_bits); smmu 2887 drivers/iommu/arm-smmu-v3.c strtab = dmam_alloc_coherent(smmu->dev, l1size, &cfg->strtab_dma, smmu 2890 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, smmu 2903 drivers/iommu/arm-smmu-v3.c return arm_smmu_init_l1_strtab(smmu); smmu 2906 drivers/iommu/arm-smmu-v3.c static int arm_smmu_init_strtab_linear(struct arm_smmu_device *smmu) smmu 2911 drivers/iommu/arm-smmu-v3.c struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; smmu 2913 drivers/iommu/arm-smmu-v3.c size = (1 << smmu->sid_bits) * (STRTAB_STE_DWORDS << 3); smmu 2914 drivers/iommu/arm-smmu-v3.c strtab = dmam_alloc_coherent(smmu->dev, size, &cfg->strtab_dma, smmu 2917 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, smmu 2923 drivers/iommu/arm-smmu-v3.c cfg->num_l1_ents = 1 << smmu->sid_bits; smmu 2927 drivers/iommu/arm-smmu-v3.c reg |= FIELD_PREP(STRTAB_BASE_CFG_LOG2SIZE, smmu->sid_bits); smmu 2934 drivers/iommu/arm-smmu-v3.c static int arm_smmu_init_strtab(struct arm_smmu_device *smmu) smmu 2939 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) smmu 2940 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_init_strtab_2lvl(smmu); smmu 2942 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_init_strtab_linear(smmu); smmu 2948 drivers/iommu/arm-smmu-v3.c reg = smmu->strtab_cfg.strtab_dma & STRTAB_BASE_ADDR_MASK; smmu 2950 drivers/iommu/arm-smmu-v3.c smmu->strtab_cfg.strtab_base = reg; smmu 2953 drivers/iommu/arm-smmu-v3.c set_bit(0, smmu->vmid_map); smmu 2957 drivers/iommu/arm-smmu-v3.c static int arm_smmu_init_structures(struct arm_smmu_device *smmu) smmu 2961 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_init_queues(smmu); smmu 2965 drivers/iommu/arm-smmu-v3.c return arm_smmu_init_strtab(smmu); smmu 2968 drivers/iommu/arm-smmu-v3.c static int arm_smmu_write_reg_sync(struct arm_smmu_device *smmu, u32 val, smmu 2973 drivers/iommu/arm-smmu-v3.c writel_relaxed(val, smmu->base + reg_off); smmu 2974 drivers/iommu/arm-smmu-v3.c return readl_relaxed_poll_timeout(smmu->base + ack_off, reg, reg == val, smmu 2979 drivers/iommu/arm-smmu-v3.c static int arm_smmu_update_gbpa(struct arm_smmu_device *smmu, u32 set, u32 clr) smmu 2982 drivers/iommu/arm-smmu-v3.c u32 reg, __iomem *gbpa = smmu->base + ARM_SMMU_GBPA; smmu 2996 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "GBPA not responding to update\n"); smmu 3010 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = dev_get_drvdata(dev); smmu 3016 drivers/iommu/arm-smmu-v3.c writeq_relaxed(doorbell, smmu->base + cfg[0]); smmu 3017 drivers/iommu/arm-smmu-v3.c writel_relaxed(msg->data, smmu->base + cfg[1]); smmu 3018 drivers/iommu/arm-smmu-v3.c writel_relaxed(ARM_SMMU_MEMATTR_DEVICE_nGnRE, smmu->base + cfg[2]); smmu 3021 drivers/iommu/arm-smmu-v3.c static void arm_smmu_setup_msis(struct arm_smmu_device *smmu) smmu 3025 drivers/iommu/arm-smmu-v3.c struct device *dev = smmu->dev; smmu 3028 drivers/iommu/arm-smmu-v3.c writeq_relaxed(0, smmu->base + ARM_SMMU_GERROR_IRQ_CFG0); smmu 3029 drivers/iommu/arm-smmu-v3.c writeq_relaxed(0, smmu->base + ARM_SMMU_EVTQ_IRQ_CFG0); smmu 3031 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_PRI) smmu 3032 drivers/iommu/arm-smmu-v3.c writeq_relaxed(0, smmu->base + ARM_SMMU_PRIQ_IRQ_CFG0); smmu 3036 drivers/iommu/arm-smmu-v3.c if (!(smmu->features & ARM_SMMU_FEAT_MSI)) smmu 3040 drivers/iommu/arm-smmu-v3.c dev_info(smmu->dev, "msi_domain absent - falling back to wired irqs\n"); smmu 3054 drivers/iommu/arm-smmu-v3.c smmu->evtq.q.irq = desc->irq; smmu 3057 drivers/iommu/arm-smmu-v3.c smmu->gerr_irq = desc->irq; smmu 3060 drivers/iommu/arm-smmu-v3.c smmu->priq.q.irq = desc->irq; smmu 3071 drivers/iommu/arm-smmu-v3.c static void arm_smmu_setup_unique_irqs(struct arm_smmu_device *smmu) smmu 3075 drivers/iommu/arm-smmu-v3.c arm_smmu_setup_msis(smmu); smmu 3078 drivers/iommu/arm-smmu-v3.c irq = smmu->evtq.q.irq; smmu 3080 drivers/iommu/arm-smmu-v3.c ret = devm_request_threaded_irq(smmu->dev, irq, NULL, smmu 3083 drivers/iommu/arm-smmu-v3.c "arm-smmu-v3-evtq", smmu); smmu 3085 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "failed to enable evtq irq\n"); smmu 3087 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "no evtq irq - events will not be reported!\n"); smmu 3090 drivers/iommu/arm-smmu-v3.c irq = smmu->gerr_irq; smmu 3092 drivers/iommu/arm-smmu-v3.c ret = devm_request_irq(smmu->dev, irq, arm_smmu_gerror_handler, smmu 3093 drivers/iommu/arm-smmu-v3.c 0, "arm-smmu-v3-gerror", smmu); smmu 3095 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "failed to enable gerror irq\n"); smmu 3097 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "no gerr irq - errors will not be reported!\n"); smmu 3100 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_PRI) { smmu 3101 drivers/iommu/arm-smmu-v3.c irq = smmu->priq.q.irq; smmu 3103 drivers/iommu/arm-smmu-v3.c ret = devm_request_threaded_irq(smmu->dev, irq, NULL, smmu 3107 drivers/iommu/arm-smmu-v3.c smmu); smmu 3109 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, smmu 3112 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "no priq irq - PRI will be broken\n"); smmu 3117 drivers/iommu/arm-smmu-v3.c static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu) smmu 3123 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL, smmu 3126 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "failed to disable irqs\n"); smmu 3130 drivers/iommu/arm-smmu-v3.c irq = smmu->combined_irq; smmu 3136 drivers/iommu/arm-smmu-v3.c ret = devm_request_threaded_irq(smmu->dev, irq, smmu 3140 drivers/iommu/arm-smmu-v3.c "arm-smmu-v3-combined-irq", smmu); smmu 3142 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "failed to enable combined irq\n"); smmu 3144 drivers/iommu/arm-smmu-v3.c arm_smmu_setup_unique_irqs(smmu); smmu 3146 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_PRI) smmu 3150 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_write_reg_sync(smmu, irqen_flags, smmu 3153 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "failed to enable irqs\n"); smmu 3158 drivers/iommu/arm-smmu-v3.c static int arm_smmu_device_disable(struct arm_smmu_device *smmu) smmu 3162 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_CR0, ARM_SMMU_CR0ACK); smmu 3164 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "failed to clear cr0\n"); smmu 3169 drivers/iommu/arm-smmu-v3.c static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass) smmu 3176 drivers/iommu/arm-smmu-v3.c reg = readl_relaxed(smmu->base + ARM_SMMU_CR0); smmu 3178 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "SMMU currently enabled! Resetting...\n"); smmu 3180 drivers/iommu/arm-smmu-v3.c arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0); smmu 3183 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_device_disable(smmu); smmu 3194 drivers/iommu/arm-smmu-v3.c writel_relaxed(reg, smmu->base + ARM_SMMU_CR1); smmu 3198 drivers/iommu/arm-smmu-v3.c writel_relaxed(reg, smmu->base + ARM_SMMU_CR2); smmu 3201 drivers/iommu/arm-smmu-v3.c writeq_relaxed(smmu->strtab_cfg.strtab_base, smmu 3202 drivers/iommu/arm-smmu-v3.c smmu->base + ARM_SMMU_STRTAB_BASE); smmu 3203 drivers/iommu/arm-smmu-v3.c writel_relaxed(smmu->strtab_cfg.strtab_base_cfg, smmu 3204 drivers/iommu/arm-smmu-v3.c smmu->base + ARM_SMMU_STRTAB_BASE_CFG); smmu 3207 drivers/iommu/arm-smmu-v3.c writeq_relaxed(smmu->cmdq.q.q_base, smmu->base + ARM_SMMU_CMDQ_BASE); smmu 3208 drivers/iommu/arm-smmu-v3.c writel_relaxed(smmu->cmdq.q.llq.prod, smmu->base + ARM_SMMU_CMDQ_PROD); smmu 3209 drivers/iommu/arm-smmu-v3.c writel_relaxed(smmu->cmdq.q.llq.cons, smmu->base + ARM_SMMU_CMDQ_CONS); smmu 3212 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, smmu 3215 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "failed to enable command queue\n"); smmu 3221 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_cmd(smmu, &cmd); smmu 3222 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_sync(smmu); smmu 3225 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_HYP) { smmu 3227 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_cmd(smmu, &cmd); smmu 3231 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_cmd(smmu, &cmd); smmu 3232 drivers/iommu/arm-smmu-v3.c arm_smmu_cmdq_issue_sync(smmu); smmu 3235 drivers/iommu/arm-smmu-v3.c writeq_relaxed(smmu->evtq.q.q_base, smmu->base + ARM_SMMU_EVTQ_BASE); smmu 3236 drivers/iommu/arm-smmu-v3.c writel_relaxed(smmu->evtq.q.llq.prod, smmu 3237 drivers/iommu/arm-smmu-v3.c arm_smmu_page1_fixup(ARM_SMMU_EVTQ_PROD, smmu)); smmu 3238 drivers/iommu/arm-smmu-v3.c writel_relaxed(smmu->evtq.q.llq.cons, smmu 3239 drivers/iommu/arm-smmu-v3.c arm_smmu_page1_fixup(ARM_SMMU_EVTQ_CONS, smmu)); smmu 3242 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, smmu 3245 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "failed to enable event queue\n"); smmu 3250 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_PRI) { smmu 3251 drivers/iommu/arm-smmu-v3.c writeq_relaxed(smmu->priq.q.q_base, smmu 3252 drivers/iommu/arm-smmu-v3.c smmu->base + ARM_SMMU_PRIQ_BASE); smmu 3253 drivers/iommu/arm-smmu-v3.c writel_relaxed(smmu->priq.q.llq.prod, smmu 3254 drivers/iommu/arm-smmu-v3.c arm_smmu_page1_fixup(ARM_SMMU_PRIQ_PROD, smmu)); smmu 3255 drivers/iommu/arm-smmu-v3.c writel_relaxed(smmu->priq.q.llq.cons, smmu 3256 drivers/iommu/arm-smmu-v3.c arm_smmu_page1_fixup(ARM_SMMU_PRIQ_CONS, smmu)); smmu 3259 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, smmu 3262 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "failed to enable PRI queue\n"); smmu 3267 drivers/iommu/arm-smmu-v3.c if (smmu->features & ARM_SMMU_FEAT_ATS) { smmu 3269 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, smmu 3272 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "failed to enable ATS check\n"); smmu 3277 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_setup_irqs(smmu); smmu 3279 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "failed to setup irqs\n"); smmu 3290 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_update_gbpa(smmu, 0, GBPA_ABORT); smmu 3294 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, smmu 3297 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "failed to enable SMMU interface\n"); smmu 3304 drivers/iommu/arm-smmu-v3.c static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) smmu 3307 drivers/iommu/arm-smmu-v3.c bool coherent = smmu->features & ARM_SMMU_FEAT_COHERENCY; smmu 3310 drivers/iommu/arm-smmu-v3.c reg = readl_relaxed(smmu->base + ARM_SMMU_IDR0); smmu 3314 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_2_LVL_STRTAB; smmu 3317 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_2_LVL_CDTAB; smmu 3326 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_TT_LE | ARM_SMMU_FEAT_TT_BE; smmu 3330 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_TT_BE; smmu 3334 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_TT_LE; smmu 3338 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "unknown/unsupported TT endianness!\n"); smmu 3344 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_PRI; smmu 3347 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_ATS; smmu 3350 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_SEV; smmu 3353 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_MSI; smmu 3356 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_HYP; smmu 3363 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, "IDR0.COHACC overridden by FW configuration (%s)\n", smmu 3368 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_STALL_FORCE; smmu 3371 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_STALLS; smmu 3375 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_TRANS_S1; smmu 3378 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_TRANS_S2; smmu 3381 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "no translation support!\n"); smmu 3388 drivers/iommu/arm-smmu-v3.c smmu->ias = 40; smmu 3393 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "AArch64 table format not supported!\n"); smmu 3398 drivers/iommu/arm-smmu-v3.c smmu->asid_bits = reg & IDR0_ASID16 ? 16 : 8; smmu 3399 drivers/iommu/arm-smmu-v3.c smmu->vmid_bits = reg & IDR0_VMID16 ? 16 : 8; smmu 3402 drivers/iommu/arm-smmu-v3.c reg = readl_relaxed(smmu->base + ARM_SMMU_IDR1); smmu 3404 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "embedded implementation not supported\n"); smmu 3409 drivers/iommu/arm-smmu-v3.c smmu->cmdq.q.llq.max_n_shift = min_t(u32, CMDQ_MAX_SZ_SHIFT, smmu 3411 drivers/iommu/arm-smmu-v3.c if (smmu->cmdq.q.llq.max_n_shift <= ilog2(CMDQ_BATCH_ENTRIES)) { smmu 3418 drivers/iommu/arm-smmu-v3.c dev_err(smmu->dev, "command queue size <= %d entries not supported\n", smmu 3423 drivers/iommu/arm-smmu-v3.c smmu->evtq.q.llq.max_n_shift = min_t(u32, EVTQ_MAX_SZ_SHIFT, smmu 3425 drivers/iommu/arm-smmu-v3.c smmu->priq.q.llq.max_n_shift = min_t(u32, PRIQ_MAX_SZ_SHIFT, smmu 3429 drivers/iommu/arm-smmu-v3.c smmu->ssid_bits = FIELD_GET(IDR1_SSIDSIZE, reg); smmu 3430 drivers/iommu/arm-smmu-v3.c smmu->sid_bits = FIELD_GET(IDR1_SIDSIZE, reg); smmu 3436 drivers/iommu/arm-smmu-v3.c if (smmu->sid_bits <= STRTAB_SPLIT) smmu 3437 drivers/iommu/arm-smmu-v3.c smmu->features &= ~ARM_SMMU_FEAT_2_LVL_STRTAB; smmu 3440 drivers/iommu/arm-smmu-v3.c reg = readl_relaxed(smmu->base + ARM_SMMU_IDR5); smmu 3443 drivers/iommu/arm-smmu-v3.c smmu->evtq.max_stalls = FIELD_GET(IDR5_STALL_MAX, reg); smmu 3447 drivers/iommu/arm-smmu-v3.c smmu->pgsize_bitmap |= SZ_64K | SZ_512M; smmu 3449 drivers/iommu/arm-smmu-v3.c smmu->pgsize_bitmap |= SZ_16K | SZ_32M; smmu 3451 drivers/iommu/arm-smmu-v3.c smmu->pgsize_bitmap |= SZ_4K | SZ_2M | SZ_1G; smmu 3455 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_VAX; smmu 3460 drivers/iommu/arm-smmu-v3.c smmu->oas = 32; smmu 3463 drivers/iommu/arm-smmu-v3.c smmu->oas = 36; smmu 3466 drivers/iommu/arm-smmu-v3.c smmu->oas = 40; smmu 3469 drivers/iommu/arm-smmu-v3.c smmu->oas = 42; smmu 3472 drivers/iommu/arm-smmu-v3.c smmu->oas = 44; smmu 3475 drivers/iommu/arm-smmu-v3.c smmu->oas = 52; smmu 3476 drivers/iommu/arm-smmu-v3.c smmu->pgsize_bitmap |= 1ULL << 42; /* 4TB */ smmu 3479 drivers/iommu/arm-smmu-v3.c dev_info(smmu->dev, smmu 3483 drivers/iommu/arm-smmu-v3.c smmu->oas = 48; smmu 3487 drivers/iommu/arm-smmu-v3.c arm_smmu_ops.pgsize_bitmap = smmu->pgsize_bitmap; smmu 3489 drivers/iommu/arm-smmu-v3.c arm_smmu_ops.pgsize_bitmap |= smmu->pgsize_bitmap; smmu 3492 drivers/iommu/arm-smmu-v3.c if (dma_set_mask_and_coherent(smmu->dev, DMA_BIT_MASK(smmu->oas))) smmu 3493 drivers/iommu/arm-smmu-v3.c dev_warn(smmu->dev, smmu 3496 drivers/iommu/arm-smmu-v3.c smmu->ias = max(smmu->ias, smmu->oas); smmu 3498 drivers/iommu/arm-smmu-v3.c dev_info(smmu->dev, "ias %lu-bit, oas %lu-bit (features 0x%08x)\n", smmu 3499 drivers/iommu/arm-smmu-v3.c smmu->ias, smmu->oas, smmu->features); smmu 3504 drivers/iommu/arm-smmu-v3.c static void acpi_smmu_get_options(u32 model, struct arm_smmu_device *smmu) smmu 3508 drivers/iommu/arm-smmu-v3.c smmu->options |= ARM_SMMU_OPT_PAGE0_REGS_ONLY; smmu 3511 drivers/iommu/arm-smmu-v3.c smmu->options |= ARM_SMMU_OPT_SKIP_PREFETCH; smmu 3515 drivers/iommu/arm-smmu-v3.c dev_notice(smmu->dev, "option mask 0x%x\n", smmu->options); smmu 3519 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu) smmu 3522 drivers/iommu/arm-smmu-v3.c struct device *dev = smmu->dev; smmu 3530 drivers/iommu/arm-smmu-v3.c acpi_smmu_get_options(iort_smmu->model, smmu); smmu 3533 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_COHERENCY; smmu 3539 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu) smmu 3546 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu) smmu 3559 drivers/iommu/arm-smmu-v3.c parse_driver_options(smmu); smmu 3562 drivers/iommu/arm-smmu-v3.c smmu->features |= ARM_SMMU_FEAT_COHERENCY; smmu 3567 drivers/iommu/arm-smmu-v3.c static unsigned long arm_smmu_resource_size(struct arm_smmu_device *smmu) smmu 3569 drivers/iommu/arm-smmu-v3.c if (smmu->options & ARM_SMMU_OPT_PAGE0_REGS_ONLY) smmu 3580 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu; smmu 3584 drivers/iommu/arm-smmu-v3.c smmu = devm_kzalloc(dev, sizeof(*smmu), GFP_KERNEL); smmu 3585 drivers/iommu/arm-smmu-v3.c if (!smmu) { smmu 3589 drivers/iommu/arm-smmu-v3.c smmu->dev = dev; smmu 3592 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_device_dt_probe(pdev, smmu); smmu 3594 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_device_acpi_probe(pdev, smmu); smmu 3604 drivers/iommu/arm-smmu-v3.c if (resource_size(res) + 1 < arm_smmu_resource_size(smmu)) { smmu 3610 drivers/iommu/arm-smmu-v3.c smmu->base = devm_ioremap_resource(dev, res); smmu 3611 drivers/iommu/arm-smmu-v3.c if (IS_ERR(smmu->base)) smmu 3612 drivers/iommu/arm-smmu-v3.c return PTR_ERR(smmu->base); smmu 3618 drivers/iommu/arm-smmu-v3.c smmu->combined_irq = irq; smmu 3622 drivers/iommu/arm-smmu-v3.c smmu->evtq.q.irq = irq; smmu 3626 drivers/iommu/arm-smmu-v3.c smmu->priq.q.irq = irq; smmu 3630 drivers/iommu/arm-smmu-v3.c smmu->gerr_irq = irq; smmu 3633 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_device_hw_probe(smmu); smmu 3638 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_init_structures(smmu); smmu 3643 drivers/iommu/arm-smmu-v3.c platform_set_drvdata(pdev, smmu); smmu 3646 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_device_reset(smmu, bypass); smmu 3651 drivers/iommu/arm-smmu-v3.c ret = iommu_device_sysfs_add(&smmu->iommu, dev, NULL, smmu 3656 drivers/iommu/arm-smmu-v3.c iommu_device_set_ops(&smmu->iommu, &arm_smmu_ops); smmu 3657 drivers/iommu/arm-smmu-v3.c iommu_device_set_fwnode(&smmu->iommu, dev->fwnode); smmu 3659 drivers/iommu/arm-smmu-v3.c ret = iommu_device_register(&smmu->iommu); smmu 3690 drivers/iommu/arm-smmu-v3.c struct arm_smmu_device *smmu = platform_get_drvdata(pdev); smmu 3692 drivers/iommu/arm-smmu-v3.c arm_smmu_device_disable(smmu); smmu 101 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu; smmu 106 drivers/iommu/arm-smmu.c #define fwspec_smmu(fw) (__fwspec_cfg(fw)->smmu) smmu 114 drivers/iommu/arm-smmu.c static inline int arm_smmu_rpm_get(struct arm_smmu_device *smmu) smmu 116 drivers/iommu/arm-smmu.c if (pm_runtime_enabled(smmu->dev)) smmu 117 drivers/iommu/arm-smmu.c return pm_runtime_get_sync(smmu->dev); smmu 122 drivers/iommu/arm-smmu.c static inline void arm_smmu_rpm_put(struct arm_smmu_device *smmu) smmu 124 drivers/iommu/arm-smmu.c if (pm_runtime_enabled(smmu->dev)) smmu 125 drivers/iommu/arm-smmu.c pm_runtime_put(smmu->dev); smmu 172 drivers/iommu/arm-smmu.c struct arm_smmu_device **smmu) smmu 215 drivers/iommu/arm-smmu.c *smmu = dev_get_drvdata(smmu_dev); smmu 241 drivers/iommu/arm-smmu.c static void __arm_smmu_tlb_sync(struct arm_smmu_device *smmu, int page, smmu 247 drivers/iommu/arm-smmu.c arm_smmu_writel(smmu, page, sync, QCOM_DUMMY_VAL); smmu 250 drivers/iommu/arm-smmu.c reg = arm_smmu_readl(smmu, page, status); smmu 257 drivers/iommu/arm-smmu.c dev_err_ratelimited(smmu->dev, smmu 261 drivers/iommu/arm-smmu.c static void arm_smmu_tlb_sync_global(struct arm_smmu_device *smmu) smmu 265 drivers/iommu/arm-smmu.c spin_lock_irqsave(&smmu->global_sync_lock, flags); smmu 266 drivers/iommu/arm-smmu.c __arm_smmu_tlb_sync(smmu, ARM_SMMU_GR0, ARM_SMMU_GR0_sTLBGSYNC, smmu 268 drivers/iommu/arm-smmu.c spin_unlock_irqrestore(&smmu->global_sync_lock, flags); smmu 274 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 278 drivers/iommu/arm-smmu.c __arm_smmu_tlb_sync(smmu, ARM_SMMU_CB(smmu, smmu_domain->cfg.cbndx), smmu 287 drivers/iommu/arm-smmu.c arm_smmu_tlb_sync_global(smmu_domain->smmu); smmu 298 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu_domain->smmu, smmu_domain->cfg.cbndx, smmu 306 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 310 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIVMID, smmu_domain->cfg.vmid); smmu 311 drivers/iommu/arm-smmu.c arm_smmu_tlb_sync_global(smmu); smmu 318 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 322 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_COHERENT_WALK) smmu 331 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, reg, iova); smmu 338 drivers/iommu/arm-smmu.c arm_smmu_cb_writeq(smmu, idx, reg, iova); smmu 348 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 351 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_COHERENT_WALK) smmu 358 drivers/iommu/arm-smmu.c arm_smmu_cb_writeq(smmu, idx, reg, iova); smmu 360 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, reg, iova); smmu 375 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 377 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_COHERENT_WALK) smmu 380 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIVMID, smmu_domain->cfg.vmid); smmu 452 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 455 drivers/iommu/arm-smmu.c fsr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSR); smmu 459 drivers/iommu/arm-smmu.c fsynr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSYNR0); smmu 460 drivers/iommu/arm-smmu.c iova = arm_smmu_cb_readq(smmu, idx, ARM_SMMU_CB_FAR); smmu 461 drivers/iommu/arm-smmu.c cbfrsynra = arm_smmu_gr1_read(smmu, ARM_SMMU_GR1_CBFRSYNRA(idx)); smmu 463 drivers/iommu/arm-smmu.c dev_err_ratelimited(smmu->dev, smmu 467 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, fsr); smmu 474 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = dev; smmu 476 drivers/iommu/arm-smmu.c gfsr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR); smmu 477 drivers/iommu/arm-smmu.c gfsynr0 = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSYNR0); smmu 478 drivers/iommu/arm-smmu.c gfsynr1 = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSYNR1); smmu 479 drivers/iommu/arm-smmu.c gfsynr2 = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSYNR2); smmu 484 drivers/iommu/arm-smmu.c dev_err_ratelimited(smmu->dev, smmu 486 drivers/iommu/arm-smmu.c dev_err_ratelimited(smmu->dev, smmu 490 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, gfsr); smmu 498 drivers/iommu/arm-smmu.c struct arm_smmu_cb *cb = &smmu_domain->smmu->cbs[cfg->cbndx]; smmu 545 drivers/iommu/arm-smmu.c static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx) smmu 549 drivers/iommu/arm-smmu.c struct arm_smmu_cb *cb = &smmu->cbs[idx]; smmu 554 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, 0); smmu 561 drivers/iommu/arm-smmu.c if (smmu->version > ARM_SMMU_V1) { smmu 567 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_VMID16) smmu 570 drivers/iommu/arm-smmu.c arm_smmu_gr1_write(smmu, ARM_SMMU_GR1_CBA2R(idx), reg); smmu 575 drivers/iommu/arm-smmu.c if (smmu->version < ARM_SMMU_V2) smmu 585 drivers/iommu/arm-smmu.c } else if (!(smmu->features & ARM_SMMU_FEAT_VMID16)) { smmu 589 drivers/iommu/arm-smmu.c arm_smmu_gr1_write(smmu, ARM_SMMU_GR1_CBAR(idx), reg); smmu 596 drivers/iommu/arm-smmu.c if (stage1 && smmu->version > ARM_SMMU_V1) smmu 597 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TCR2, cb->tcr[1]); smmu 598 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TCR, cb->tcr[0]); smmu 602 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_CONTEXTIDR, cfg->asid); smmu 603 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TTBR0, cb->ttbr[0]); smmu 604 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TTBR1, cb->ttbr[1]); smmu 606 drivers/iommu/arm-smmu.c arm_smmu_cb_writeq(smmu, idx, ARM_SMMU_CB_TTBR0, cb->ttbr[0]); smmu 608 drivers/iommu/arm-smmu.c arm_smmu_cb_writeq(smmu, idx, ARM_SMMU_CB_TTBR1, smmu 614 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_S1_MAIR0, cb->mair[0]); smmu 615 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_S1_MAIR1, cb->mair[1]); smmu 625 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, reg); smmu 629 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu) smmu 640 drivers/iommu/arm-smmu.c if (smmu_domain->smmu) smmu 645 drivers/iommu/arm-smmu.c smmu_domain->smmu = smmu; smmu 667 drivers/iommu/arm-smmu.c if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S1)) smmu 669 drivers/iommu/arm-smmu.c if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S2)) smmu 680 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_L) smmu 684 drivers/iommu/arm-smmu.c (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_S) && smmu 688 drivers/iommu/arm-smmu.c (smmu->features & (ARM_SMMU_FEAT_FMT_AARCH64_64K | smmu 701 drivers/iommu/arm-smmu.c start = smmu->num_s2_context_banks; smmu 702 drivers/iommu/arm-smmu.c ias = smmu->va_size; smmu 703 drivers/iommu/arm-smmu.c oas = smmu->ipa_size; smmu 725 drivers/iommu/arm-smmu.c ias = smmu->ipa_size; smmu 726 drivers/iommu/arm-smmu.c oas = smmu->pa_size; smmu 734 drivers/iommu/arm-smmu.c if (smmu->version == ARM_SMMU_V2) smmu 743 drivers/iommu/arm-smmu.c ret = __arm_smmu_alloc_bitmap(smmu->context_map, start, smmu 744 drivers/iommu/arm-smmu.c smmu->num_context_banks); smmu 749 drivers/iommu/arm-smmu.c if (smmu->version < ARM_SMMU_V2) { smmu 750 drivers/iommu/arm-smmu.c cfg->irptndx = atomic_inc_return(&smmu->irptndx); smmu 751 drivers/iommu/arm-smmu.c cfg->irptndx %= smmu->num_context_irqs; smmu 761 drivers/iommu/arm-smmu.c smmu_domain->smmu = smmu; smmu 762 drivers/iommu/arm-smmu.c if (smmu->impl && smmu->impl->init_context) { smmu 763 drivers/iommu/arm-smmu.c ret = smmu->impl->init_context(smmu_domain); smmu 769 drivers/iommu/arm-smmu.c .pgsize_bitmap = smmu->pgsize_bitmap, smmu 772 drivers/iommu/arm-smmu.c .coherent_walk = smmu->features & ARM_SMMU_FEAT_COHERENT_WALK, smmu 774 drivers/iommu/arm-smmu.c .iommu_dev = smmu->dev, smmu 793 drivers/iommu/arm-smmu.c arm_smmu_write_context_bank(smmu, cfg->cbndx); smmu 799 drivers/iommu/arm-smmu.c irq = smmu->irqs[smmu->num_global_irqs + cfg->irptndx]; smmu 800 drivers/iommu/arm-smmu.c ret = devm_request_irq(smmu->dev, irq, arm_smmu_context_fault, smmu 803 drivers/iommu/arm-smmu.c dev_err(smmu->dev, "failed to request context IRQ %d (%u)\n", smmu 815 drivers/iommu/arm-smmu.c __arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx); smmu 816 drivers/iommu/arm-smmu.c smmu_domain->smmu = NULL; smmu 825 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 829 drivers/iommu/arm-smmu.c if (!smmu || domain->type == IOMMU_DOMAIN_IDENTITY) smmu 832 drivers/iommu/arm-smmu.c ret = arm_smmu_rpm_get(smmu); smmu 840 drivers/iommu/arm-smmu.c smmu->cbs[cfg->cbndx].cfg = NULL; smmu 841 drivers/iommu/arm-smmu.c arm_smmu_write_context_bank(smmu, cfg->cbndx); smmu 844 drivers/iommu/arm-smmu.c irq = smmu->irqs[smmu->num_global_irqs + cfg->irptndx]; smmu 845 drivers/iommu/arm-smmu.c devm_free_irq(smmu->dev, irq, domain); smmu 849 drivers/iommu/arm-smmu.c __arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx); smmu 851 drivers/iommu/arm-smmu.c arm_smmu_rpm_put(smmu); smmu 896 drivers/iommu/arm-smmu.c static void arm_smmu_write_smr(struct arm_smmu_device *smmu, int idx) smmu 898 drivers/iommu/arm-smmu.c struct arm_smmu_smr *smr = smmu->smrs + idx; smmu 901 drivers/iommu/arm-smmu.c if (!(smmu->features & ARM_SMMU_FEAT_EXIDS) && smr->valid) smmu 903 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(idx), reg); smmu 906 drivers/iommu/arm-smmu.c static void arm_smmu_write_s2cr(struct arm_smmu_device *smmu, int idx) smmu 908 drivers/iommu/arm-smmu.c struct arm_smmu_s2cr *s2cr = smmu->s2crs + idx; smmu 913 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_EXIDS && smmu->smrs && smmu 914 drivers/iommu/arm-smmu.c smmu->smrs[idx].valid) smmu 916 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_S2CR(idx), reg); smmu 919 drivers/iommu/arm-smmu.c static void arm_smmu_write_sme(struct arm_smmu_device *smmu, int idx) smmu 921 drivers/iommu/arm-smmu.c arm_smmu_write_s2cr(smmu, idx); smmu 922 drivers/iommu/arm-smmu.c if (smmu->smrs) smmu 923 drivers/iommu/arm-smmu.c arm_smmu_write_smr(smmu, idx); smmu 930 drivers/iommu/arm-smmu.c static void arm_smmu_test_smr_masks(struct arm_smmu_device *smmu) smmu 934 drivers/iommu/arm-smmu.c if (!smmu->smrs) smmu 942 drivers/iommu/arm-smmu.c smr = FIELD_PREP(SMR_ID, smmu->streamid_mask); smmu 943 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(0), smr); smmu 944 drivers/iommu/arm-smmu.c smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(0)); smmu 945 drivers/iommu/arm-smmu.c smmu->streamid_mask = FIELD_GET(SMR_ID, smr); smmu 947 drivers/iommu/arm-smmu.c smr = FIELD_PREP(SMR_MASK, smmu->streamid_mask); smmu 948 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(0), smr); smmu 949 drivers/iommu/arm-smmu.c smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(0)); smmu 950 drivers/iommu/arm-smmu.c smmu->smr_mask_mask = FIELD_GET(SMR_MASK, smr); smmu 953 drivers/iommu/arm-smmu.c static int arm_smmu_find_sme(struct arm_smmu_device *smmu, u16 id, u16 mask) smmu 955 drivers/iommu/arm-smmu.c struct arm_smmu_smr *smrs = smmu->smrs; smmu 963 drivers/iommu/arm-smmu.c for (i = 0; i < smmu->num_mapping_groups; ++i) { smmu 995 drivers/iommu/arm-smmu.c static bool arm_smmu_free_sme(struct arm_smmu_device *smmu, int idx) smmu 997 drivers/iommu/arm-smmu.c if (--smmu->s2crs[idx].count) smmu 1000 drivers/iommu/arm-smmu.c smmu->s2crs[idx] = s2cr_init_val; smmu 1001 drivers/iommu/arm-smmu.c if (smmu->smrs) smmu 1002 drivers/iommu/arm-smmu.c smmu->smrs[idx].valid = false; smmu 1011 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = cfg->smmu; smmu 1012 drivers/iommu/arm-smmu.c struct arm_smmu_smr *smrs = smmu->smrs; smmu 1016 drivers/iommu/arm-smmu.c mutex_lock(&smmu->stream_map_mutex); smmu 1027 drivers/iommu/arm-smmu.c ret = arm_smmu_find_sme(smmu, sid, mask); smmu 1032 drivers/iommu/arm-smmu.c if (smrs && smmu->s2crs[idx].count == 0) { smmu 1037 drivers/iommu/arm-smmu.c smmu->s2crs[idx].count++; smmu 1052 drivers/iommu/arm-smmu.c arm_smmu_write_sme(smmu, idx); smmu 1053 drivers/iommu/arm-smmu.c smmu->s2crs[idx].group = group; smmu 1056 drivers/iommu/arm-smmu.c mutex_unlock(&smmu->stream_map_mutex); smmu 1061 drivers/iommu/arm-smmu.c arm_smmu_free_sme(smmu, cfg->smendx[i]); smmu 1064 drivers/iommu/arm-smmu.c mutex_unlock(&smmu->stream_map_mutex); smmu 1070 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = fwspec_smmu(fwspec); smmu 1074 drivers/iommu/arm-smmu.c mutex_lock(&smmu->stream_map_mutex); smmu 1076 drivers/iommu/arm-smmu.c if (arm_smmu_free_sme(smmu, idx)) smmu 1077 drivers/iommu/arm-smmu.c arm_smmu_write_sme(smmu, idx); smmu 1080 drivers/iommu/arm-smmu.c mutex_unlock(&smmu->stream_map_mutex); smmu 1086 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 1087 drivers/iommu/arm-smmu.c struct arm_smmu_s2cr *s2cr = smmu->s2crs; smmu 1104 drivers/iommu/arm-smmu.c arm_smmu_write_s2cr(smmu, idx); smmu 1113 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu; smmu 1131 drivers/iommu/arm-smmu.c smmu = fwspec_smmu(fwspec); smmu 1133 drivers/iommu/arm-smmu.c ret = arm_smmu_rpm_get(smmu); smmu 1138 drivers/iommu/arm-smmu.c ret = arm_smmu_init_domain_context(domain, smmu); smmu 1146 drivers/iommu/arm-smmu.c if (smmu_domain->smmu != smmu) { smmu 1149 drivers/iommu/arm-smmu.c dev_name(smmu_domain->smmu->dev), dev_name(smmu->dev)); smmu 1158 drivers/iommu/arm-smmu.c arm_smmu_rpm_put(smmu); smmu 1166 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu; smmu 1172 drivers/iommu/arm-smmu.c arm_smmu_rpm_get(smmu); smmu 1174 drivers/iommu/arm-smmu.c arm_smmu_rpm_put(smmu); smmu 1183 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu; smmu 1189 drivers/iommu/arm-smmu.c arm_smmu_rpm_get(smmu); smmu 1191 drivers/iommu/arm-smmu.c arm_smmu_rpm_put(smmu); smmu 1199 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 1202 drivers/iommu/arm-smmu.c arm_smmu_rpm_get(smmu); smmu 1204 drivers/iommu/arm-smmu.c arm_smmu_rpm_put(smmu); smmu 1212 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 1215 drivers/iommu/arm-smmu.c arm_smmu_rpm_get(smmu); smmu 1217 drivers/iommu/arm-smmu.c arm_smmu_rpm_put(smmu); smmu 1225 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = smmu_domain->smmu; smmu 1228 drivers/iommu/arm-smmu.c struct device *dev = smmu->dev; smmu 1235 drivers/iommu/arm-smmu.c ret = arm_smmu_rpm_get(smmu); smmu 1242 drivers/iommu/arm-smmu.c arm_smmu_cb_writeq(smmu, idx, ARM_SMMU_CB_ATS1PR, va); smmu 1244 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_ATS1PR, va); smmu 1246 drivers/iommu/arm-smmu.c reg = arm_smmu_page(smmu, ARM_SMMU_CB(smmu, idx)) + ARM_SMMU_CB_ATSR; smmu 1255 drivers/iommu/arm-smmu.c phys = arm_smmu_cb_readq(smmu, idx, ARM_SMMU_CB_PAR); smmu 1263 drivers/iommu/arm-smmu.c arm_smmu_rpm_put(smmu); smmu 1280 drivers/iommu/arm-smmu.c if (smmu_domain->smmu->features & ARM_SMMU_FEAT_TRANS_OPS && smmu 1314 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu; smmu 1320 drivers/iommu/arm-smmu.c ret = arm_smmu_register_legacy_master(dev, &smmu); smmu 1331 drivers/iommu/arm-smmu.c smmu = arm_smmu_get_by_fwnode(fwspec->iommu_fwnode); smmu 1341 drivers/iommu/arm-smmu.c if (sid & ~smmu->streamid_mask) { smmu 1343 drivers/iommu/arm-smmu.c sid, smmu->streamid_mask); smmu 1346 drivers/iommu/arm-smmu.c if (mask & ~smmu->smr_mask_mask) { smmu 1348 drivers/iommu/arm-smmu.c mask, smmu->smr_mask_mask); smmu 1359 drivers/iommu/arm-smmu.c cfg->smmu = smmu; smmu 1364 drivers/iommu/arm-smmu.c ret = arm_smmu_rpm_get(smmu); smmu 1369 drivers/iommu/arm-smmu.c arm_smmu_rpm_put(smmu); smmu 1374 drivers/iommu/arm-smmu.c iommu_device_link(&smmu->iommu, dev); smmu 1376 drivers/iommu/arm-smmu.c device_link_add(dev, smmu->dev, smmu 1392 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu; smmu 1399 drivers/iommu/arm-smmu.c smmu = cfg->smmu; smmu 1401 drivers/iommu/arm-smmu.c ret = arm_smmu_rpm_get(smmu); smmu 1405 drivers/iommu/arm-smmu.c iommu_device_unlink(&smmu->iommu, dev); smmu 1408 drivers/iommu/arm-smmu.c arm_smmu_rpm_put(smmu); smmu 1418 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = fwspec_smmu(fwspec); smmu 1423 drivers/iommu/arm-smmu.c if (group && smmu->s2crs[idx].group && smmu 1424 drivers/iommu/arm-smmu.c group != smmu->s2crs[idx].group) smmu 1427 drivers/iommu/arm-smmu.c group = smmu->s2crs[idx].group; smmu 1484 drivers/iommu/arm-smmu.c if (smmu_domain->smmu) { smmu 1576 drivers/iommu/arm-smmu.c static void arm_smmu_device_reset(struct arm_smmu_device *smmu) smmu 1582 drivers/iommu/arm-smmu.c reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR); smmu 1583 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, reg); smmu 1589 drivers/iommu/arm-smmu.c for (i = 0; i < smmu->num_mapping_groups; ++i) smmu 1590 drivers/iommu/arm-smmu.c arm_smmu_write_sme(smmu, i); smmu 1593 drivers/iommu/arm-smmu.c for (i = 0; i < smmu->num_context_banks; ++i) { smmu 1594 drivers/iommu/arm-smmu.c arm_smmu_write_context_bank(smmu, i); smmu 1595 drivers/iommu/arm-smmu.c arm_smmu_cb_write(smmu, i, ARM_SMMU_CB_FSR, FSR_FAULT); smmu 1599 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIALLH, QCOM_DUMMY_VAL); smmu 1600 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIALLNSNH, QCOM_DUMMY_VAL); smmu 1602 drivers/iommu/arm-smmu.c reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sCR0); smmu 1623 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_VMID16) smmu 1626 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_EXIDS) smmu 1629 drivers/iommu/arm-smmu.c if (smmu->impl && smmu->impl->reset) smmu 1630 drivers/iommu/arm-smmu.c smmu->impl->reset(smmu); smmu 1633 drivers/iommu/arm-smmu.c arm_smmu_tlb_sync_global(smmu); smmu 1634 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sCR0, reg); smmu 1656 drivers/iommu/arm-smmu.c static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) smmu 1660 drivers/iommu/arm-smmu.c bool cttw_reg, cttw_fw = smmu->features & ARM_SMMU_FEAT_COHERENT_WALK; smmu 1663 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, "probing hardware configuration...\n"); smmu 1664 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, "SMMUv%d with:\n", smmu 1665 drivers/iommu/arm-smmu.c smmu->version == ARM_SMMU_V2 ? 2 : 1); smmu 1668 drivers/iommu/arm-smmu.c id = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_ID0); smmu 1677 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_TRANS_S1; smmu 1678 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, "\tstage 1 translation\n"); smmu 1682 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_TRANS_S2; smmu 1683 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, "\tstage 2 translation\n"); smmu 1687 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_TRANS_NESTED; smmu 1688 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, "\tnested translation\n"); smmu 1691 drivers/iommu/arm-smmu.c if (!(smmu->features & smmu 1693 drivers/iommu/arm-smmu.c dev_err(smmu->dev, "\tno translation support!\n"); smmu 1698 drivers/iommu/arm-smmu.c ((smmu->version < ARM_SMMU_V2) || !(id & ID0_ATOSNS))) { smmu 1699 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_TRANS_OPS; smmu 1700 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, "\taddress translation ops\n"); smmu 1711 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, "\t%scoherent table walk\n", smmu 1714 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, smmu 1718 drivers/iommu/arm-smmu.c if (smmu->version == ARM_SMMU_V2 && id & ID0_EXIDS) { smmu 1719 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_EXIDS; smmu 1724 drivers/iommu/arm-smmu.c smmu->streamid_mask = size - 1; smmu 1726 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_STREAM_MATCH; smmu 1729 drivers/iommu/arm-smmu.c dev_err(smmu->dev, smmu 1735 drivers/iommu/arm-smmu.c smmu->smrs = devm_kcalloc(smmu->dev, size, sizeof(*smmu->smrs), smmu 1737 drivers/iommu/arm-smmu.c if (!smmu->smrs) smmu 1740 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, smmu 1744 drivers/iommu/arm-smmu.c smmu->s2crs = devm_kmalloc_array(smmu->dev, size, sizeof(*smmu->s2crs), smmu 1746 drivers/iommu/arm-smmu.c if (!smmu->s2crs) smmu 1749 drivers/iommu/arm-smmu.c smmu->s2crs[i] = s2cr_init_val; smmu 1751 drivers/iommu/arm-smmu.c smmu->num_mapping_groups = size; smmu 1752 drivers/iommu/arm-smmu.c mutex_init(&smmu->stream_map_mutex); smmu 1753 drivers/iommu/arm-smmu.c spin_lock_init(&smmu->global_sync_lock); smmu 1755 drivers/iommu/arm-smmu.c if (smmu->version < ARM_SMMU_V2 || !(id & ID0_PTFS_NO_AARCH32)) { smmu 1756 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_FMT_AARCH32_L; smmu 1758 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_FMT_AARCH32_S; smmu 1762 drivers/iommu/arm-smmu.c id = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_ID1); smmu 1763 drivers/iommu/arm-smmu.c smmu->pgshift = (id & ID1_PAGESIZE) ? 16 : 12; smmu 1767 drivers/iommu/arm-smmu.c if (smmu->numpage != 2 * size << smmu->pgshift) smmu 1768 drivers/iommu/arm-smmu.c dev_warn(smmu->dev, smmu 1770 drivers/iommu/arm-smmu.c 2 * size << smmu->pgshift, smmu->numpage); smmu 1772 drivers/iommu/arm-smmu.c smmu->numpage = size; smmu 1774 drivers/iommu/arm-smmu.c smmu->num_s2_context_banks = FIELD_GET(ID1_NUMS2CB, id); smmu 1775 drivers/iommu/arm-smmu.c smmu->num_context_banks = FIELD_GET(ID1_NUMCB, id); smmu 1776 drivers/iommu/arm-smmu.c if (smmu->num_s2_context_banks > smmu->num_context_banks) { smmu 1777 drivers/iommu/arm-smmu.c dev_err(smmu->dev, "impossible number of S2 context banks!\n"); smmu 1780 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, "\t%u context banks (%u stage-2 only)\n", smmu 1781 drivers/iommu/arm-smmu.c smmu->num_context_banks, smmu->num_s2_context_banks); smmu 1782 drivers/iommu/arm-smmu.c smmu->cbs = devm_kcalloc(smmu->dev, smmu->num_context_banks, smmu 1783 drivers/iommu/arm-smmu.c sizeof(*smmu->cbs), GFP_KERNEL); smmu 1784 drivers/iommu/arm-smmu.c if (!smmu->cbs) smmu 1788 drivers/iommu/arm-smmu.c id = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_ID2); smmu 1790 drivers/iommu/arm-smmu.c smmu->ipa_size = size; smmu 1794 drivers/iommu/arm-smmu.c smmu->pa_size = size; smmu 1797 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_VMID16; smmu 1804 drivers/iommu/arm-smmu.c if (dma_set_mask_and_coherent(smmu->dev, DMA_BIT_MASK(size))) smmu 1805 drivers/iommu/arm-smmu.c dev_warn(smmu->dev, smmu 1808 drivers/iommu/arm-smmu.c if (smmu->version < ARM_SMMU_V2) { smmu 1809 drivers/iommu/arm-smmu.c smmu->va_size = smmu->ipa_size; smmu 1810 drivers/iommu/arm-smmu.c if (smmu->version == ARM_SMMU_V1_64K) smmu 1811 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_FMT_AARCH64_64K; smmu 1814 drivers/iommu/arm-smmu.c smmu->va_size = arm_smmu_id_size_to_bits(size); smmu 1816 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_FMT_AARCH64_4K; smmu 1818 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_FMT_AARCH64_16K; smmu 1820 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_FMT_AARCH64_64K; smmu 1824 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_S) smmu 1825 drivers/iommu/arm-smmu.c smmu->pgsize_bitmap |= SZ_4K | SZ_64K | SZ_1M | SZ_16M; smmu 1826 drivers/iommu/arm-smmu.c if (smmu->features & smmu 1828 drivers/iommu/arm-smmu.c smmu->pgsize_bitmap |= SZ_4K | SZ_2M | SZ_1G; smmu 1829 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_FMT_AARCH64_16K) smmu 1830 drivers/iommu/arm-smmu.c smmu->pgsize_bitmap |= SZ_16K | SZ_32M; smmu 1831 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_FMT_AARCH64_64K) smmu 1832 drivers/iommu/arm-smmu.c smmu->pgsize_bitmap |= SZ_64K | SZ_512M; smmu 1835 drivers/iommu/arm-smmu.c arm_smmu_ops.pgsize_bitmap = smmu->pgsize_bitmap; smmu 1837 drivers/iommu/arm-smmu.c arm_smmu_ops.pgsize_bitmap |= smmu->pgsize_bitmap; smmu 1838 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, "\tSupported page sizes: 0x%08lx\n", smmu 1839 drivers/iommu/arm-smmu.c smmu->pgsize_bitmap); smmu 1842 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_TRANS_S1) smmu 1843 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, "\tStage-1: %lu-bit VA -> %lu-bit IPA\n", smmu 1844 drivers/iommu/arm-smmu.c smmu->va_size, smmu->ipa_size); smmu 1846 drivers/iommu/arm-smmu.c if (smmu->features & ARM_SMMU_FEAT_TRANS_S2) smmu 1847 drivers/iommu/arm-smmu.c dev_notice(smmu->dev, "\tStage-2: %lu-bit IPA -> %lu-bit PA\n", smmu 1848 drivers/iommu/arm-smmu.c smmu->ipa_size, smmu->pa_size); smmu 1850 drivers/iommu/arm-smmu.c if (smmu->impl && smmu->impl->cfg_probe) smmu 1851 drivers/iommu/arm-smmu.c return smmu->impl->cfg_probe(smmu); smmu 1883 drivers/iommu/arm-smmu.c static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu) smmu 1890 drivers/iommu/arm-smmu.c smmu->version = ARM_SMMU_V1; smmu 1891 drivers/iommu/arm-smmu.c smmu->model = GENERIC_SMMU; smmu 1894 drivers/iommu/arm-smmu.c smmu->version = ARM_SMMU_V1_64K; smmu 1895 drivers/iommu/arm-smmu.c smmu->model = GENERIC_SMMU; smmu 1898 drivers/iommu/arm-smmu.c smmu->version = ARM_SMMU_V2; smmu 1899 drivers/iommu/arm-smmu.c smmu->model = GENERIC_SMMU; smmu 1902 drivers/iommu/arm-smmu.c smmu->version = ARM_SMMU_V2; smmu 1903 drivers/iommu/arm-smmu.c smmu->model = ARM_MMU500; smmu 1906 drivers/iommu/arm-smmu.c smmu->version = ARM_SMMU_V2; smmu 1907 drivers/iommu/arm-smmu.c smmu->model = CAVIUM_SMMUV2; smmu 1917 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu) smmu 1919 drivers/iommu/arm-smmu.c struct device *dev = smmu->dev; smmu 1928 drivers/iommu/arm-smmu.c ret = acpi_smmu_get_data(iort_smmu->model, smmu); smmu 1933 drivers/iommu/arm-smmu.c smmu->num_global_irqs = 1; smmu 1936 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_COHERENT_WALK; smmu 1942 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu) smmu 1949 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu) smmu 1956 drivers/iommu/arm-smmu.c &smmu->num_global_irqs)) { smmu 1962 drivers/iommu/arm-smmu.c smmu->version = data->version; smmu 1963 drivers/iommu/arm-smmu.c smmu->model = data->model; smmu 1978 drivers/iommu/arm-smmu.c smmu->features |= ARM_SMMU_FEAT_COHERENT_WALK; smmu 2008 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu; smmu 2012 drivers/iommu/arm-smmu.c smmu = devm_kzalloc(dev, sizeof(*smmu), GFP_KERNEL); smmu 2013 drivers/iommu/arm-smmu.c if (!smmu) { smmu 2017 drivers/iommu/arm-smmu.c smmu->dev = dev; smmu 2020 drivers/iommu/arm-smmu.c err = arm_smmu_device_dt_probe(pdev, smmu); smmu 2022 drivers/iommu/arm-smmu.c err = arm_smmu_device_acpi_probe(pdev, smmu); smmu 2027 drivers/iommu/arm-smmu.c smmu = arm_smmu_impl_init(smmu); smmu 2028 drivers/iommu/arm-smmu.c if (IS_ERR(smmu)) smmu 2029 drivers/iommu/arm-smmu.c return PTR_ERR(smmu); smmu 2033 drivers/iommu/arm-smmu.c smmu->base = devm_ioremap_resource(dev, res); smmu 2034 drivers/iommu/arm-smmu.c if (IS_ERR(smmu->base)) smmu 2035 drivers/iommu/arm-smmu.c return PTR_ERR(smmu->base); smmu 2040 drivers/iommu/arm-smmu.c smmu->numpage = resource_size(res); smmu 2045 drivers/iommu/arm-smmu.c if (num_irqs > smmu->num_global_irqs) smmu 2046 drivers/iommu/arm-smmu.c smmu->num_context_irqs++; smmu 2049 drivers/iommu/arm-smmu.c if (!smmu->num_context_irqs) { smmu 2051 drivers/iommu/arm-smmu.c num_irqs, smmu->num_global_irqs + 1); smmu 2055 drivers/iommu/arm-smmu.c smmu->irqs = devm_kcalloc(dev, num_irqs, sizeof(*smmu->irqs), smmu 2057 drivers/iommu/arm-smmu.c if (!smmu->irqs) { smmu 2069 drivers/iommu/arm-smmu.c smmu->irqs[i] = irq; smmu 2072 drivers/iommu/arm-smmu.c err = devm_clk_bulk_get_all(dev, &smmu->clks); smmu 2077 drivers/iommu/arm-smmu.c smmu->num_clks = err; smmu 2079 drivers/iommu/arm-smmu.c err = clk_bulk_prepare_enable(smmu->num_clks, smmu->clks); smmu 2083 drivers/iommu/arm-smmu.c err = arm_smmu_device_cfg_probe(smmu); smmu 2087 drivers/iommu/arm-smmu.c if (smmu->version == ARM_SMMU_V2) { smmu 2088 drivers/iommu/arm-smmu.c if (smmu->num_context_banks > smmu->num_context_irqs) { smmu 2091 drivers/iommu/arm-smmu.c smmu->num_context_irqs, smmu->num_context_banks); smmu 2096 drivers/iommu/arm-smmu.c smmu->num_context_irqs = smmu->num_context_banks; smmu 2099 drivers/iommu/arm-smmu.c for (i = 0; i < smmu->num_global_irqs; ++i) { smmu 2100 drivers/iommu/arm-smmu.c err = devm_request_irq(smmu->dev, smmu->irqs[i], smmu 2104 drivers/iommu/arm-smmu.c smmu); smmu 2107 drivers/iommu/arm-smmu.c i, smmu->irqs[i]); smmu 2112 drivers/iommu/arm-smmu.c err = iommu_device_sysfs_add(&smmu->iommu, smmu->dev, NULL, smmu 2119 drivers/iommu/arm-smmu.c iommu_device_set_ops(&smmu->iommu, &arm_smmu_ops); smmu 2120 drivers/iommu/arm-smmu.c iommu_device_set_fwnode(&smmu->iommu, dev->fwnode); smmu 2122 drivers/iommu/arm-smmu.c err = iommu_device_register(&smmu->iommu); smmu 2128 drivers/iommu/arm-smmu.c platform_set_drvdata(pdev, smmu); smmu 2129 drivers/iommu/arm-smmu.c arm_smmu_device_reset(smmu); smmu 2130 drivers/iommu/arm-smmu.c arm_smmu_test_smr_masks(smmu); smmu 2170 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = platform_get_drvdata(pdev); smmu 2172 drivers/iommu/arm-smmu.c if (!smmu) smmu 2175 drivers/iommu/arm-smmu.c if (!bitmap_empty(smmu->context_map, ARM_SMMU_MAX_CBS)) smmu 2178 drivers/iommu/arm-smmu.c arm_smmu_rpm_get(smmu); smmu 2180 drivers/iommu/arm-smmu.c arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sCR0, sCR0_CLIENTPD); smmu 2181 drivers/iommu/arm-smmu.c arm_smmu_rpm_put(smmu); smmu 2183 drivers/iommu/arm-smmu.c if (pm_runtime_enabled(smmu->dev)) smmu 2184 drivers/iommu/arm-smmu.c pm_runtime_force_suspend(smmu->dev); smmu 2186 drivers/iommu/arm-smmu.c clk_bulk_disable(smmu->num_clks, smmu->clks); smmu 2188 drivers/iommu/arm-smmu.c clk_bulk_unprepare(smmu->num_clks, smmu->clks); smmu 2193 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = dev_get_drvdata(dev); smmu 2196 drivers/iommu/arm-smmu.c ret = clk_bulk_enable(smmu->num_clks, smmu->clks); smmu 2200 drivers/iommu/arm-smmu.c arm_smmu_device_reset(smmu); smmu 2207 drivers/iommu/arm-smmu.c struct arm_smmu_device *smmu = dev_get_drvdata(dev); smmu 2209 drivers/iommu/arm-smmu.c clk_bulk_disable(smmu->num_clks, smmu->clks); smmu 315 drivers/iommu/arm-smmu.h struct arm_smmu_device *smmu; smmu 329 drivers/iommu/arm-smmu.h u32 (*read_reg)(struct arm_smmu_device *smmu, int page, int offset); smmu 330 drivers/iommu/arm-smmu.h void (*write_reg)(struct arm_smmu_device *smmu, int page, int offset, smmu 332 drivers/iommu/arm-smmu.h u64 (*read_reg64)(struct arm_smmu_device *smmu, int page, int offset); smmu 333 drivers/iommu/arm-smmu.h void (*write_reg64)(struct arm_smmu_device *smmu, int page, int offset, smmu 335 drivers/iommu/arm-smmu.h int (*cfg_probe)(struct arm_smmu_device *smmu); smmu 336 drivers/iommu/arm-smmu.h int (*reset)(struct arm_smmu_device *smmu); smmu 340 drivers/iommu/arm-smmu.h static inline void __iomem *arm_smmu_page(struct arm_smmu_device *smmu, int n) smmu 342 drivers/iommu/arm-smmu.h return smmu->base + (n << smmu->pgshift); smmu 345 drivers/iommu/arm-smmu.h static inline u32 arm_smmu_readl(struct arm_smmu_device *smmu, int page, int offset) smmu 347 drivers/iommu/arm-smmu.h if (smmu->impl && unlikely(smmu->impl->read_reg)) smmu 348 drivers/iommu/arm-smmu.h return smmu->impl->read_reg(smmu, page, offset); smmu 349 drivers/iommu/arm-smmu.h return readl_relaxed(arm_smmu_page(smmu, page) + offset); smmu 352 drivers/iommu/arm-smmu.h static inline void arm_smmu_writel(struct arm_smmu_device *smmu, int page, smmu 355 drivers/iommu/arm-smmu.h if (smmu->impl && unlikely(smmu->impl->write_reg)) smmu 356 drivers/iommu/arm-smmu.h smmu->impl->write_reg(smmu, page, offset, val); smmu 358 drivers/iommu/arm-smmu.h writel_relaxed(val, arm_smmu_page(smmu, page) + offset); smmu 361 drivers/iommu/arm-smmu.h static inline u64 arm_smmu_readq(struct arm_smmu_device *smmu, int page, int offset) smmu 363 drivers/iommu/arm-smmu.h if (smmu->impl && unlikely(smmu->impl->read_reg64)) smmu 364 drivers/iommu/arm-smmu.h return smmu->impl->read_reg64(smmu, page, offset); smmu 365 drivers/iommu/arm-smmu.h return readq_relaxed(arm_smmu_page(smmu, page) + offset); smmu 368 drivers/iommu/arm-smmu.h static inline void arm_smmu_writeq(struct arm_smmu_device *smmu, int page, smmu 371 drivers/iommu/arm-smmu.h if (smmu->impl && unlikely(smmu->impl->write_reg64)) smmu 372 drivers/iommu/arm-smmu.h smmu->impl->write_reg64(smmu, page, offset, val); smmu 374 drivers/iommu/arm-smmu.h writeq_relaxed(val, arm_smmu_page(smmu, page) + offset); smmu 400 drivers/iommu/arm-smmu.h struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu); smmu 50 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu; smmu 65 drivers/iommu/tegra-smmu.c static inline void smmu_writel(struct tegra_smmu *smmu, u32 value, smmu 68 drivers/iommu/tegra-smmu.c writel(value, smmu->regs + offset); smmu 71 drivers/iommu/tegra-smmu.c static inline u32 smmu_readl(struct tegra_smmu *smmu, unsigned long offset) smmu 73 drivers/iommu/tegra-smmu.c return readl(smmu->regs + offset); smmu 82 drivers/iommu/tegra-smmu.c #define SMMU_TLB_CONFIG_ACTIVE_LINES(smmu) \ smmu 83 drivers/iommu/tegra-smmu.c ((smmu)->soc->num_tlb_lines & (smmu)->tlb_mask) smmu 156 drivers/iommu/tegra-smmu.c static bool smmu_dma_addr_valid(struct tegra_smmu *smmu, dma_addr_t addr) smmu 159 drivers/iommu/tegra-smmu.c return (addr & smmu->pfn_mask) == addr; smmu 162 drivers/iommu/tegra-smmu.c static dma_addr_t smmu_pde_to_dma(struct tegra_smmu *smmu, u32 pde) smmu 164 drivers/iommu/tegra-smmu.c return (dma_addr_t)(pde & smmu->pfn_mask) << 12; smmu 167 drivers/iommu/tegra-smmu.c static void smmu_flush_ptc_all(struct tegra_smmu *smmu) smmu 169 drivers/iommu/tegra-smmu.c smmu_writel(smmu, SMMU_PTC_FLUSH_TYPE_ALL, SMMU_PTC_FLUSH); smmu 172 drivers/iommu/tegra-smmu.c static inline void smmu_flush_ptc(struct tegra_smmu *smmu, dma_addr_t dma, smmu 177 drivers/iommu/tegra-smmu.c offset &= ~(smmu->mc->soc->atom_size - 1); smmu 179 drivers/iommu/tegra-smmu.c if (smmu->mc->soc->num_address_bits > 32) { smmu 185 drivers/iommu/tegra-smmu.c smmu_writel(smmu, value, SMMU_PTC_FLUSH_HI); smmu 189 drivers/iommu/tegra-smmu.c smmu_writel(smmu, value, SMMU_PTC_FLUSH); smmu 192 drivers/iommu/tegra-smmu.c static inline void smmu_flush_tlb(struct tegra_smmu *smmu) smmu 194 drivers/iommu/tegra-smmu.c smmu_writel(smmu, SMMU_TLB_FLUSH_VA_MATCH_ALL, SMMU_TLB_FLUSH); smmu 197 drivers/iommu/tegra-smmu.c static inline void smmu_flush_tlb_asid(struct tegra_smmu *smmu, smmu 202 drivers/iommu/tegra-smmu.c if (smmu->soc->num_asids == 4) smmu 208 drivers/iommu/tegra-smmu.c smmu_writel(smmu, value, SMMU_TLB_FLUSH); smmu 211 drivers/iommu/tegra-smmu.c static inline void smmu_flush_tlb_section(struct tegra_smmu *smmu, smmu 217 drivers/iommu/tegra-smmu.c if (smmu->soc->num_asids == 4) smmu 223 drivers/iommu/tegra-smmu.c smmu_writel(smmu, value, SMMU_TLB_FLUSH); smmu 226 drivers/iommu/tegra-smmu.c static inline void smmu_flush_tlb_group(struct tegra_smmu *smmu, smmu 232 drivers/iommu/tegra-smmu.c if (smmu->soc->num_asids == 4) smmu 238 drivers/iommu/tegra-smmu.c smmu_writel(smmu, value, SMMU_TLB_FLUSH); smmu 241 drivers/iommu/tegra-smmu.c static inline void smmu_flush(struct tegra_smmu *smmu) smmu 243 drivers/iommu/tegra-smmu.c smmu_readl(smmu, SMMU_CONFIG); smmu 246 drivers/iommu/tegra-smmu.c static int tegra_smmu_alloc_asid(struct tegra_smmu *smmu, unsigned int *idp) smmu 250 drivers/iommu/tegra-smmu.c mutex_lock(&smmu->lock); smmu 252 drivers/iommu/tegra-smmu.c id = find_first_zero_bit(smmu->asids, smmu->soc->num_asids); smmu 253 drivers/iommu/tegra-smmu.c if (id >= smmu->soc->num_asids) { smmu 254 drivers/iommu/tegra-smmu.c mutex_unlock(&smmu->lock); smmu 258 drivers/iommu/tegra-smmu.c set_bit(id, smmu->asids); smmu 261 drivers/iommu/tegra-smmu.c mutex_unlock(&smmu->lock); smmu 265 drivers/iommu/tegra-smmu.c static void tegra_smmu_free_asid(struct tegra_smmu *smmu, unsigned int id) smmu 267 drivers/iommu/tegra-smmu.c mutex_lock(&smmu->lock); smmu 268 drivers/iommu/tegra-smmu.c clear_bit(id, smmu->asids); smmu 269 drivers/iommu/tegra-smmu.c mutex_unlock(&smmu->lock); smmu 332 drivers/iommu/tegra-smmu.c tegra_smmu_find_swgroup(struct tegra_smmu *smmu, unsigned int swgroup) smmu 337 drivers/iommu/tegra-smmu.c for (i = 0; i < smmu->soc->num_swgroups; i++) { smmu 338 drivers/iommu/tegra-smmu.c if (smmu->soc->swgroups[i].swgroup == swgroup) { smmu 339 drivers/iommu/tegra-smmu.c group = &smmu->soc->swgroups[i]; smmu 347 drivers/iommu/tegra-smmu.c static void tegra_smmu_enable(struct tegra_smmu *smmu, unsigned int swgroup, smmu 354 drivers/iommu/tegra-smmu.c for (i = 0; i < smmu->soc->num_clients; i++) { smmu 355 drivers/iommu/tegra-smmu.c const struct tegra_mc_client *client = &smmu->soc->clients[i]; smmu 360 drivers/iommu/tegra-smmu.c value = smmu_readl(smmu, client->smmu.reg); smmu 361 drivers/iommu/tegra-smmu.c value |= BIT(client->smmu.bit); smmu 362 drivers/iommu/tegra-smmu.c smmu_writel(smmu, value, client->smmu.reg); smmu 365 drivers/iommu/tegra-smmu.c group = tegra_smmu_find_swgroup(smmu, swgroup); smmu 367 drivers/iommu/tegra-smmu.c value = smmu_readl(smmu, group->reg); smmu 371 drivers/iommu/tegra-smmu.c smmu_writel(smmu, value, group->reg); smmu 375 drivers/iommu/tegra-smmu.c static void tegra_smmu_disable(struct tegra_smmu *smmu, unsigned int swgroup, smmu 382 drivers/iommu/tegra-smmu.c group = tegra_smmu_find_swgroup(smmu, swgroup); smmu 384 drivers/iommu/tegra-smmu.c value = smmu_readl(smmu, group->reg); smmu 388 drivers/iommu/tegra-smmu.c smmu_writel(smmu, value, group->reg); smmu 391 drivers/iommu/tegra-smmu.c for (i = 0; i < smmu->soc->num_clients; i++) { smmu 392 drivers/iommu/tegra-smmu.c const struct tegra_mc_client *client = &smmu->soc->clients[i]; smmu 397 drivers/iommu/tegra-smmu.c value = smmu_readl(smmu, client->smmu.reg); smmu 398 drivers/iommu/tegra-smmu.c value &= ~BIT(client->smmu.bit); smmu 399 drivers/iommu/tegra-smmu.c smmu_writel(smmu, value, client->smmu.reg); smmu 403 drivers/iommu/tegra-smmu.c static int tegra_smmu_as_prepare(struct tegra_smmu *smmu, smmu 414 drivers/iommu/tegra-smmu.c as->pd_dma = dma_map_page(smmu->dev, as->pd, 0, SMMU_SIZE_PD, smmu 416 drivers/iommu/tegra-smmu.c if (dma_mapping_error(smmu->dev, as->pd_dma)) smmu 420 drivers/iommu/tegra-smmu.c if (!smmu_dma_addr_valid(smmu, as->pd_dma)) { smmu 425 drivers/iommu/tegra-smmu.c err = tegra_smmu_alloc_asid(smmu, &as->id); smmu 429 drivers/iommu/tegra-smmu.c smmu_flush_ptc(smmu, as->pd_dma, 0); smmu 430 drivers/iommu/tegra-smmu.c smmu_flush_tlb_asid(smmu, as->id); smmu 432 drivers/iommu/tegra-smmu.c smmu_writel(smmu, as->id & 0x7f, SMMU_PTB_ASID); smmu 434 drivers/iommu/tegra-smmu.c smmu_writel(smmu, value, SMMU_PTB_DATA); smmu 435 drivers/iommu/tegra-smmu.c smmu_flush(smmu); smmu 437 drivers/iommu/tegra-smmu.c as->smmu = smmu; smmu 443 drivers/iommu/tegra-smmu.c dma_unmap_page(smmu->dev, as->pd_dma, SMMU_SIZE_PD, DMA_TO_DEVICE); smmu 447 drivers/iommu/tegra-smmu.c static void tegra_smmu_as_unprepare(struct tegra_smmu *smmu, smmu 453 drivers/iommu/tegra-smmu.c tegra_smmu_free_asid(smmu, as->id); smmu 455 drivers/iommu/tegra-smmu.c dma_unmap_page(smmu->dev, as->pd_dma, SMMU_SIZE_PD, DMA_TO_DEVICE); smmu 457 drivers/iommu/tegra-smmu.c as->smmu = NULL; smmu 463 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu = dev->archdata.iommu; smmu 474 drivers/iommu/tegra-smmu.c if (args.np != smmu->dev->of_node) { smmu 481 drivers/iommu/tegra-smmu.c err = tegra_smmu_as_prepare(smmu, as); smmu 485 drivers/iommu/tegra-smmu.c tegra_smmu_enable(smmu, swgroup, as->id); smmu 499 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu = as->smmu; smmu 507 drivers/iommu/tegra-smmu.c if (args.np != smmu->dev->of_node) { smmu 514 drivers/iommu/tegra-smmu.c tegra_smmu_disable(smmu, swgroup, as->id); smmu 515 drivers/iommu/tegra-smmu.c tegra_smmu_as_unprepare(smmu, as); smmu 524 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu = as->smmu; smmu 532 drivers/iommu/tegra-smmu.c dma_sync_single_range_for_device(smmu->dev, as->pd_dma, offset, smmu 536 drivers/iommu/tegra-smmu.c smmu_flush_ptc(smmu, as->pd_dma, offset); smmu 537 drivers/iommu/tegra-smmu.c smmu_flush_tlb_section(smmu, as->id, iova); smmu 538 drivers/iommu/tegra-smmu.c smmu_flush(smmu); smmu 552 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu = as->smmu; smmu 561 drivers/iommu/tegra-smmu.c *dmap = smmu_pde_to_dma(smmu, pd[pd_index]); smmu 570 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu = as->smmu; smmu 580 drivers/iommu/tegra-smmu.c dma = dma_map_page(smmu->dev, page, 0, SMMU_SIZE_PT, smmu 582 drivers/iommu/tegra-smmu.c if (dma_mapping_error(smmu->dev, dma)) { smmu 587 drivers/iommu/tegra-smmu.c if (!smmu_dma_addr_valid(smmu, dma)) { smmu 588 drivers/iommu/tegra-smmu.c dma_unmap_page(smmu->dev, dma, SMMU_SIZE_PT, smmu 603 drivers/iommu/tegra-smmu.c *dmap = smmu_pde_to_dma(smmu, pd[pde]); smmu 626 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu = as->smmu; smmu 628 drivers/iommu/tegra-smmu.c dma_addr_t pte_dma = smmu_pde_to_dma(smmu, pd[pde]); smmu 632 drivers/iommu/tegra-smmu.c dma_unmap_page(smmu->dev, pte_dma, SMMU_SIZE_PT, DMA_TO_DEVICE); smmu 641 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu = as->smmu; smmu 646 drivers/iommu/tegra-smmu.c dma_sync_single_range_for_device(smmu->dev, pte_dma, offset, smmu 648 drivers/iommu/tegra-smmu.c smmu_flush_ptc(smmu, pte_dma, offset); smmu 649 drivers/iommu/tegra-smmu.c smmu_flush_tlb_group(smmu, as->id, iova); smmu 650 drivers/iommu/tegra-smmu.c smmu_flush(smmu); smmu 712 drivers/iommu/tegra-smmu.c pfn = *pte & as->smmu->pfn_mask; smmu 730 drivers/iommu/tegra-smmu.c return mc->smmu; smmu 733 drivers/iommu/tegra-smmu.c static int tegra_smmu_configure(struct tegra_smmu *smmu, struct device *dev, smmu 736 drivers/iommu/tegra-smmu.c const struct iommu_ops *ops = smmu->iommu.ops; smmu 758 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu = NULL; smmu 766 drivers/iommu/tegra-smmu.c smmu = tegra_smmu_find(args.np); smmu 767 drivers/iommu/tegra-smmu.c if (smmu) { smmu 768 drivers/iommu/tegra-smmu.c err = tegra_smmu_configure(smmu, dev, &args); smmu 779 drivers/iommu/tegra-smmu.c dev->archdata.iommu = smmu; smmu 781 drivers/iommu/tegra-smmu.c iommu_device_link(&smmu->iommu, dev); smmu 790 drivers/iommu/tegra-smmu.c if (!smmu) smmu 804 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu = dev->archdata.iommu; smmu 806 drivers/iommu/tegra-smmu.c if (smmu) smmu 807 drivers/iommu/tegra-smmu.c iommu_device_unlink(&smmu->iommu, dev); smmu 814 drivers/iommu/tegra-smmu.c tegra_smmu_find_group(struct tegra_smmu *smmu, unsigned int swgroup) smmu 818 drivers/iommu/tegra-smmu.c for (i = 0; i < smmu->soc->num_groups; i++) smmu 819 drivers/iommu/tegra-smmu.c for (j = 0; j < smmu->soc->groups[i].num_swgroups; j++) smmu 820 drivers/iommu/tegra-smmu.c if (smmu->soc->groups[i].swgroups[j] == swgroup) smmu 821 drivers/iommu/tegra-smmu.c return &smmu->soc->groups[i]; smmu 826 drivers/iommu/tegra-smmu.c static struct iommu_group *tegra_smmu_group_get(struct tegra_smmu *smmu, smmu 832 drivers/iommu/tegra-smmu.c soc = tegra_smmu_find_group(smmu, swgroup); smmu 836 drivers/iommu/tegra-smmu.c mutex_lock(&smmu->lock); smmu 838 drivers/iommu/tegra-smmu.c list_for_each_entry(group, &smmu->groups, list) smmu 840 drivers/iommu/tegra-smmu.c mutex_unlock(&smmu->lock); smmu 844 drivers/iommu/tegra-smmu.c group = devm_kzalloc(smmu->dev, sizeof(*group), GFP_KERNEL); smmu 846 drivers/iommu/tegra-smmu.c mutex_unlock(&smmu->lock); smmu 855 drivers/iommu/tegra-smmu.c devm_kfree(smmu->dev, group); smmu 856 drivers/iommu/tegra-smmu.c mutex_unlock(&smmu->lock); smmu 860 drivers/iommu/tegra-smmu.c list_add_tail(&group->list, &smmu->groups); smmu 861 drivers/iommu/tegra-smmu.c mutex_unlock(&smmu->lock); smmu 869 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu = dev->archdata.iommu; smmu 872 drivers/iommu/tegra-smmu.c group = tegra_smmu_group_get(smmu, fwspec->ids[0]); smmu 920 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu = s->private; smmu 927 drivers/iommu/tegra-smmu.c for (i = 0; i < smmu->soc->num_swgroups; i++) { smmu 928 drivers/iommu/tegra-smmu.c const struct tegra_smmu_swgroup *group = &smmu->soc->swgroups[i]; smmu 932 drivers/iommu/tegra-smmu.c value = smmu_readl(smmu, group->reg); smmu 952 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu = s->private; smmu 959 drivers/iommu/tegra-smmu.c for (i = 0; i < smmu->soc->num_clients; i++) { smmu 960 drivers/iommu/tegra-smmu.c const struct tegra_mc_client *client = &smmu->soc->clients[i]; smmu 963 drivers/iommu/tegra-smmu.c value = smmu_readl(smmu, client->smmu.reg); smmu 965 drivers/iommu/tegra-smmu.c if (value & BIT(client->smmu.bit)) smmu 978 drivers/iommu/tegra-smmu.c static void tegra_smmu_debugfs_init(struct tegra_smmu *smmu) smmu 980 drivers/iommu/tegra-smmu.c smmu->debugfs = debugfs_create_dir("smmu", NULL); smmu 981 drivers/iommu/tegra-smmu.c if (!smmu->debugfs) smmu 984 drivers/iommu/tegra-smmu.c debugfs_create_file("swgroups", S_IRUGO, smmu->debugfs, smmu, smmu 986 drivers/iommu/tegra-smmu.c debugfs_create_file("clients", S_IRUGO, smmu->debugfs, smmu, smmu 990 drivers/iommu/tegra-smmu.c static void tegra_smmu_debugfs_exit(struct tegra_smmu *smmu) smmu 992 drivers/iommu/tegra-smmu.c debugfs_remove_recursive(smmu->debugfs); smmu 999 drivers/iommu/tegra-smmu.c struct tegra_smmu *smmu; smmu 1004 drivers/iommu/tegra-smmu.c smmu = devm_kzalloc(dev, sizeof(*smmu), GFP_KERNEL); smmu 1005 drivers/iommu/tegra-smmu.c if (!smmu) smmu 1016 drivers/iommu/tegra-smmu.c mc->smmu = smmu; smmu 1020 drivers/iommu/tegra-smmu.c smmu->asids = devm_kzalloc(dev, size, GFP_KERNEL); smmu 1021 drivers/iommu/tegra-smmu.c if (!smmu->asids) smmu 1024 drivers/iommu/tegra-smmu.c INIT_LIST_HEAD(&smmu->groups); smmu 1025 drivers/iommu/tegra-smmu.c mutex_init(&smmu->lock); smmu 1027 drivers/iommu/tegra-smmu.c smmu->regs = mc->regs; smmu 1028 drivers/iommu/tegra-smmu.c smmu->soc = soc; smmu 1029 drivers/iommu/tegra-smmu.c smmu->dev = dev; smmu 1030 drivers/iommu/tegra-smmu.c smmu->mc = mc; smmu 1032 drivers/iommu/tegra-smmu.c smmu->pfn_mask = BIT_MASK(mc->soc->num_address_bits - PAGE_SHIFT) - 1; smmu 1034 drivers/iommu/tegra-smmu.c mc->soc->num_address_bits, smmu->pfn_mask); smmu 1035 drivers/iommu/tegra-smmu.c smmu->tlb_mask = (smmu->soc->num_tlb_lines << 1) - 1; smmu 1036 drivers/iommu/tegra-smmu.c dev_dbg(dev, "TLB lines: %u, mask: %#lx\n", smmu->soc->num_tlb_lines, smmu 1037 drivers/iommu/tegra-smmu.c smmu->tlb_mask); smmu 1044 drivers/iommu/tegra-smmu.c smmu_writel(smmu, value, SMMU_PTC_CONFIG); smmu 1047 drivers/iommu/tegra-smmu.c SMMU_TLB_CONFIG_ACTIVE_LINES(smmu); smmu 1052 drivers/iommu/tegra-smmu.c smmu_writel(smmu, value, SMMU_TLB_CONFIG); smmu 1054 drivers/iommu/tegra-smmu.c smmu_flush_ptc_all(smmu); smmu 1055 drivers/iommu/tegra-smmu.c smmu_flush_tlb(smmu); smmu 1056 drivers/iommu/tegra-smmu.c smmu_writel(smmu, SMMU_CONFIG_ENABLE, SMMU_CONFIG); smmu 1057 drivers/iommu/tegra-smmu.c smmu_flush(smmu); smmu 1061 drivers/iommu/tegra-smmu.c err = iommu_device_sysfs_add(&smmu->iommu, dev, NULL, dev_name(dev)); smmu 1065 drivers/iommu/tegra-smmu.c iommu_device_set_ops(&smmu->iommu, &tegra_smmu_ops); smmu 1066 drivers/iommu/tegra-smmu.c iommu_device_set_fwnode(&smmu->iommu, dev->fwnode); smmu 1068 drivers/iommu/tegra-smmu.c err = iommu_device_register(&smmu->iommu); smmu 1070 drivers/iommu/tegra-smmu.c iommu_device_sysfs_remove(&smmu->iommu); smmu 1076 drivers/iommu/tegra-smmu.c iommu_device_unregister(&smmu->iommu); smmu 1077 drivers/iommu/tegra-smmu.c iommu_device_sysfs_remove(&smmu->iommu); smmu 1082 drivers/iommu/tegra-smmu.c tegra_smmu_debugfs_init(smmu); smmu 1084 drivers/iommu/tegra-smmu.c return smmu; smmu 1087 drivers/iommu/tegra-smmu.c void tegra_smmu_remove(struct tegra_smmu *smmu) smmu 1089 drivers/iommu/tegra-smmu.c iommu_device_unregister(&smmu->iommu); smmu 1090 drivers/iommu/tegra-smmu.c iommu_device_sysfs_remove(&smmu->iommu); smmu 1093 drivers/iommu/tegra-smmu.c tegra_smmu_debugfs_exit(smmu); smmu 702 drivers/memory/tegra/mc.c if (IS_ENABLED(CONFIG_TEGRA_IOMMU_SMMU) && mc->soc->smmu) { smmu 703 drivers/memory/tegra/mc.c mc->smmu = tegra_smmu_probe(&pdev->dev, mc->soc->smmu, mc); smmu 704 drivers/memory/tegra/mc.c if (IS_ERR(mc->smmu)) { smmu 706 drivers/memory/tegra/mc.c PTR_ERR(mc->smmu)); smmu 707 drivers/memory/tegra/mc.c mc->smmu = NULL; smmu 711 drivers/memory/tegra/mc.c if (IS_ENABLED(CONFIG_TEGRA_IOMMU_GART) && !mc->soc->smmu) { smmu 22 drivers/memory/tegra/tegra114.c .smmu = { smmu 36 drivers/memory/tegra/tegra114.c .smmu = { smmu 50 drivers/memory/tegra/tegra114.c .smmu = { smmu 64 drivers/memory/tegra/tegra114.c .smmu = { smmu 78 drivers/memory/tegra/tegra114.c .smmu = { smmu 92 drivers/memory/tegra/tegra114.c .smmu = { smmu 106 drivers/memory/tegra/tegra114.c .smmu = { smmu 120 drivers/memory/tegra/tegra114.c .smmu = { smmu 134 drivers/memory/tegra/tegra114.c .smmu = { smmu 148 drivers/memory/tegra/tegra114.c .smmu = { smmu 162 drivers/memory/tegra/tegra114.c .smmu = { smmu 176 drivers/memory/tegra/tegra114.c .smmu = { smmu 190 drivers/memory/tegra/tegra114.c .smmu = { smmu 204 drivers/memory/tegra/tegra114.c .smmu = { smmu 218 drivers/memory/tegra/tegra114.c .smmu = { smmu 232 drivers/memory/tegra/tegra114.c .smmu = { smmu 246 drivers/memory/tegra/tegra114.c .smmu = { smmu 260 drivers/memory/tegra/tegra114.c .smmu = { smmu 274 drivers/memory/tegra/tegra114.c .smmu = { smmu 288 drivers/memory/tegra/tegra114.c .smmu = { smmu 302 drivers/memory/tegra/tegra114.c .smmu = { smmu 316 drivers/memory/tegra/tegra114.c .smmu = { smmu 330 drivers/memory/tegra/tegra114.c .smmu = { smmu 344 drivers/memory/tegra/tegra114.c .smmu = { smmu 358 drivers/memory/tegra/tegra114.c .smmu = { smmu 372 drivers/memory/tegra/tegra114.c .smmu = { smmu 386 drivers/memory/tegra/tegra114.c .smmu = { smmu 420 drivers/memory/tegra/tegra114.c .smmu = { smmu 434 drivers/memory/tegra/tegra114.c .smmu = { smmu 448 drivers/memory/tegra/tegra114.c .smmu = { smmu 462 drivers/memory/tegra/tegra114.c .smmu = { smmu 476 drivers/memory/tegra/tegra114.c .smmu = { smmu 490 drivers/memory/tegra/tegra114.c .smmu = { smmu 504 drivers/memory/tegra/tegra114.c .smmu = { smmu 518 drivers/memory/tegra/tegra114.c .smmu = { smmu 532 drivers/memory/tegra/tegra114.c .smmu = { smmu 546 drivers/memory/tegra/tegra114.c .smmu = { smmu 560 drivers/memory/tegra/tegra114.c .smmu = { smmu 574 drivers/memory/tegra/tegra114.c .smmu = { smmu 588 drivers/memory/tegra/tegra114.c .smmu = { smmu 602 drivers/memory/tegra/tegra114.c .smmu = { smmu 616 drivers/memory/tegra/tegra114.c .smmu = { smmu 650 drivers/memory/tegra/tegra114.c .smmu = { smmu 664 drivers/memory/tegra/tegra114.c .smmu = { smmu 678 drivers/memory/tegra/tegra114.c .smmu = { smmu 692 drivers/memory/tegra/tegra114.c .smmu = { smmu 706 drivers/memory/tegra/tegra114.c .smmu = { smmu 720 drivers/memory/tegra/tegra114.c .smmu = { smmu 734 drivers/memory/tegra/tegra114.c .smmu = { smmu 748 drivers/memory/tegra/tegra114.c .smmu = { smmu 762 drivers/memory/tegra/tegra114.c .smmu = { smmu 776 drivers/memory/tegra/tegra114.c .smmu = { smmu 790 drivers/memory/tegra/tegra114.c .smmu = { smmu 804 drivers/memory/tegra/tegra114.c .smmu = { smmu 818 drivers/memory/tegra/tegra114.c .smmu = { smmu 832 drivers/memory/tegra/tegra114.c .smmu = { smmu 866 drivers/memory/tegra/tegra114.c .smmu = { smmu 880 drivers/memory/tegra/tegra114.c .smmu = { smmu 972 drivers/memory/tegra/tegra114.c .smmu = &tegra114_smmu_soc, smmu 42 drivers/memory/tegra/tegra124.c .smmu = { smmu 56 drivers/memory/tegra/tegra124.c .smmu = { smmu 70 drivers/memory/tegra/tegra124.c .smmu = { smmu 84 drivers/memory/tegra/tegra124.c .smmu = { smmu 98 drivers/memory/tegra/tegra124.c .smmu = { smmu 112 drivers/memory/tegra/tegra124.c .smmu = { smmu 126 drivers/memory/tegra/tegra124.c .smmu = { smmu 140 drivers/memory/tegra/tegra124.c .smmu = { smmu 154 drivers/memory/tegra/tegra124.c .smmu = { smmu 168 drivers/memory/tegra/tegra124.c .smmu = { smmu 182 drivers/memory/tegra/tegra124.c .smmu = { smmu 196 drivers/memory/tegra/tegra124.c .smmu = { smmu 210 drivers/memory/tegra/tegra124.c .smmu = { smmu 224 drivers/memory/tegra/tegra124.c .smmu = { smmu 238 drivers/memory/tegra/tegra124.c .smmu = { smmu 252 drivers/memory/tegra/tegra124.c .smmu = { smmu 266 drivers/memory/tegra/tegra124.c .smmu = { smmu 280 drivers/memory/tegra/tegra124.c .smmu = { smmu 294 drivers/memory/tegra/tegra124.c .smmu = { smmu 308 drivers/memory/tegra/tegra124.c .smmu = { smmu 322 drivers/memory/tegra/tegra124.c .smmu = { smmu 356 drivers/memory/tegra/tegra124.c .smmu = { smmu 370 drivers/memory/tegra/tegra124.c .smmu = { smmu 384 drivers/memory/tegra/tegra124.c .smmu = { smmu 398 drivers/memory/tegra/tegra124.c .smmu = { smmu 412 drivers/memory/tegra/tegra124.c .smmu = { smmu 446 drivers/memory/tegra/tegra124.c .smmu = { smmu 460 drivers/memory/tegra/tegra124.c .smmu = { smmu 474 drivers/memory/tegra/tegra124.c .smmu = { smmu 488 drivers/memory/tegra/tegra124.c .smmu = { smmu 502 drivers/memory/tegra/tegra124.c .smmu = { smmu 516 drivers/memory/tegra/tegra124.c .smmu = { smmu 530 drivers/memory/tegra/tegra124.c .smmu = { smmu 544 drivers/memory/tegra/tegra124.c .smmu = { smmu 558 drivers/memory/tegra/tegra124.c .smmu = { smmu 572 drivers/memory/tegra/tegra124.c .smmu = { smmu 586 drivers/memory/tegra/tegra124.c .smmu = { smmu 600 drivers/memory/tegra/tegra124.c .smmu = { smmu 614 drivers/memory/tegra/tegra124.c .smmu = { smmu 628 drivers/memory/tegra/tegra124.c .smmu = { smmu 642 drivers/memory/tegra/tegra124.c .smmu = { smmu 656 drivers/memory/tegra/tegra124.c .smmu = { smmu 670 drivers/memory/tegra/tegra124.c .smmu = { smmu 684 drivers/memory/tegra/tegra124.c .smmu = { smmu 698 drivers/memory/tegra/tegra124.c .smmu = { smmu 712 drivers/memory/tegra/tegra124.c .smmu = { smmu 726 drivers/memory/tegra/tegra124.c .smmu = { smmu 740 drivers/memory/tegra/tegra124.c .smmu = { smmu 755 drivers/memory/tegra/tegra124.c .smmu = { smmu 770 drivers/memory/tegra/tegra124.c .smmu = { smmu 784 drivers/memory/tegra/tegra124.c .smmu = { smmu 798 drivers/memory/tegra/tegra124.c .smmu = { smmu 812 drivers/memory/tegra/tegra124.c .smmu = { smmu 826 drivers/memory/tegra/tegra124.c .smmu = { smmu 840 drivers/memory/tegra/tegra124.c .smmu = { smmu 854 drivers/memory/tegra/tegra124.c .smmu = { smmu 868 drivers/memory/tegra/tegra124.c .smmu = { smmu 882 drivers/memory/tegra/tegra124.c .smmu = { smmu 896 drivers/memory/tegra/tegra124.c .smmu = { smmu 910 drivers/memory/tegra/tegra124.c .smmu = { smmu 924 drivers/memory/tegra/tegra124.c .smmu = { smmu 938 drivers/memory/tegra/tegra124.c .smmu = { smmu 1068 drivers/memory/tegra/tegra124.c .smmu = &tegra124_smmu_soc, smmu 1100 drivers/memory/tegra/tegra124.c .smmu = &tegra132_smmu_soc, smmu 19 drivers/memory/tegra/tegra210.c .smmu = { smmu 33 drivers/memory/tegra/tegra210.c .smmu = { smmu 47 drivers/memory/tegra/tegra210.c .smmu = { smmu 61 drivers/memory/tegra/tegra210.c .smmu = { smmu 75 drivers/memory/tegra/tegra210.c .smmu = { smmu 89 drivers/memory/tegra/tegra210.c .smmu = { smmu 103 drivers/memory/tegra/tegra210.c .smmu = { smmu 117 drivers/memory/tegra/tegra210.c .smmu = { smmu 131 drivers/memory/tegra/tegra210.c .smmu = { smmu 145 drivers/memory/tegra/tegra210.c .smmu = { smmu 159 drivers/memory/tegra/tegra210.c .smmu = { smmu 173 drivers/memory/tegra/tegra210.c .smmu = { smmu 187 drivers/memory/tegra/tegra210.c .smmu = { smmu 201 drivers/memory/tegra/tegra210.c .smmu = { smmu 215 drivers/memory/tegra/tegra210.c .smmu = { smmu 229 drivers/memory/tegra/tegra210.c .smmu = { smmu 243 drivers/memory/tegra/tegra210.c .smmu = { smmu 267 drivers/memory/tegra/tegra210.c .smmu = { smmu 281 drivers/memory/tegra/tegra210.c .smmu = { smmu 295 drivers/memory/tegra/tegra210.c .smmu = { smmu 309 drivers/memory/tegra/tegra210.c .smmu = { smmu 323 drivers/memory/tegra/tegra210.c .smmu = { smmu 347 drivers/memory/tegra/tegra210.c .smmu = { smmu 361 drivers/memory/tegra/tegra210.c .smmu = { smmu 375 drivers/memory/tegra/tegra210.c .smmu = { smmu 389 drivers/memory/tegra/tegra210.c .smmu = { smmu 403 drivers/memory/tegra/tegra210.c .smmu = { smmu 417 drivers/memory/tegra/tegra210.c .smmu = { smmu 431 drivers/memory/tegra/tegra210.c .smmu = { smmu 445 drivers/memory/tegra/tegra210.c .smmu = { smmu 459 drivers/memory/tegra/tegra210.c .smmu = { smmu 473 drivers/memory/tegra/tegra210.c .smmu = { smmu 487 drivers/memory/tegra/tegra210.c .smmu = { smmu 501 drivers/memory/tegra/tegra210.c .smmu = { smmu 515 drivers/memory/tegra/tegra210.c .smmu = { smmu 529 drivers/memory/tegra/tegra210.c .smmu = { smmu 543 drivers/memory/tegra/tegra210.c .smmu = { smmu 557 drivers/memory/tegra/tegra210.c .smmu = { smmu 571 drivers/memory/tegra/tegra210.c .smmu = { smmu 585 drivers/memory/tegra/tegra210.c .smmu = { smmu 600 drivers/memory/tegra/tegra210.c .smmu = { smmu 615 drivers/memory/tegra/tegra210.c .smmu = { smmu 629 drivers/memory/tegra/tegra210.c .smmu = { smmu 643 drivers/memory/tegra/tegra210.c .smmu = { smmu 657 drivers/memory/tegra/tegra210.c .smmu = { smmu 671 drivers/memory/tegra/tegra210.c .smmu = { smmu 685 drivers/memory/tegra/tegra210.c .smmu = { smmu 699 drivers/memory/tegra/tegra210.c .smmu = { smmu 713 drivers/memory/tegra/tegra210.c .smmu = { smmu 727 drivers/memory/tegra/tegra210.c .smmu = { smmu 741 drivers/memory/tegra/tegra210.c .smmu = { smmu 755 drivers/memory/tegra/tegra210.c .smmu = { smmu 769 drivers/memory/tegra/tegra210.c .smmu = { smmu 783 drivers/memory/tegra/tegra210.c .smmu = { smmu 797 drivers/memory/tegra/tegra210.c .smmu = { smmu 811 drivers/memory/tegra/tegra210.c .smmu = { smmu 825 drivers/memory/tegra/tegra210.c .smmu = { smmu 839 drivers/memory/tegra/tegra210.c .smmu = { smmu 853 drivers/memory/tegra/tegra210.c .smmu = { smmu 867 drivers/memory/tegra/tegra210.c .smmu = { smmu 881 drivers/memory/tegra/tegra210.c .smmu = { smmu 895 drivers/memory/tegra/tegra210.c .smmu = { smmu 909 drivers/memory/tegra/tegra210.c .smmu = { smmu 923 drivers/memory/tegra/tegra210.c .smmu = { smmu 937 drivers/memory/tegra/tegra210.c .smmu = { smmu 951 drivers/memory/tegra/tegra210.c .smmu = { smmu 965 drivers/memory/tegra/tegra210.c .smmu = { smmu 979 drivers/memory/tegra/tegra210.c .smmu = { smmu 993 drivers/memory/tegra/tegra210.c .smmu = { smmu 1008 drivers/memory/tegra/tegra210.c .smmu = { smmu 1128 drivers/memory/tegra/tegra210.c .smmu = &tegra210_smmu_soc, smmu 22 drivers/memory/tegra/tegra30.c .smmu = { smmu 36 drivers/memory/tegra/tegra30.c .smmu = { smmu 50 drivers/memory/tegra/tegra30.c .smmu = { smmu 64 drivers/memory/tegra/tegra30.c .smmu = { smmu 78 drivers/memory/tegra/tegra30.c .smmu = { smmu 92 drivers/memory/tegra/tegra30.c .smmu = { smmu 106 drivers/memory/tegra/tegra30.c .smmu = { smmu 120 drivers/memory/tegra/tegra30.c .smmu = { smmu 134 drivers/memory/tegra/tegra30.c .smmu = { smmu 148 drivers/memory/tegra/tegra30.c .smmu = { smmu 162 drivers/memory/tegra/tegra30.c .smmu = { smmu 176 drivers/memory/tegra/tegra30.c .smmu = { smmu 190 drivers/memory/tegra/tegra30.c .smmu = { smmu 204 drivers/memory/tegra/tegra30.c .smmu = { smmu 218 drivers/memory/tegra/tegra30.c .smmu = { smmu 232 drivers/memory/tegra/tegra30.c .smmu = { smmu 246 drivers/memory/tegra/tegra30.c .smmu = { smmu 260 drivers/memory/tegra/tegra30.c .smmu = { smmu 274 drivers/memory/tegra/tegra30.c .smmu = { smmu 288 drivers/memory/tegra/tegra30.c .smmu = { smmu 302 drivers/memory/tegra/tegra30.c .smmu = { smmu 316 drivers/memory/tegra/tegra30.c .smmu = { smmu 330 drivers/memory/tegra/tegra30.c .smmu = { smmu 344 drivers/memory/tegra/tegra30.c .smmu = { smmu 358 drivers/memory/tegra/tegra30.c .smmu = { smmu 372 drivers/memory/tegra/tegra30.c .smmu = { smmu 386 drivers/memory/tegra/tegra30.c .smmu = { smmu 400 drivers/memory/tegra/tegra30.c .smmu = { smmu 414 drivers/memory/tegra/tegra30.c .smmu = { smmu 428 drivers/memory/tegra/tegra30.c .smmu = { smmu 442 drivers/memory/tegra/tegra30.c .smmu = { smmu 456 drivers/memory/tegra/tegra30.c .smmu = { smmu 470 drivers/memory/tegra/tegra30.c .smmu = { smmu 484 drivers/memory/tegra/tegra30.c .smmu = { smmu 498 drivers/memory/tegra/tegra30.c .smmu = { smmu 512 drivers/memory/tegra/tegra30.c .smmu = { smmu 526 drivers/memory/tegra/tegra30.c .smmu = { smmu 560 drivers/memory/tegra/tegra30.c .smmu = { smmu 574 drivers/memory/tegra/tegra30.c .smmu = { smmu 588 drivers/memory/tegra/tegra30.c .smmu = { smmu 602 drivers/memory/tegra/tegra30.c .smmu = { smmu 616 drivers/memory/tegra/tegra30.c .smmu = { smmu 630 drivers/memory/tegra/tegra30.c .smmu = { smmu 644 drivers/memory/tegra/tegra30.c .smmu = { smmu 658 drivers/memory/tegra/tegra30.c .smmu = { smmu 672 drivers/memory/tegra/tegra30.c .smmu = { smmu 686 drivers/memory/tegra/tegra30.c .smmu = { smmu 700 drivers/memory/tegra/tegra30.c .smmu = { smmu 714 drivers/memory/tegra/tegra30.c .smmu = { smmu 728 drivers/memory/tegra/tegra30.c .smmu = { smmu 742 drivers/memory/tegra/tegra30.c .smmu = { smmu 756 drivers/memory/tegra/tegra30.c .smmu = { smmu 770 drivers/memory/tegra/tegra30.c .smmu = { smmu 804 drivers/memory/tegra/tegra30.c .smmu = { smmu 818 drivers/memory/tegra/tegra30.c .smmu = { smmu 832 drivers/memory/tegra/tegra30.c .smmu = { smmu 846 drivers/memory/tegra/tegra30.c .smmu = { smmu 860 drivers/memory/tegra/tegra30.c .smmu = { smmu 874 drivers/memory/tegra/tegra30.c .smmu = { smmu 888 drivers/memory/tegra/tegra30.c .smmu = { smmu 902 drivers/memory/tegra/tegra30.c .smmu = { smmu 996 drivers/memory/tegra/tegra30.c .smmu = &tegra30_smmu_soc, smmu 43 include/soc/tegra/mc.h struct tegra_smmu_enable smmu; smmu 84 include/soc/tegra/mc.h void tegra_smmu_remove(struct tegra_smmu *smmu); smmu 93 include/soc/tegra/mc.h static inline void tegra_smmu_remove(struct tegra_smmu *smmu) smmu 156 include/soc/tegra/mc.h const struct tegra_smmu_soc *smmu; smmu 167 include/soc/tegra/mc.h struct tegra_smmu *smmu;