smc_mc_reg_table 6111 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	SMC_SIslands_MCRegisters *smc_mc_reg_table = &si_pi->smc_mc_reg_table;
smc_mc_reg_table 6113 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	memset(smc_mc_reg_table, 0, sizeof(SMC_SIslands_MCRegisters));
smc_mc_reg_table 6117 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	si_populate_mc_reg_addresses(adev, smc_mc_reg_table);
smc_mc_reg_table 6120 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					     &smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_INITIAL_SLOT]);
smc_mc_reg_table 6123 drivers/gpu/drm/amd/amdgpu/si_dpm.c 				&smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_ACPI_SLOT],
smc_mc_reg_table 6129 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						     &smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_ULV_SLOT]);
smc_mc_reg_table 6132 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					&smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_ULV_SLOT],
smc_mc_reg_table 6136 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	si_convert_mc_reg_table_to_smc(adev, amdgpu_boot_state, smc_mc_reg_table);
smc_mc_reg_table 6139 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					   (u8 *)smc_mc_reg_table,
smc_mc_reg_table 6151 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	SMC_SIslands_MCRegisters *smc_mc_reg_table = &si_pi->smc_mc_reg_table;
smc_mc_reg_table 6153 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	memset(smc_mc_reg_table, 0, sizeof(SMC_SIslands_MCRegisters));
smc_mc_reg_table 6155 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	si_convert_mc_reg_table_to_smc(adev, amdgpu_new_state, smc_mc_reg_table);
smc_mc_reg_table 6158 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					   (u8 *)&smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT],
smc_mc_reg_table  848 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	SMC_NIslands_MCRegisters smc_mc_reg_table;
smc_mc_reg_table 1002 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	SMC_SIslands_MCRegisters smc_mc_reg_table;
smc_mc_reg_table 4755 drivers/gpu/drm/radeon/ci_dpm.c 	memset(&pi->smc_mc_reg_table, 0, sizeof(SMU7_Discrete_MCRegisters));
smc_mc_reg_table 4757 drivers/gpu/drm/radeon/ci_dpm.c 	ret = ci_populate_mc_reg_addresses(rdev, &pi->smc_mc_reg_table);
smc_mc_reg_table 4760 drivers/gpu/drm/radeon/ci_dpm.c 	ci_convert_mc_reg_table_to_smc(rdev, &pi->smc_mc_reg_table);
smc_mc_reg_table 4764 drivers/gpu/drm/radeon/ci_dpm.c 				    (u8 *)&pi->smc_mc_reg_table,
smc_mc_reg_table 4776 drivers/gpu/drm/radeon/ci_dpm.c 	memset(&pi->smc_mc_reg_table, 0, sizeof(SMU7_Discrete_MCRegisters));
smc_mc_reg_table 4778 drivers/gpu/drm/radeon/ci_dpm.c 	ci_convert_mc_reg_table_to_smc(rdev, &pi->smc_mc_reg_table);
smc_mc_reg_table 4783 drivers/gpu/drm/radeon/ci_dpm.c 				    (u8 *)&pi->smc_mc_reg_table.data[0],
smc_mc_reg_table  225 drivers/gpu/drm/radeon/ci_dpm.h 	SMU7_Discrete_MCRegisters smc_mc_reg_table;
smc_mc_reg_table 2999 drivers/gpu/drm/radeon/ni_dpm.c 	SMC_NIslands_MCRegisters *mc_reg_table = &ni_pi->smc_mc_reg_table;
smc_mc_reg_table 3030 drivers/gpu/drm/radeon/ni_dpm.c 	SMC_NIslands_MCRegisters *mc_reg_table = &ni_pi->smc_mc_reg_table;
smc_mc_reg_table  208 drivers/gpu/drm/radeon/ni_dpm.h 	SMC_NIslands_MCRegisters smc_mc_reg_table;
smc_mc_reg_table 5657 drivers/gpu/drm/radeon/si_dpm.c 	SMC_SIslands_MCRegisters *smc_mc_reg_table = &si_pi->smc_mc_reg_table;
smc_mc_reg_table 5659 drivers/gpu/drm/radeon/si_dpm.c 	memset(smc_mc_reg_table, 0, sizeof(SMC_SIslands_MCRegisters));
smc_mc_reg_table 5663 drivers/gpu/drm/radeon/si_dpm.c 	si_populate_mc_reg_addresses(rdev, smc_mc_reg_table);
smc_mc_reg_table 5666 drivers/gpu/drm/radeon/si_dpm.c 					     &smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_INITIAL_SLOT]);
smc_mc_reg_table 5669 drivers/gpu/drm/radeon/si_dpm.c 				&smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_ACPI_SLOT],
smc_mc_reg_table 5675 drivers/gpu/drm/radeon/si_dpm.c 						     &smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_ULV_SLOT]);
smc_mc_reg_table 5678 drivers/gpu/drm/radeon/si_dpm.c 					&smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_ULV_SLOT],
smc_mc_reg_table 5682 drivers/gpu/drm/radeon/si_dpm.c 	si_convert_mc_reg_table_to_smc(rdev, radeon_boot_state, smc_mc_reg_table);
smc_mc_reg_table 5685 drivers/gpu/drm/radeon/si_dpm.c 				    (u8 *)smc_mc_reg_table,
smc_mc_reg_table 5697 drivers/gpu/drm/radeon/si_dpm.c 	SMC_SIslands_MCRegisters *smc_mc_reg_table = &si_pi->smc_mc_reg_table;
smc_mc_reg_table 5699 drivers/gpu/drm/radeon/si_dpm.c 	memset(smc_mc_reg_table, 0, sizeof(SMC_SIslands_MCRegisters));
smc_mc_reg_table 5701 drivers/gpu/drm/radeon/si_dpm.c 	si_convert_mc_reg_table_to_smc(rdev, radeon_new_state, smc_mc_reg_table);
smc_mc_reg_table 5705 drivers/gpu/drm/radeon/si_dpm.c 				    (u8 *)&smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT],
smc_mc_reg_table  195 drivers/gpu/drm/radeon/si_dpm.h 	SMC_SIslands_MCRegisters smc_mc_reg_table;