CM0_CM_MEM_PWR_CTRL  312 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	TF_SF(CM0_CM_MEM_PWR_CTRL, SHARED_MEM_PWR_DIS, mask_sh), \
CM0_CM_MEM_PWR_CTRL  359 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	TF_SF(CM0_CM_MEM_PWR_CTRL, RGAM_MEM_PWR_FORCE, mask_sh), \
CM0_CM_MEM_PWR_CTRL  349 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h 	TF_SF(CM0_CM_MEM_PWR_CTRL, BLNDGAM_MEM_PWR_FORCE, mask_sh), \