sllp              216 arch/powerpc/include/asm/book3s/64/mmu-hash.h 	unsigned long sllp;
sllp              218 arch/powerpc/include/asm/book3s/64/mmu-hash.h 	sllp = ((mmu_psize_defs[psize].sllp & SLB_VSID_L) >> 6) |
sllp              219 arch/powerpc/include/asm/book3s/64/mmu-hash.h 		((mmu_psize_defs[psize].sllp & SLB_VSID_LP) >> 4);
sllp              220 arch/powerpc/include/asm/book3s/64/mmu-hash.h 	return sllp;
sllp               23 arch/powerpc/include/asm/book3s/64/mmu.h 		unsigned long	sllp;	/* SLB L||LP (exact mask to use in slbmte) */
sllp              304 arch/powerpc/include/asm/kvm_book3s_64.h 	unsigned long rb = 0, va_low, sllp;
sllp              345 arch/powerpc/include/asm/kvm_book3s_64.h 			sllp = (a_pgshift == 16) ? 5 : 4;
sllp              346 arch/powerpc/include/asm/kvm_book3s_64.h 			rb |= sllp << 5;	/*  AP field */
sllp              228 arch/powerpc/kernel/asm-offsets.c 	OFFSET(MMUPSIZESLLP, mmu_psize_def, sllp);
sllp              320 arch/powerpc/kernel/paca.c 	get_paca()->mm_ctx_sllp = context->sllp;
sllp             1567 arch/powerpc/kernel/process.c 	unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
sllp              343 arch/powerpc/kvm/book3s_64_mmu_host.c 		slb_vsid |= mmu_psize_defs[MMU_PAGE_64K].sllp;
sllp             4340 arch/powerpc/kvm/book3s_hv.c 				     int shift, int sllp)
sllp             4343 arch/powerpc/kvm/book3s_hv.c 	(*sps)->slb_enc = sllp;
sllp              148 arch/powerpc/mm/book3s64/hash_native.c 	unsigned long sllp;
sllp              171 arch/powerpc/mm/book3s64/hash_native.c 		sllp = get_sllp_encoding(apsize);
sllp              172 arch/powerpc/mm/book3s64/hash_native.c 		va |= sllp << 5;
sllp              244 arch/powerpc/mm/book3s64/hash_native.c 	unsigned long sllp;
sllp              261 arch/powerpc/mm/book3s64/hash_native.c 		sllp = get_sllp_encoding(apsize);
sllp              262 arch/powerpc/mm/book3s64/hash_native.c 		va |= sllp << 5;
sllp              143 arch/powerpc/mm/book3s64/hash_utils.c 		.sllp	= 0,
sllp              158 arch/powerpc/mm/book3s64/hash_utils.c 		.sllp	= 0,
sllp              165 arch/powerpc/mm/book3s64/hash_utils.c 		.sllp	= SLB_VSID_L,
sllp              452 arch/powerpc/mm/book3s64/hash_utils.c 		def->sllp = slbenc;
sllp              480 arch/powerpc/mm/book3s64/hash_utils.c 				base_shift, shift, def->sllp,
sllp             1229 arch/powerpc/mm/book3s64/hash_utils.c 		   mmu_psize_defs[mmu_vmalloc_psize].sllp) {
sllp             1231 arch/powerpc/mm/book3s64/hash_utils.c 			mmu_psize_defs[mmu_vmalloc_psize].sllp;
sllp              524 arch/powerpc/mm/book3s64/slb.c 	linear_llp = mmu_psize_defs[mmu_linear_psize].sllp;
sllp              525 arch/powerpc/mm/book3s64/slb.c 	io_llp = mmu_psize_defs[mmu_io_psize].sllp;
sllp              526 arch/powerpc/mm/book3s64/slb.c 	vmalloc_llp = mmu_psize_defs[mmu_vmalloc_psize].sllp;
sllp              529 arch/powerpc/mm/book3s64/slb.c 	vmemmap_llp = mmu_psize_defs[mmu_vmemmap_psize].sllp;
sllp              696 arch/powerpc/mm/book3s64/slb.c 		flags = SLB_VSID_KERNEL | mmu_psize_defs[mmu_linear_psize].sllp;
sllp              704 arch/powerpc/mm/book3s64/slb.c 		flags = SLB_VSID_KERNEL | mmu_psize_defs[mmu_vmemmap_psize].sllp;
sllp              718 arch/powerpc/mm/book3s64/slb.c 		flags = SLB_VSID_KERNEL | mmu_psize_defs[mmu_io_psize].sllp;
sllp              759 arch/powerpc/mm/book3s64/slb.c 	flags = SLB_VSID_USER | mmu_psize_defs[bpsize].sllp;
sllp              136 arch/powerpc/mm/copro_fault.c 	vsid |= mmu_psize_defs[psize].sllp |
sllp              215 arch/powerpc/platforms/cell/spu_base.c 		llp = mmu_psize_defs[mmu_linear_psize].sllp;
sllp              217 arch/powerpc/platforms/cell/spu_base.c 		llp = mmu_psize_defs[mmu_virtual_psize].sllp;
sllp              127 drivers/misc/cxl/main.c 	sstp0 |= (SLB_VSID_KERNEL | mmu_psize_defs[mmu_linear_psize].sllp) << 50;