sli_mem_access_ctl 1159 arch/mips/pci/pcie-octeon.c 	union cvmx_sli_mem_access_ctl sli_mem_access_ctl;
sli_mem_access_ctl 1335 arch/mips/pci/pcie-octeon.c 	sli_mem_access_ctl.u64 = cvmx_read_csr(CVMX_PEXP_SLI_MEM_ACCESS_CTL);
sli_mem_access_ctl 1336 arch/mips/pci/pcie-octeon.c 	sli_mem_access_ctl.s.max_word = 0;	/* Allow 16 words to combine */
sli_mem_access_ctl 1337 arch/mips/pci/pcie-octeon.c 	sli_mem_access_ctl.s.timer = 127;	/* Wait up to 127 cycles for more data */
sli_mem_access_ctl 1338 arch/mips/pci/pcie-octeon.c 	cvmx_write_csr(CVMX_PEXP_SLI_MEM_ACCESS_CTL, sli_mem_access_ctl.u64);