sli_ctl_portx 1158 arch/mips/pci/pcie-octeon.c union cvmx_sli_ctl_portx sli_ctl_portx; sli_ctl_portx 1398 arch/mips/pci/pcie-octeon.c sli_ctl_portx.u64 = cvmx_read_csr(CVMX_PEXP_SLI_CTL_PORTX(pcie_port)); sli_ctl_portx 1399 arch/mips/pci/pcie-octeon.c sli_ctl_portx.s.ptlp_ro = 1; sli_ctl_portx 1400 arch/mips/pci/pcie-octeon.c sli_ctl_portx.s.ctlp_ro = 1; sli_ctl_portx 1401 arch/mips/pci/pcie-octeon.c sli_ctl_portx.s.wait_com = 0; sli_ctl_portx 1402 arch/mips/pci/pcie-octeon.c sli_ctl_portx.s.waitl_com = 0; sli_ctl_portx 1403 arch/mips/pci/pcie-octeon.c cvmx_write_csr(CVMX_PEXP_SLI_CTL_PORTX(pcie_port), sli_ctl_portx.u64); sli_ctl_portx 1865 arch/mips/pci/pcie-octeon.c union cvmx_sli_ctl_portx sli_ctl_portx; sli_ctl_portx 2068 arch/mips/pci/pcie-octeon.c sli_ctl_portx.u64 = cvmx_read_csr(CVMX_PEXP_SLI_CTL_PORTX(port)); sli_ctl_portx 2069 arch/mips/pci/pcie-octeon.c sli_ctl_portx.s.inta_map = 1; sli_ctl_portx 2070 arch/mips/pci/pcie-octeon.c sli_ctl_portx.s.intb_map = 1; sli_ctl_portx 2071 arch/mips/pci/pcie-octeon.c sli_ctl_portx.s.intc_map = 1; sli_ctl_portx 2072 arch/mips/pci/pcie-octeon.c sli_ctl_portx.s.intd_map = 1; sli_ctl_portx 2073 arch/mips/pci/pcie-octeon.c cvmx_write_csr(CVMX_PEXP_SLI_CTL_PORTX(port), sli_ctl_portx.u64); sli_ctl_portx 2075 arch/mips/pci/pcie-octeon.c sli_ctl_portx.u64 = cvmx_read_csr(CVMX_PEXP_SLI_CTL_PORTX(!port)); sli_ctl_portx 2076 arch/mips/pci/pcie-octeon.c sli_ctl_portx.s.inta_map = 0; sli_ctl_portx 2077 arch/mips/pci/pcie-octeon.c sli_ctl_portx.s.intb_map = 0; sli_ctl_portx 2078 arch/mips/pci/pcie-octeon.c sli_ctl_portx.s.intc_map = 0; sli_ctl_portx 2079 arch/mips/pci/pcie-octeon.c sli_ctl_portx.s.intd_map = 0; sli_ctl_portx 2080 arch/mips/pci/pcie-octeon.c cvmx_write_csr(CVMX_PEXP_SLI_CTL_PORTX(!port), sli_ctl_portx.u64);