SMUIO              55 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	uint32_t reg = RREG32_SOC15(SMUIO, 0, mmSMUIO_PWRMGT);
SMUIO              58 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	WREG32_SOC15(SMUIO, 0, mmSMUIO_PWRMGT, reg);
SMUIO              66 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE, enable ? 1 : 0);
SMUIO              74 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 		RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_CLR_INTR);
SMUIO              92 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_CON, reg);
SMUIO             112 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_FS_SPKLEN, 2);
SMUIO             113 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_SS_SCL_HCNT, 120);
SMUIO             114 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_SS_SCL_LCNT, 130);
SMUIO             115 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_SDA_HOLD, 20);
SMUIO             124 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_TAR, (address & 0xFF));
SMUIO             142 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 		reg = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_STATUS);
SMUIO             150 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	reg = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_INTR_STAT);
SMUIO             153 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 		reg_c_tx_abrt_source = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_TX_ABRT_SOURCE);
SMUIO             184 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	reg_c_tx_abrt_source = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_TX_ABRT_SOURCE);
SMUIO             203 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 			reg_ic_status = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_STATUS);
SMUIO             254 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 		reg = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_STATUS);
SMUIO             274 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 				WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_DATA_CMD, reg);
SMUIO             280 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 				reg = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_STATUS);
SMUIO             362 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 		WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_DATA_CMD, reg);
SMUIO             380 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 		reg = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_DATA_CMD);
SMUIO             406 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE, reg);
SMUIO             410 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE, reg);
SMUIO             424 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	reg_ic_enable_status = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE_STATUS);
SMUIO             425 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	reg_ic_enable = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE);
SMUIO             442 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 		reg_ic_clr_activity = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_CLR_ACTIVITY);
SMUIO             482 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	reg_ic_enable_status = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE_STATUS);
SMUIO             483 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	reg_ic_enable = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE);
SMUIO             331 drivers/gpu/drm/amd/amdgpu/soc15.c 		rom_index_offset = SOC15_REG_OFFSET(SMUIO, 0, mmROM_INDEX_VG20);
SMUIO             332 drivers/gpu/drm/amd/amdgpu/soc15.c 		rom_data_offset = SOC15_REG_OFFSET(SMUIO, 0, mmROM_DATA_VG20);
SMUIO             335 drivers/gpu/drm/amd/amdgpu/soc15.c 		rom_index_offset = SOC15_REG_OFFSET(SMUIO, 0, mmROM_INDEX);
SMUIO             336 drivers/gpu/drm/amd/amdgpu/soc15.c 		rom_data_offset = SOC15_REG_OFFSET(SMUIO, 0, mmROM_DATA);
SMUIO            1428 drivers/gpu/drm/amd/amdgpu/soc15.c 	def = data = RREG32(SOC15_REG_OFFSET(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0));
SMUIO            1438 drivers/gpu/drm/amd/amdgpu/soc15.c 		WREG32(SOC15_REG_OFFSET(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0), data);
SMUIO            1519 drivers/gpu/drm/amd/amdgpu/soc15.c 	data = RREG32(SOC15_REG_OFFSET(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0));
SMUIO            3826 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		val_vid = (RREG32_SOC15(SMUIO, 0, mmSMUSVI0_PLANE0_CURRENTVID) &
SMUIO            2223 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 		val_vid = (RREG32_SOC15(SMUIO, 0, mmSMUSVI0_TEL_PLANE0) &
SMUIO            1231 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	val_vid = (RREG32_SOC15(SMUIO, 0, mmSMUSVI0_TEL_PLANE0) &
SMUIO             233 drivers/gpu/drm/amd/powerplay/smu_v12_0.c 	reg = RREG32_SOC15(SMUIO, 0, mmSMUIO_GFX_MISC_CNTL);