sirfsoc_pwrc_base   28 arch/arm/mach-prima2/pm.c u32 sirfsoc_pwrc_base;
sirfsoc_pwrc_base   34 arch/arm/mach-prima2/pm.c 	pwr_trigger_en_reg = sirfsoc_rtc_iobrg_readl(sirfsoc_pwrc_base +
sirfsoc_pwrc_base   41 arch/arm/mach-prima2/pm.c 		sirfsoc_pwrc_base + SIRFSOC_PWRC_TRIGGER_EN);
sirfsoc_pwrc_base   46 arch/arm/mach-prima2/pm.c 	u32 sleep_mode = sirfsoc_rtc_iobrg_readl(sirfsoc_pwrc_base +
sirfsoc_pwrc_base   50 arch/arm/mach-prima2/pm.c 	sirfsoc_rtc_iobrg_writel(sleep_mode, sirfsoc_pwrc_base +
sirfsoc_pwrc_base   58 arch/arm/mach-prima2/pm.c 	sirfsoc_rtc_iobrg_writel(wakeup_entry, sirfsoc_pwrc_base +
sirfsoc_pwrc_base  110 arch/arm/mach-prima2/pm.c 	if (of_property_read_u32(np, "reg", &sirfsoc_pwrc_base))