sirfsoc_irq_st     97 drivers/irqchip/irq-sirfsoc.c static struct sirfsoc_irq_status sirfsoc_irq_st;
sirfsoc_irq_st    103 drivers/irqchip/irq-sirfsoc.c 	sirfsoc_irq_st.mask0 = readl_relaxed(base + SIRFSOC_INT_RISC_MASK0);
sirfsoc_irq_st    104 drivers/irqchip/irq-sirfsoc.c 	sirfsoc_irq_st.mask1 = readl_relaxed(base + SIRFSOC_INT_RISC_MASK1);
sirfsoc_irq_st    105 drivers/irqchip/irq-sirfsoc.c 	sirfsoc_irq_st.level0 = readl_relaxed(base + SIRFSOC_INT_RISC_LEVEL0);
sirfsoc_irq_st    106 drivers/irqchip/irq-sirfsoc.c 	sirfsoc_irq_st.level1 = readl_relaxed(base + SIRFSOC_INT_RISC_LEVEL1);
sirfsoc_irq_st    115 drivers/irqchip/irq-sirfsoc.c 	writel_relaxed(sirfsoc_irq_st.mask0, base + SIRFSOC_INT_RISC_MASK0);
sirfsoc_irq_st    116 drivers/irqchip/irq-sirfsoc.c 	writel_relaxed(sirfsoc_irq_st.mask1, base + SIRFSOC_INT_RISC_MASK1);
sirfsoc_irq_st    117 drivers/irqchip/irq-sirfsoc.c 	writel_relaxed(sirfsoc_irq_st.level0, base + SIRFSOC_INT_RISC_LEVEL0);
sirfsoc_irq_st    118 drivers/irqchip/irq-sirfsoc.c 	writel_relaxed(sirfsoc_irq_st.level1, base + SIRFSOC_INT_RISC_LEVEL1);