sig_cfg           270 drivers/gpu/drm/imx/ipuv3-crtc.c 	struct ipu_di_signal_cfg sig_cfg = {};
sig_cfg           293 drivers/gpu/drm/imx/ipuv3-crtc.c 		sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT;
sig_cfg           295 drivers/gpu/drm/imx/ipuv3-crtc.c 		sig_cfg.clkflags = IPU_DI_CLKMODE_EXT;
sig_cfg           297 drivers/gpu/drm/imx/ipuv3-crtc.c 		sig_cfg.clkflags = 0;
sig_cfg           299 drivers/gpu/drm/imx/ipuv3-crtc.c 	sig_cfg.enable_pol = !(imx_crtc_state->bus_flags & DRM_BUS_FLAG_DE_LOW);
sig_cfg           301 drivers/gpu/drm/imx/ipuv3-crtc.c 	sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags &
sig_cfg           303 drivers/gpu/drm/imx/ipuv3-crtc.c 	sig_cfg.bus_format = imx_crtc_state->bus_format;
sig_cfg           304 drivers/gpu/drm/imx/ipuv3-crtc.c 	sig_cfg.v_to_h_sync = 0;
sig_cfg           305 drivers/gpu/drm/imx/ipuv3-crtc.c 	sig_cfg.hsync_pin = imx_crtc_state->di_hsync_pin;
sig_cfg           306 drivers/gpu/drm/imx/ipuv3-crtc.c 	sig_cfg.vsync_pin = imx_crtc_state->di_vsync_pin;
sig_cfg           308 drivers/gpu/drm/imx/ipuv3-crtc.c 	drm_display_mode_to_videomode(mode, &sig_cfg.mode);
sig_cfg           313 drivers/gpu/drm/imx/ipuv3-crtc.c 	ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
sig_cfg           795 drivers/video/fbdev/mx3fb.c 	struct ipu_di_signal_cfg sig_cfg;
sig_cfg           827 drivers/video/fbdev/mx3fb.c 		memset(&sig_cfg, 0, sizeof(sig_cfg));
sig_cfg           829 drivers/video/fbdev/mx3fb.c 			sig_cfg.Hsync_pol = true;
sig_cfg           831 drivers/video/fbdev/mx3fb.c 			sig_cfg.Vsync_pol = true;
sig_cfg           833 drivers/video/fbdev/mx3fb.c 			sig_cfg.clk_pol = true;
sig_cfg           835 drivers/video/fbdev/mx3fb.c 			sig_cfg.data_pol = true;
sig_cfg           837 drivers/video/fbdev/mx3fb.c 			sig_cfg.enable_pol = true;
sig_cfg           839 drivers/video/fbdev/mx3fb.c 			sig_cfg.clkidle_en = true;
sig_cfg           841 drivers/video/fbdev/mx3fb.c 			sig_cfg.clksel_en = true;
sig_cfg           858 drivers/video/fbdev/mx3fb.c 				   fbi->var.vsync_len, sig_cfg) != 0) {