si_default_state 3600 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, si_default_state[i]); si_default_state 31 drivers/gpu/drm/radeon/si_blit_shaders.c const u32 si_default_state[] = si_default_state 253 drivers/gpu/drm/radeon/si_blit_shaders.c const u32 si_default_size = ARRAY_SIZE(si_default_state); si_default_state 28 drivers/gpu/drm/radeon/si_blit_shaders.h extern const u32 si_default_state[];