shregs 784 arch/powerpc/include/asm/kvm_host.h struct kvm_vcpu_arch_shared shregs; shregs 452 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_MSR, kvm_vcpu, arch.shregs.msr); shregs 453 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_SRR0, kvm_vcpu, arch.shregs.srr0); shregs 454 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_SRR1, kvm_vcpu, arch.shregs.srr1); shregs 455 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_SPRG0, kvm_vcpu, arch.shregs.sprg0); shregs 456 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_SPRG1, kvm_vcpu, arch.shregs.sprg1); shregs 457 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_SPRG2, kvm_vcpu, arch.shregs.sprg2); shregs 458 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_SPRG3, kvm_vcpu, arch.shregs.sprg3); shregs 510 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr); shregs 511 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar); shregs 283 arch/powerpc/kvm/book3s_64_mmu_hv.c if (MSR_TM_TRANSACTIONAL(vcpu->arch.shregs.msr)) shregs 286 arch/powerpc/kvm/book3s_64_mmu_hv.c msr |= vcpu->arch.shregs.msr & MSR_TS_MASK; shregs 350 arch/powerpc/kvm/book3s_64_mmu_hv.c int virtmode = vcpu->arch.shregs.msr & (data ? MSR_DR : MSR_IR); shregs 388 arch/powerpc/kvm/book3s_64_mmu_hv.c key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS; shregs 349 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.msr = msr; shregs 420 arch/powerpc/kvm/book3s_hv.c vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); shregs 428 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1); shregs 430 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1); shregs 432 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3); shregs 434 arch/powerpc/kvm/book3s_hv.c vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr); shregs 435 arch/powerpc/kvm/book3s_hv.c pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar); shregs 726 arch/powerpc/kvm/book3s_hv.c dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); shregs 1097 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.msr |= MSR_EE; shregs 1265 arch/powerpc/kvm/book3s_hv.c if (vcpu->arch.shregs.msr & MSR_HV) { shregs 1269 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.msr); shregs 1306 arch/powerpc/kvm/book3s_hv.c ulong flags = vcpu->arch.shregs.msr & 0x083c0000; shregs 1334 arch/powerpc/kvm/book3s_hv.c flags = vcpu->arch.shregs.msr & 0x1f0000ull; shregs 1368 arch/powerpc/kvm/book3s_hv.c vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr & shregs 1370 arch/powerpc/kvm/book3s_hv.c if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) shregs 1430 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.msr); shregs 1454 arch/powerpc/kvm/book3s_hv.c if (vcpu->arch.shregs.msr & MSR_HV) { shregs 1458 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.msr); shregs 1504 arch/powerpc/kvm/book3s_hv.c if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) shregs 2277 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shared = &vcpu->arch.shregs; shregs 3440 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_SPRG0, vcpu->arch.shregs.sprg0); shregs 3441 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_SPRG1, vcpu->arch.shregs.sprg1); shregs 3442 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_SPRG2, vcpu->arch.shregs.sprg2); shregs 3443 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_SPRG3, vcpu->arch.shregs.sprg3); shregs 3452 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0); shregs 3453 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1); shregs 3471 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.sprg0 = mfspr(SPRN_SPRG0); shregs 3472 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.sprg1 = mfspr(SPRN_SPRG1); shregs 3473 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.sprg2 = mfspr(SPRN_SPRG2); shregs 3474 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.sprg3 = mfspr(SPRN_SPRG3); shregs 3557 arch/powerpc/kvm/book3s_hv.c kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true); shregs 3578 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_DAR, vcpu->arch.shregs.dar); shregs 3579 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr); shregs 3603 arch/powerpc/kvm/book3s_hv.c vcpu->arch.regs.msr = vcpu->arch.shregs.msr; shregs 3616 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.msr = vcpu->arch.regs.msr; shregs 3617 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.dar = mfspr(SPRN_DAR); shregs 3618 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); shregs 3676 arch/powerpc/kvm/book3s_hv.c kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true); shregs 4306 arch/powerpc/kvm/book3s_hv.c !(vcpu->arch.shregs.msr & MSR_PR)) { shregs 775 arch/powerpc/kvm/book3s_hv_builtin.c if (vcpu->arch.shregs.msr & MSR_EE) { shregs 787 arch/powerpc/kvm/book3s_hv_builtin.c unsigned long msr, old_msr = vcpu->arch.shregs.msr; shregs 795 arch/powerpc/kvm/book3s_hv_builtin.c vcpu->arch.shregs.msr = msr; shregs 43 arch/powerpc/kvm/book3s_hv_nested.c hr->srr0 = vcpu->arch.shregs.srr0; shregs 44 arch/powerpc/kvm/book3s_hv_nested.c hr->srr1 = vcpu->arch.shregs.srr1; shregs 45 arch/powerpc/kvm/book3s_hv_nested.c hr->sprg[0] = vcpu->arch.shregs.sprg0; shregs 46 arch/powerpc/kvm/book3s_hv_nested.c hr->sprg[1] = vcpu->arch.shregs.sprg1; shregs 47 arch/powerpc/kvm/book3s_hv_nested.c hr->sprg[2] = vcpu->arch.shregs.sprg2; shregs 48 arch/powerpc/kvm/book3s_hv_nested.c hr->sprg[3] = vcpu->arch.shregs.sprg3; shregs 107 arch/powerpc/kvm/book3s_hv_nested.c hr->srr0 = vcpu->arch.shregs.srr0; shregs 108 arch/powerpc/kvm/book3s_hv_nested.c hr->srr1 = vcpu->arch.shregs.srr1; shregs 109 arch/powerpc/kvm/book3s_hv_nested.c hr->sprg[0] = vcpu->arch.shregs.sprg0; shregs 110 arch/powerpc/kvm/book3s_hv_nested.c hr->sprg[1] = vcpu->arch.shregs.sprg1; shregs 111 arch/powerpc/kvm/book3s_hv_nested.c hr->sprg[2] = vcpu->arch.shregs.sprg2; shregs 112 arch/powerpc/kvm/book3s_hv_nested.c hr->sprg[3] = vcpu->arch.shregs.sprg3; shregs 161 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.srr0 = hr->srr0; shregs 162 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.srr1 = hr->srr1; shregs 163 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.sprg0 = hr->sprg[0]; shregs 164 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.sprg1 = hr->sprg[1]; shregs 165 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.sprg2 = hr->sprg[2]; shregs 166 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.sprg3 = hr->sprg[3]; shregs 187 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.srr0 = hr->srr0; shregs 188 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.srr1 = hr->srr1; shregs 189 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.sprg0 = hr->sprg[0]; shregs 190 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.sprg1 = hr->sprg[1]; shregs 191 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.sprg2 = hr->sprg[2]; shregs 192 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.sprg3 = hr->sprg[3]; shregs 266 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.regs.msr = vcpu->arch.shregs.msr; shregs 278 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.msr = vcpu->arch.regs.msr; shregs 299 arch/powerpc/kvm/book3s_hv_nested.c l2_regs.msr = vcpu->arch.shregs.msr; shregs 309 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.msr = saved_l1_regs.msr & ~MSR_TS_MASK; shregs 312 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.msr |= MSR_TS_S; shregs 1189 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.msr &= ~0x783f0000ul; shregs 1190 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.msr |= flags; shregs 70 arch/powerpc/kvm/book3s_hv_ras.c unsigned long srr1 = vcpu->arch.shregs.msr; shregs 76 arch/powerpc/kvm/book3s_hv_ras.c unsigned long dsisr = vcpu->arch.shregs.dsisr; shregs 1259 arch/powerpc/kvm/book3s_hv_rm_mmu.c key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS; shregs 1276 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (data && (vcpu->arch.shregs.msr & MSR_DR)) { shregs 1312 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (data && (vcpu->arch.shregs.msr & MSR_IR)) shregs 17 arch/powerpc/kvm/book3s_hv_tm.c u64 msr = vcpu->arch.shregs.msr; shregs 21 arch/powerpc/kvm/book3s_hv_tm.c if (MSR_TM_SUSPENDED(vcpu->arch.shregs.msr)) shregs 43 arch/powerpc/kvm/book3s_hv_tm.c u64 msr = vcpu->arch.shregs.msr; shregs 50 arch/powerpc/kvm/book3s_hv_tm.c newmsr = vcpu->arch.shregs.srr1; shregs 56 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.shregs.msr = newmsr; shregs 58 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.regs.nip = vcpu->arch.shregs.srr0; shregs 89 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.shregs.msr = msr; shregs 105 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.shregs.msr = newmsr; shregs 140 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.shregs.msr = msr; shregs 176 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.shregs.msr &= ~MSR_TS_MASK; shregs 206 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.shregs.msr = msr | MSR_TS_S; shregs 29 arch/powerpc/kvm/book3s_hv_tm_builtin.c newmsr = vcpu->arch.shregs.srr1; shregs 34 arch/powerpc/kvm/book3s_hv_tm_builtin.c vcpu->arch.shregs.msr = newmsr; shregs 36 arch/powerpc/kvm/book3s_hv_tm_builtin.c vcpu->arch.regs.nip = vcpu->arch.shregs.srr0; shregs 41 arch/powerpc/kvm/book3s_hv_tm_builtin.c msr = vcpu->arch.shregs.msr; shregs 57 arch/powerpc/kvm/book3s_hv_tm_builtin.c vcpu->arch.shregs.msr = msr; shregs 66 arch/powerpc/kvm/book3s_hv_tm_builtin.c msr = vcpu->arch.shregs.msr; shregs 73 arch/powerpc/kvm/book3s_hv_tm_builtin.c vcpu->arch.shregs.msr = newmsr; shregs 78 arch/powerpc/kvm/book3s_hv_tm_builtin.c msr = vcpu->arch.shregs.msr; shregs 87 arch/powerpc/kvm/book3s_hv_tm_builtin.c vcpu->arch.shregs.msr = (msr & ~MSR_TS_MASK) | MSR_TS_T; shregs 103 arch/powerpc/kvm/book3s_hv_tm_builtin.c vcpu->arch.shregs.msr &= ~MSR_TS_MASK; /* go to N state */ shregs 262 arch/powerpc/kvm/trace_hv.h __entry->msr = vcpu->arch.shregs.msr;