sha_text 245 drivers/gpu/drm/i915/display/intel_hdcp.c static int intel_write_sha_text(struct drm_i915_private *dev_priv, u32 sha_text) sha_text 247 drivers/gpu/drm/i915/display/intel_hdcp.c I915_WRITE(HDCP_SHA_TEXT, sha_text); sha_text 283 drivers/gpu/drm/i915/display/intel_hdcp.c u32 vprime, sha_text, sha_leftovers, rep_ctl; sha_text 307 drivers/gpu/drm/i915/display/intel_hdcp.c sha_text = 0; sha_text 316 drivers/gpu/drm/i915/display/intel_hdcp.c sha_empty = sizeof(sha_text) - sha_leftovers; sha_text 318 drivers/gpu/drm/i915/display/intel_hdcp.c sha_text |= ksv[j] << ((sizeof(sha_text) - j - 1) * 8); sha_text 320 drivers/gpu/drm/i915/display/intel_hdcp.c ret = intel_write_sha_text(dev_priv, sha_text); sha_text 325 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 331 drivers/gpu/drm/i915/display/intel_hdcp.c sha_text = 0; sha_text 333 drivers/gpu/drm/i915/display/intel_hdcp.c sha_text |= ksv[sha_empty + j] << sha_text 334 drivers/gpu/drm/i915/display/intel_hdcp.c ((sizeof(sha_text) - j - 1) * 8); sha_text 340 drivers/gpu/drm/i915/display/intel_hdcp.c if (sizeof(sha_text) > sha_leftovers) sha_text 343 drivers/gpu/drm/i915/display/intel_hdcp.c ret = intel_write_sha_text(dev_priv, sha_text); sha_text 347 drivers/gpu/drm/i915/display/intel_hdcp.c sha_text = 0; sha_text 348 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 364 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 371 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 378 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 383 drivers/gpu/drm/i915/display/intel_hdcp.c sha_text |= bstatus[0] << 16 | bstatus[1] << 8; sha_text 385 drivers/gpu/drm/i915/display/intel_hdcp.c sha_text = (sha_text & 0xffffff00) >> 8; sha_text 386 drivers/gpu/drm/i915/display/intel_hdcp.c ret = intel_write_sha_text(dev_priv, sha_text); sha_text 389 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 396 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 403 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 408 drivers/gpu/drm/i915/display/intel_hdcp.c sha_text |= bstatus[0] << 24 | bstatus[1] << 16; sha_text 409 drivers/gpu/drm/i915/display/intel_hdcp.c ret = intel_write_sha_text(dev_priv, sha_text); sha_text 412 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 420 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 425 drivers/gpu/drm/i915/display/intel_hdcp.c sha_text |= bstatus[0] << 24; sha_text 426 drivers/gpu/drm/i915/display/intel_hdcp.c ret = intel_write_sha_text(dev_priv, sha_text); sha_text 429 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 436 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 443 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 450 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 459 drivers/gpu/drm/i915/display/intel_hdcp.c while ((sha_idx % 64) < (64 - sizeof(sha_text))) { sha_text 463 drivers/gpu/drm/i915/display/intel_hdcp.c sha_idx += sizeof(sha_text); sha_text 471 drivers/gpu/drm/i915/display/intel_hdcp.c sha_text = (num_downstream * 5 + 10) * 8; sha_text 472 drivers/gpu/drm/i915/display/intel_hdcp.c ret = intel_write_sha_text(dev_priv, sha_text);