sh_mem_bases       60 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 		uint32_t sh_mem_bases);
sh_mem_bases      224 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 					uint32_t sh_mem_bases)
sh_mem_bases      231 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 	WREG32(SOC15_REG_OFFSET(GC, 0, mmSH_MEM_BASES), sh_mem_bases);
sh_mem_bases       95 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 		uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);
sh_mem_bases      247 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 					uint32_t sh_mem_bases)
sh_mem_bases      256 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 	WREG32(mmSH_MEM_BASES, sh_mem_bases);
sh_mem_bases       54 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 		uint32_t sh_mem_bases);
sh_mem_bases      203 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 					uint32_t sh_mem_bases)
sh_mem_bases      212 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 	WREG32(mmSH_MEM_BASES, sh_mem_bases);
sh_mem_bases      135 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 					uint32_t sh_mem_bases)
sh_mem_bases      142 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 	WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmSH_MEM_BASES), sh_mem_bases);
sh_mem_bases       28 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h 		uint32_t sh_mem_bases);
sh_mem_bases     1602 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	uint32_t sh_mem_bases;
sh_mem_bases     1610 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	sh_mem_bases = DEFAULT_SH_MEM_BASES | (DEFAULT_SH_MEM_BASES << 16);
sh_mem_bases     1617 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 		WREG32_SOC15(GC, 0, mmSH_MEM_BASES, sh_mem_bases);
sh_mem_bases     1859 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	uint32_t sh_mem_bases;
sh_mem_bases     1867 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	sh_mem_bases = DEFAULT_SH_MEM_BASES | (DEFAULT_SH_MEM_BASES << 16);
sh_mem_bases     1878 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		WREG32(mmSH_MEM_BASES, sh_mem_bases);
sh_mem_bases     3714 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	uint32_t sh_mem_bases;
sh_mem_bases     3722 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	sh_mem_bases = DEFAULT_SH_MEM_BASES | (DEFAULT_SH_MEM_BASES << 16);
sh_mem_bases     3738 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		WREG32(mmSH_MEM_BASES, sh_mem_bases);
sh_mem_bases     2447 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	uint32_t sh_mem_bases;
sh_mem_bases     2455 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	sh_mem_bases = DEFAULT_SH_MEM_BASES | (DEFAULT_SH_MEM_BASES << 16);
sh_mem_bases     2466 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, sh_mem_bases);
sh_mem_bases      132 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c 						qpd->sh_mem_bases);
sh_mem_bases      136 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c 		qpd->sh_mem_bases = SHARED_BASE(temp);
sh_mem_bases      140 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c 		qpd->sh_mem_bases = compute_sh_mem_bases_64bit(temp);
sh_mem_bases      145 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c 		qpd->pqm->process->is_32bit_user_mode, temp, qpd->sh_mem_bases);
sh_mem_bases      172 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c 	qpd->sh_mem_bases = compute_sh_mem_bases_64bit(temp);
sh_mem_bases      175 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c 		qpd->pqm->process->is_32bit_user_mode, temp, qpd->sh_mem_bases);
sh_mem_bases       76 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v10.c 	qpd->sh_mem_bases = compute_sh_mem_bases_64bit(pdd);
sh_mem_bases       78 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v10.c 	pr_debug("sh_mem_bases 0x%X\n", qpd->sh_mem_bases);
sh_mem_bases       73 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c 	qpd->sh_mem_bases = compute_sh_mem_bases_64bit(pdd);
sh_mem_bases       75 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c 	pr_debug("sh_mem_bases 0x%X\n", qpd->sh_mem_bases);
sh_mem_bases      176 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c 		qpd->sh_mem_bases = temp << SH_MEM_BASES__SHARED_BASE__SHIFT;
sh_mem_bases      181 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c 		qpd->sh_mem_bases = compute_sh_mem_bases_64bit(temp);
sh_mem_bases      189 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c 		qpd->pqm->process->is_32bit_user_mode, temp, qpd->sh_mem_bases);
sh_mem_bases      220 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c 	qpd->sh_mem_bases = compute_sh_mem_bases_64bit(temp);
sh_mem_bases      223 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c 		temp, qpd->sh_mem_bases);
sh_mem_bases       93 drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v10.c 	packet->sh_mem_bases = qpd->sh_mem_bases;
sh_mem_bases       92 drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c 	packet->sh_mem_bases = qpd->sh_mem_bases;
sh_mem_bases      103 drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_vi.c 	packet->sh_mem_bases = qpd->sh_mem_bases;
sh_mem_bases       74 drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers.h 	uint32_t sh_mem_bases;
sh_mem_bases      124 drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers.h 	uint32_t sh_mem_bases;
sh_mem_bases      159 drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h 	uint32_t sh_mem_bases;
sh_mem_bases      171 drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_vi.h 	uint32_t sh_mem_bases;
sh_mem_bases      568 drivers/gpu/drm/amd/amdkfd/kfd_priv.h 	uint32_t sh_mem_bases;
sh_mem_bases      247 drivers/gpu/drm/amd/include/kgd_kfd_interface.h 			uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);