sfrbase           265 drivers/iommu/exynos-iommu.c 	void __iomem *sfrbase;		/* our registers */
sfrbase           288 drivers/iommu/exynos-iommu.c 	writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
sfrbase           295 drivers/iommu/exynos-iommu.c 	writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);
sfrbase           296 drivers/iommu/exynos-iommu.c 	while ((i > 0) && !(readl(data->sfrbase + REG_MMU_STATUS) & 1))
sfrbase           299 drivers/iommu/exynos-iommu.c 	if (!(readl(data->sfrbase + REG_MMU_STATUS) & 1)) {
sfrbase           310 drivers/iommu/exynos-iommu.c 		writel(0x1, data->sfrbase + REG_MMU_FLUSH);
sfrbase           312 drivers/iommu/exynos-iommu.c 		writel(0x1, data->sfrbase + REG_V5_MMU_FLUSH_ALL);
sfrbase           323 drivers/iommu/exynos-iommu.c 				     data->sfrbase + REG_MMU_FLUSH_ENTRY);
sfrbase           329 drivers/iommu/exynos-iommu.c 				     data->sfrbase + REG_V5_MMU_FLUSH_ENTRY);
sfrbase           332 drivers/iommu/exynos-iommu.c 				     data->sfrbase + REG_V5_MMU_FLUSH_START);
sfrbase           334 drivers/iommu/exynos-iommu.c 				     data->sfrbase + REG_V5_MMU_FLUSH_END);
sfrbase           335 drivers/iommu/exynos-iommu.c 			writel(1, data->sfrbase + REG_V5_MMU_FLUSH_RANGE);
sfrbase           343 drivers/iommu/exynos-iommu.c 		writel(pgd, data->sfrbase + REG_PT_BASE_ADDR);
sfrbase           346 drivers/iommu/exynos-iommu.c 			     data->sfrbase + REG_V5_PT_BASE_PFN);
sfrbase           373 drivers/iommu/exynos-iommu.c 	ver = readl(data->sfrbase + REG_MMU_VERSION);
sfrbase           432 drivers/iommu/exynos-iommu.c 	itype = __ffs(readl(data->sfrbase + reg_status));
sfrbase           440 drivers/iommu/exynos-iommu.c 	fault_addr = readl(data->sfrbase + finfo->addr_reg);
sfrbase           449 drivers/iommu/exynos-iommu.c 	writel(1 << itype, data->sfrbase + reg_clear);
sfrbase           467 drivers/iommu/exynos-iommu.c 	writel(CTRL_DISABLE, data->sfrbase + REG_MMU_CTRL);
sfrbase           468 drivers/iommu/exynos-iommu.c 	writel(0, data->sfrbase + REG_MMU_CFG);
sfrbase           488 drivers/iommu/exynos-iommu.c 	writel(cfg, data->sfrbase + REG_MMU_CFG);
sfrbase           498 drivers/iommu/exynos-iommu.c 	writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);
sfrbase           501 drivers/iommu/exynos-iommu.c 	writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
sfrbase           581 drivers/iommu/exynos-iommu.c 	data->sfrbase = devm_ioremap_resource(dev, res);
sfrbase           582 drivers/iommu/exynos-iommu.c 	if (IS_ERR(data->sfrbase))
sfrbase           583 drivers/iommu/exynos-iommu.c 		return PTR_ERR(data->sfrbase);