set_wptr 124 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h void (*set_wptr)(struct amdgpu_ring *ring); set_wptr 237 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h #define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r)) set_wptr 1255 drivers/gpu/drm/amd/amdgpu/cik_sdma.c .set_wptr = cik_sdma_ring_set_wptr, set_wptr 5202 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c .set_wptr = gfx_v10_0_ring_set_wptr_gfx, set_wptr 5254 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c .set_wptr = gfx_v10_0_ring_set_wptr_compute, set_wptr 5288 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c .set_wptr = gfx_v10_0_ring_set_wptr_compute, set_wptr 3494 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c .set_wptr = gfx_v6_0_ring_set_wptr_gfx, set_wptr 3519 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c .set_wptr = gfx_v6_0_ring_set_wptr_compute, set_wptr 5005 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c .set_wptr = gfx_v7_0_ring_set_wptr_gfx, set_wptr 5037 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c .set_wptr = gfx_v7_0_ring_set_wptr_compute, set_wptr 6940 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c .set_wptr = gfx_v8_0_ring_set_wptr_gfx, set_wptr 6985 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c .set_wptr = gfx_v8_0_ring_set_wptr_compute, set_wptr 7015 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c .set_wptr = gfx_v8_0_ring_set_wptr_compute, set_wptr 6204 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c .set_wptr = gfx_v9_0_ring_set_wptr_gfx, set_wptr 6255 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c .set_wptr = gfx_v9_0_ring_set_wptr_compute, set_wptr 6290 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c .set_wptr = gfx_v9_0_ring_set_wptr_compute, set_wptr 1142 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c .set_wptr = sdma_v2_4_ring_set_wptr, set_wptr 1580 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c .set_wptr = sdma_v3_0_ring_set_wptr, set_wptr 2262 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c .set_wptr = sdma_v4_0_ring_set_wptr, set_wptr 2298 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c .set_wptr = sdma_v4_0_ring_set_wptr, set_wptr 2330 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c .set_wptr = sdma_v4_0_page_ring_set_wptr, set_wptr 2362 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c .set_wptr = sdma_v4_0_page_ring_set_wptr, set_wptr 1612 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c .set_wptr = sdma_v5_0_ring_set_wptr, set_wptr 726 drivers/gpu/drm/amd/amdgpu/si_dma.c .set_wptr = si_dma_ring_set_wptr, set_wptr 747 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c .set_wptr = uvd_v4_2_ring_set_wptr, set_wptr 856 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c .set_wptr = uvd_v5_0_ring_set_wptr, set_wptr 1522 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c .set_wptr = uvd_v6_0_ring_set_wptr, set_wptr 1548 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c .set_wptr = uvd_v6_0_ring_set_wptr, set_wptr 1577 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c .set_wptr = uvd_v6_0_enc_ring_set_wptr, set_wptr 1780 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c .set_wptr = uvd_v7_0_ring_set_wptr, set_wptr 1813 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c .set_wptr = uvd_v7_0_enc_ring_set_wptr, set_wptr 611 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c .set_wptr = vce_v2_0_ring_set_wptr, set_wptr 900 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c .set_wptr = vce_v3_0_ring_set_wptr, set_wptr 924 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c .set_wptr = vce_v3_0_ring_set_wptr, set_wptr 1076 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c .set_wptr = vce_v4_0_ring_set_wptr, set_wptr 2206 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c .set_wptr = vcn_v1_0_dec_ring_set_wptr, set_wptr 2240 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c .set_wptr = vcn_v1_0_enc_ring_set_wptr, set_wptr 2273 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c .set_wptr = vcn_v1_0_jpeg_ring_set_wptr, set_wptr 2177 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c .set_wptr = vcn_v2_0_dec_ring_set_wptr, set_wptr 2208 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c .set_wptr = vcn_v2_0_enc_ring_set_wptr, set_wptr 2237 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c .set_wptr = vcn_v2_0_jpeg_ring_set_wptr, set_wptr 1006 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c .set_wptr = vcn_v2_5_dec_ring_set_wptr, set_wptr 1106 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c .set_wptr = vcn_v2_5_enc_ring_set_wptr, set_wptr 1185 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c .set_wptr = vcn_v2_5_jpeg_ring_set_wptr, set_wptr 1814 drivers/gpu/drm/radeon/radeon.h void (*set_wptr)(struct radeon_device *rdev, struct radeon_ring *ring); set_wptr 2724 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_set_wptr(rdev, r) (rdev)->asic->ring[(r)->idx]->set_wptr((rdev), (r)) set_wptr 195 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &r100_gfx_set_wptr, set_wptr 345 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &r100_gfx_set_wptr, set_wptr 359 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &r100_gfx_set_wptr, set_wptr 916 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &r600_gfx_set_wptr, set_wptr 929 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &r600_dma_set_wptr, set_wptr 1014 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &uvd_v1_0_set_wptr, set_wptr 1213 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &uvd_v1_0_set_wptr, set_wptr 1320 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &r600_gfx_set_wptr, set_wptr 1333 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &r600_dma_set_wptr, set_wptr 1629 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &cayman_gfx_set_wptr, set_wptr 1644 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &cayman_dma_set_wptr set_wptr 1657 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &uvd_v1_0_set_wptr, set_wptr 1775 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &vce_v1_0_set_wptr, set_wptr 1898 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &cayman_gfx_set_wptr, set_wptr 1913 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &cayman_dma_set_wptr, set_wptr 2040 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &cik_gfx_set_wptr, set_wptr 2055 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &cik_compute_set_wptr, set_wptr 2070 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &cik_sdma_set_wptr, set_wptr 2083 drivers/gpu/drm/radeon/radeon_asic.c .set_wptr = &vce_v1_0_set_wptr,