set_sclk_od       326 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h 		((adev)->powerplay.pp_funcs->set_sclk_od((adev)->powerplay.pp_handle, value))
set_sclk_od      1159 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		if (adev->powerplay.pp_funcs->set_sclk_od)
set_sclk_od       250 drivers/gpu/drm/amd/include/kgd_pp_interface.h 	int (*set_sclk_od)(void *handle, uint32_t value);
set_sclk_od       783 drivers/gpu/drm/amd/powerplay/amd_powerplay.c 	if (hwmgr->hwmgr_func->set_sclk_od == NULL) {
set_sclk_od       789 drivers/gpu/drm/amd/powerplay/amd_powerplay.c 	ret = hwmgr->hwmgr_func->set_sclk_od(hwmgr, value);
set_sclk_od      1573 drivers/gpu/drm/amd/powerplay/amd_powerplay.c 	.set_sclk_od = pp_dpm_set_sclk_od,
set_sclk_od      5147 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	.set_sclk_od = smu7_set_sclk_od,
set_sclk_od      5315 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	.set_sclk_od = vega10_set_sclk_od,
set_sclk_od      2707 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	.set_sclk_od = vega12_set_sclk_od,
set_sclk_od      4190 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	.set_sclk_od = vega20_set_sclk_od,
set_sclk_od       318 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	int (*set_sclk_od)(struct pp_hwmgr *hwmgr, uint32_t value);