set_pp_rate_limit_in  132 drivers/net/ethernet/mellanox/mlx5/core/rl.c 	u32 in[MLX5_ST_SZ_DW(set_pp_rate_limit_in)]   = {0};
set_pp_rate_limit_in  135 drivers/net/ethernet/mellanox/mlx5/core/rl.c 	MLX5_SET(set_pp_rate_limit_in, in, opcode,
set_pp_rate_limit_in  137 drivers/net/ethernet/mellanox/mlx5/core/rl.c 	MLX5_SET(set_pp_rate_limit_in, in, rate_limit_index, index);
set_pp_rate_limit_in  138 drivers/net/ethernet/mellanox/mlx5/core/rl.c 	MLX5_SET(set_pp_rate_limit_in, in, rate_limit, rl->rate);
set_pp_rate_limit_in  139 drivers/net/ethernet/mellanox/mlx5/core/rl.c 	MLX5_SET(set_pp_rate_limit_in, in, burst_upper_bound, rl->max_burst_sz);
set_pp_rate_limit_in  140 drivers/net/ethernet/mellanox/mlx5/core/rl.c 	MLX5_SET(set_pp_rate_limit_in, in, typical_packet_size, rl->typical_pkt_sz);