set_parent        583 arch/mips/alchemy/common/clock.c 	.set_parent	= alchemy_clk_fgv1_setp,
set_parent        724 arch/mips/alchemy/common/clock.c 	.set_parent	= alchemy_clk_fgv2_setp,
set_parent        932 arch/mips/alchemy/common/clock.c 	.set_parent	= alchemy_clk_csrc_setp,
set_parent        147 drivers/clk/actions/owl-composite.c 	.set_parent	= owl_comp_set_parent,
set_parent        164 drivers/clk/actions/owl-composite.c 	.set_parent	= owl_comp_set_parent,
set_parent        193 drivers/clk/actions/owl-composite.c 	.set_parent	= owl_comp_set_parent,
set_parent         58 drivers/clk/actions/owl-mux.c 	.set_parent = owl_mux_set_parent,
set_parent        242 drivers/clk/at91/clk-generated.c 	.set_parent = clk_generated_set_parent,
set_parent         47 drivers/clk/at91/clk-i2s-mux.c 	.set_parent = clk_i2s_mux_set_parent,
set_parent        467 drivers/clk/at91/clk-main.c 	.set_parent = clk_sam9x5_main_set_parent,
set_parent        177 drivers/clk/at91/clk-programmable.c 	.set_parent = clk_programmable_set_parent,
set_parent        103 drivers/clk/at91/clk-smd.c 	.set_parent = at91sam9x5_clk_smd_set_parent,
set_parent        154 drivers/clk/at91/clk-usb.c 	.set_parent = at91sam9x5_clk_usb_set_parent,
set_parent        313 drivers/clk/at91/sckc.c 	.set_parent = clk_sam9x5_slow_set_parent,
set_parent       1274 drivers/clk/bcm/clk-bcm2835.c 	.set_parent = bcm2835_clock_set_parent,
set_parent       1293 drivers/clk/bcm/clk-bcm2835.c 	.set_parent = bcm2835_clock_set_parent,
set_parent       1188 drivers/clk/bcm/clk-kona.c 	.set_parent = kona_peri_clk_set_parent,
set_parent        223 drivers/clk/berlin/berlin2-div.c 	.set_parent	= berlin2_div_set_parent,
set_parent        396 drivers/clk/clk-axi-clkgen.c 	.set_parent = axi_clkgen_set_parent,
set_parent        158 drivers/clk/clk-cdce706.c 	.set_parent = cdce706_clkin_set_parent,
set_parent        374 drivers/clk/clk-cdce706.c 	.set_parent = cdce706_divider_set_parent,
set_parent        439 drivers/clk/clk-cdce706.c 	.set_parent = cdce706_clkout_set_parent,
set_parent         29 drivers/clk/clk-composite.c 	return mux_ops->set_parent(mux_hw, index);
set_parent         64 drivers/clk/clk-composite.c 		   mux_hw && mux_ops && mux_ops->set_parent) {
set_parent        160 drivers/clk/clk-composite.c 		mux_ops->set_parent(mux_hw, index);
set_parent        162 drivers/clk/clk-composite.c 		mux_ops->set_parent(mux_hw, index);
set_parent        236 drivers/clk/clk-composite.c 		if (mux_ops->set_parent)
set_parent        237 drivers/clk/clk-composite.c 			clk_composite_ops->set_parent = clk_composite_set_parent;
set_parent        271 drivers/clk/clk-composite.c 		if (mux_ops->set_parent && rate_ops->set_rate)
set_parent        116 drivers/clk/clk-gpio.c 	.set_parent = clk_gpio_mux_set_parent,
set_parent        212 drivers/clk/clk-lochnagar.c 	.set_parent = lochnagar_clk_set_parent,
set_parent        321 drivers/clk/clk-milbeaut.c 	.set_parent = m10v_mux_set_parent,
set_parent        138 drivers/clk/clk-mux.c 	.set_parent = clk_mux_set_parent,
set_parent        819 drivers/clk/clk-qoriq.c 	.set_parent = mux_set_parent,
set_parent        761 drivers/clk/clk-si5341.c 	.set_parent = si5341_output_set_parent,
set_parent        533 drivers/clk/clk-si5351.c 	.set_parent = si5351_pll_set_parent,
set_parent        789 drivers/clk/clk-si5351.c 	.set_parent = si5351_msynth_set_parent,
set_parent       1135 drivers/clk/clk-si5351.c 	.set_parent = si5351_clkout_set_parent,
set_parent       1044 drivers/clk/clk-stm32f4.c 	ret = clk_mux_ops.set_parent(hw, index);
set_parent       1053 drivers/clk/clk-stm32f4.c 	.set_parent = cclk_mux_set_parent,
set_parent        709 drivers/clk/clk-stm32mp1.c 	ret = clk_mux_ops.set_parent(hw, index);
set_parent        724 drivers/clk/clk-stm32mp1.c 	.set_parent	= clk_mmux_set_parent,
set_parent        266 drivers/clk/clk-versaclock5.c 	.set_parent	= vc5_mux_set_parent,
set_parent        660 drivers/clk/clk-versaclock5.c 	.set_parent	= vc5_clk_out_set_parent,
set_parent        333 drivers/clk/clk-wm831x.c 	.set_parent = wm831x_clkout_set_parent,
set_parent       1798 drivers/clk/clk.c 	if (parent && core->ops->set_parent)
set_parent       1799 drivers/clk/clk.c 		ret = core->ops->set_parent(core->hw, p_index);
set_parent       2051 drivers/clk/clk.c 		} else if (core->ops->set_parent) {
set_parent       2052 drivers/clk/clk.c 			core->ops->set_parent(core->hw, core->new_parent_index);
set_parent       2476 drivers/clk/clk.c 	if (core->num_parents > 1 && !core->ops->set_parent)
set_parent       3324 drivers/clk/clk.c 	if (core->ops->set_parent && !core->ops->get_parent) {
set_parent       3339 drivers/clk/clk.c 			!(core->ops->set_parent && core->ops->set_rate)) {
set_parent       3863 drivers/clk/clk.c 	.set_parent	= clk_nodrv_set_parent,
set_parent        232 drivers/clk/davinci/da8xx-cfgchip.c 	.set_parent	= da8xx_cfgchip_mux_clk_set_parent,
set_parent        497 drivers/clk/davinci/da8xx-cfgchip.c 	.set_parent	= da8xx_usb0_clk48_set_parent,
set_parent        568 drivers/clk/davinci/da8xx-cfgchip.c 	.set_parent	= da8xx_usb1_clk48_set_parent,
set_parent        142 drivers/clk/imx/clk-busy.c 	ret = busy->mux_ops->set_parent(&busy->mux.hw, index);
set_parent        151 drivers/clk/imx/clk-busy.c 	.set_parent = clk_busy_mux_set_parent,
set_parent         63 drivers/clk/imx/clk-fixup-mux.c 	.set_parent = clk_fixup_mux_set_parent,
set_parent        504 drivers/clk/imx/clk-sccg-pll.c 	.set_parent	= clk_sccg_pll_set_parent,
set_parent        334 drivers/clk/imx/clk-scu.c 	.set_parent = clk_scu_set_parent,
set_parent        581 drivers/clk/ingenic/cgu.c 	.set_parent = ingenic_clk_set_parent,
set_parent        201 drivers/clk/ingenic/jz4780-cgu.c 	.set_parent = jz4780_otg_phy_set_parent,
set_parent        223 drivers/clk/ingenic/tcu.c 	.set_parent	= ingenic_tcu_set_parent,
set_parent        252 drivers/clk/keystone/sci-clk.c 	return clk->provider->ops->set_parent(clk->provider->sci, clk->dev_id,
set_parent        265 drivers/clk/keystone/sci-clk.c 	.set_parent = sci_clk_set_parent,
set_parent         45 drivers/clk/mediatek/clk-cpumux.c 	.set_parent = clk_cpumux_set_parent,
set_parent        134 drivers/clk/mediatek/clk-mux.c 	.set_parent = mtk_clk_mux_set_parent_lock,
set_parent        139 drivers/clk/mediatek/clk-mux.c 	.set_parent = mtk_clk_mux_set_parent_setclr_lock,
set_parent        147 drivers/clk/mediatek/clk-mux.c 	.set_parent = mtk_clk_mux_set_parent_lock,
set_parent        155 drivers/clk/mediatek/clk-mux.c 	.set_parent = mtk_clk_mux_set_parent_setclr_lock,
set_parent        175 drivers/clk/meson/clk-regmap.c 	.set_parent = clk_regmap_mux_set_parent,
set_parent        548 drivers/clk/microchip/clk-core.c 	.set_parent		= roclk_set_parent,
set_parent        907 drivers/clk/microchip/clk-core.c 	.set_parent	= sclk_set_parent,
set_parent        918 drivers/clk/microchip/clk-core.c 	.set_parent	= sclk_set_parent,
set_parent        434 drivers/clk/mmp/clk-mix.c 	.set_parent = mmp_clk_set_parent,
set_parent        593 drivers/clk/mvebu/armada-37xx-periph.c 	.set_parent = clk_pm_cpu_set_parent,
set_parent       1040 drivers/clk/nxp/clk-lpc32xx.c 	.set_parent = clk_mux_set_parent,
set_parent         85 drivers/clk/pxa/clk-pxa.c 	.set_parent = dummy_clk_set_parent,
set_parent         24 drivers/clk/pxa/clk-pxa.h 		.set_parent = dummy_clk_set_parent,		\
set_parent         75 drivers/clk/pxa/clk-pxa.h 		.set_parent = name ## _set_parent,		\
set_parent         72 drivers/clk/qcom/clk-krait.c 	.set_parent = krait_mux_set_parent,
set_parent        812 drivers/clk/qcom/clk-rcg.c 	.set_parent = clk_rcg_set_parent,
set_parent        823 drivers/clk/qcom/clk-rcg.c 	.set_parent = clk_rcg_set_parent,
set_parent        834 drivers/clk/qcom/clk-rcg.c 	.set_parent = clk_rcg_set_parent,
set_parent        846 drivers/clk/qcom/clk-rcg.c 	.set_parent = clk_rcg_set_parent,
set_parent        858 drivers/clk/qcom/clk-rcg.c 	.set_parent = clk_rcg_set_parent,
set_parent        870 drivers/clk/qcom/clk-rcg.c 	.set_parent = clk_rcg_set_parent,
set_parent        882 drivers/clk/qcom/clk-rcg.c 	.set_parent = clk_dyn_rcg_set_parent,
set_parent        362 drivers/clk/qcom/clk-rcg2.c 	.set_parent = clk_rcg2_set_parent,
set_parent        373 drivers/clk/qcom/clk-rcg2.c 	.set_parent = clk_rcg2_set_parent,
set_parent        500 drivers/clk/qcom/clk-rcg2.c 	.set_parent = clk_rcg2_set_parent,
set_parent        558 drivers/clk/qcom/clk-rcg2.c 	.set_parent = clk_rcg2_set_parent,
set_parent        628 drivers/clk/qcom/clk-rcg2.c 	.set_parent = clk_rcg2_set_parent,
set_parent        718 drivers/clk/qcom/clk-rcg2.c 	.set_parent = clk_rcg2_set_parent,
set_parent        805 drivers/clk/qcom/clk-rcg2.c 	.set_parent = clk_rcg2_set_parent,
set_parent        943 drivers/clk/qcom/clk-rcg2.c 	.set_parent = clk_rcg2_set_parent,
set_parent        225 drivers/clk/qcom/clk-regmap-mux-div.c 	.set_parent = mux_div_set_parent,
set_parent         54 drivers/clk/qcom/clk-regmap-mux.c 	.set_parent = mux_set_parent,
set_parent       1742 drivers/clk/qcom/gcc-ipq4019.c 		err = clk_rcg2_ops.set_parent(&apps_clk_src.clkr.hw,
set_parent         43 drivers/clk/qcom/krait-cc.c 		ret = krait_mux_clk_ops.set_parent(&mux->hw, mux->safe_sel);
set_parent         52 drivers/clk/qcom/krait-cc.c 			ret = krait_mux_clk_ops.set_parent(&mux->hw,
set_parent        600 drivers/clk/qcom/mmcc-msm8960.c 	.set_parent = pix_rdi_set_parent,
set_parent        174 drivers/clk/renesas/clk-div6.c 	.set_parent = cpg_div6_clock_set_parent,
set_parent        751 drivers/clk/renesas/r9a06g032-clocks.c 	.set_parent = r9a06g032_clk_mux_set_parent,
set_parent         52 drivers/clk/rockchip/clk-muxgrf.c 	.set_parent = rockchip_muxgrf_set_parent,
set_parent        198 drivers/clk/rockchip/clk-pll.c 		pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW);
set_parent        232 drivers/clk/rockchip/clk-pll.c 		pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);
set_parent        429 drivers/clk/rockchip/clk-pll.c 		pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW);
set_parent        465 drivers/clk/rockchip/clk-pll.c 		pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);
set_parent        675 drivers/clk/rockchip/clk-pll.c 		pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW);
set_parent        711 drivers/clk/rockchip/clk-pll.c 		pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM);
set_parent        154 drivers/clk/rockchip/clk.c 			frac->mux_ops->set_parent(&frac_mux->hw,
set_parent        166 drivers/clk/rockchip/clk.c 			frac->mux_ops->set_parent(&frac_mux->hw,
set_parent         87 drivers/clk/samsung/clk-s3c2410-dclk.c 	.set_parent = s3c24xx_clkout_set_parent,
set_parent        588 drivers/clk/sirf/clk-atlas7.c 	.set_parent = dto_clk_set_parent,
set_parent        447 drivers/clk/sirf/clk-common.c 	.set_parent = dmn_clk_set_parent,
set_parent        495 drivers/clk/sirf/clk-common.c 	.set_parent = dmn_clk_set_parent,
set_parent        524 drivers/clk/sirf/clk-common.c 	.set_parent = dmn_clk_set_parent,
set_parent        168 drivers/clk/socfpga/clk-gate.c 	.set_parent = socfpga_clk_set_parent,
set_parent        235 drivers/clk/socfpga/clk-gate.c 		ops->set_parent = NULL;
set_parent         54 drivers/clk/sprd/composite.c 	.set_parent	= sprd_comp_set_parent,
set_parent         73 drivers/clk/sprd/mux.c 	.set_parent = sprd_mux_set_parent,
set_parent        106 drivers/clk/st/clk-flexgen.c 	return clk_mux_ops.set_parent(mux_hw, index);
set_parent        192 drivers/clk/st/clk-flexgen.c 	.set_parent = flexgen_set_parent,
set_parent        138 drivers/clk/sunxi-ng/ccu_div.c 	.set_parent	= ccu_div_set_parent,
set_parent        242 drivers/clk/sunxi-ng/ccu_mp.c 	.set_parent	= ccu_mp_set_parent,
set_parent        322 drivers/clk/sunxi-ng/ccu_mp.c 	.set_parent	= ccu_mp_set_parent,
set_parent        167 drivers/clk/sunxi-ng/ccu_mult.c 	.set_parent	= ccu_mult_set_parent,
set_parent        249 drivers/clk/sunxi-ng/ccu_mux.c 	.set_parent	= ccu_mux_set_parent,
set_parent        203 drivers/clk/sunxi-ng/ccu_nkm.c 	.set_parent	= ccu_nkm_set_parent,
set_parent        217 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c 	.set_parent	= tcon_ch1_set_parent,
set_parent        284 drivers/clk/tegra/clk-bpmp.c 	.set_parent = tegra_bpmp_clk_set_parent,
set_parent        303 drivers/clk/tegra/clk-bpmp.c 	.set_parent = tegra_bpmp_clk_set_parent,
set_parent         32 drivers/clk/tegra/clk-periph.c 	return mux_ops->set_parent(mux_hw, index);
set_parent        104 drivers/clk/tegra/clk-periph.c 	.set_parent = clk_periph_set_parent,
set_parent        115 drivers/clk/tegra/clk-periph.c 	.set_parent = clk_periph_set_parent,
set_parent        123 drivers/clk/tegra/clk-periph.c 	.set_parent = clk_periph_set_parent,
set_parent        199 drivers/clk/tegra/clk-sdmmc-mux.c 	.set_parent = clk_sdmmc_mux_set_parent,
set_parent        115 drivers/clk/tegra/clk-super.c 	.set_parent = clk_super_set_parent,
set_parent        153 drivers/clk/tegra/clk-super.c 	.set_parent = clk_super_set_parent,
set_parent         38 drivers/clk/ti/dpll.c 	.set_parent	= &omap3_noncore_dpll_set_parent,
set_parent         63 drivers/clk/ti/dpll.c 	.set_parent	= &omap3_noncore_dpll_set_parent,
set_parent         76 drivers/clk/ti/dpll.c 	.set_parent	= &omap3_noncore_dpll_set_parent,
set_parent        117 drivers/clk/ti/dpll.c 	.set_parent	= &omap3_noncore_dpll_set_parent,
set_parent        129 drivers/clk/ti/dpll.c 	.set_parent	= &omap3_noncore_dpll_set_parent,
set_parent        141 drivers/clk/ti/dpll.c 	.set_parent	= &omap3_noncore_dpll_set_parent,
set_parent        123 drivers/clk/ti/mux.c 	.set_parent = ti_clk_mux_set_parent,
set_parent         72 drivers/clk/uniphier/clk-uniphier-cpugear.c 	.set_parent = uniphier_clk_cpugear_set_parent,
set_parent         52 drivers/clk/uniphier/clk-uniphier-mux.c 	.set_parent = uniphier_clk_mux_set_parent,
set_parent        113 drivers/clk/ux500/clk-sysctrl.c 	.set_parent = clk_sysctrl_set_parent,
set_parent         67 drivers/clk/versatile/clk-sp810.c 	.set_parent = clk_sp810_timerclken_set_parent,
set_parent        128 drivers/clk/versatile/clk-sp810.c 			init.ops->set_parent(&sp810->timerclken[i].hw, 1);
set_parent        156 drivers/clk/x86/clk-pmc-atom.c 	.set_parent = plt_clk_set_parent,
set_parent         87 drivers/clk/zynqmp/clk-mux-zynqmp.c 	.set_parent = zynqmp_clk_mux_set_parent,
set_parent       2957 drivers/firmware/ti_sci.c 	cops->set_parent = ti_sci_cmd_clk_set_parent;
set_parent        448 drivers/gpu/drm/pl111/pl111_display.c 				    unsigned long *prate, bool set_parent)
set_parent        459 drivers/gpu/drm/pl111/pl111_display.c 		if (set_parent)
set_parent        200 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 	.set_parent	= sun4i_tmds_set_parent,
set_parent        140 drivers/gpu/drm/sun4i/sun8i_hdmi_phy_clk.c 	.set_parent	= sun8i_phy_clk_set_parent,
set_parent        570 drivers/gpu/drm/tegra/sor.c 	.set_parent = tegra_clk_sor_pad_set_parent,
set_parent        450 drivers/media/platform/atmel/atmel-isc-base.c 	.set_parent	= isc_clk_set_parent,
set_parent        390 drivers/phy/ti/phy-am654-serdes.c 	.set_parent = serdes_am654_clk_mux_set_parent,
set_parent        302 drivers/rtc/rtc-ac100.c 	.set_parent	= ac100_clkout_set_parent,
set_parent        211 drivers/rtc/rtc-sun6i.c 	.set_parent	= sun6i_rtc_osc_set_parent,
set_parent        523 drivers/sh/clk/core.c 		if (clk->ops->set_parent)
set_parent        524 drivers/sh/clk/core.c 			ret = clk->ops->set_parent(clk, parent);
set_parent        580 drivers/sh/clk/core.c 			if (likely(clkp->ops->set_parent))
set_parent        581 drivers/sh/clk/core.c 				clkp->ops->set_parent(clkp,
set_parent        333 drivers/sh/clk/cpg.c 	.set_parent	= sh_clk_div6_set_parent,
set_parent        386 drivers/sh/clk/cpg.c 	.set_parent	= sh_clk_div4_set_parent,
set_parent        231 include/linux/clk-provider.h 	int		(*set_parent)(struct clk_hw *hw, u8 index);
set_parent         30 include/linux/sh_clk.h 	int (*set_parent)(struct clk *clk, struct clk *parent);
set_parent        183 include/linux/soc/ti/ti_sci_protocol.h 	int (*set_parent)(const struct ti_sci_handle *handle, u32 did, u32 cid,
set_parent        264 sound/soc/codecs/tlv320aic32x4-clk.c 	.set_parent = clk_aic32x4_pll_set_parent,
set_parent        288 sound/soc/codecs/tlv320aic32x4-clk.c 	.set_parent = clk_aic32x4_codec_clkin_set_parent,
set_parent        375 sound/soc/codecs/tlv320aic32x4-clk.c 	.set_parent = clk_aic32x4_bdiv_set_parent,