set_hard_min_fclk_by_freq  658 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	if (!pp_funcs || !pp_funcs->set_hard_min_fclk_by_freq)
set_hard_min_fclk_by_freq  661 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	pp_funcs->set_hard_min_fclk_by_freq(pp_handle, mhz);
set_hard_min_fclk_by_freq  922 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		funcs->rv_funcs.set_hard_min_fclk_by_freq =
set_hard_min_fclk_by_freq  196 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c 		if (pp_smu->set_hard_min_fclk_by_freq &&
set_hard_min_fclk_by_freq  199 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c 			pp_smu->set_hard_min_fclk_by_freq(&pp_smu->pp_smu, new_clocks->fclk_khz / 1000);
set_hard_min_fclk_by_freq  216 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c 		if (pp_smu->set_hard_min_fclk_by_freq &&
set_hard_min_fclk_by_freq  219 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c 			pp_smu->set_hard_min_fclk_by_freq(&pp_smu->pp_smu, new_clocks->fclk_khz / 1000);
set_hard_min_fclk_by_freq  135 drivers/gpu/drm/amd/display/dc/dm_pp_smu.h 	void (*set_hard_min_fclk_by_freq)(struct pp_smu *pp, int mhz);
set_hard_min_fclk_by_freq  307 drivers/gpu/drm/amd/include/kgd_pp_interface.h 	int (*set_hard_min_fclk_by_freq)(void *handle, uint32_t clock);
set_hard_min_fclk_by_freq 1393 drivers/gpu/drm/amd/powerplay/amd_powerplay.c 	if (hwmgr->hwmgr_func->set_hard_min_fclk_by_freq == NULL) {
set_hard_min_fclk_by_freq 1399 drivers/gpu/drm/amd/powerplay/amd_powerplay.c 	hwmgr->hwmgr_func->set_hard_min_fclk_by_freq(hwmgr, clock);
set_hard_min_fclk_by_freq 1604 drivers/gpu/drm/amd/powerplay/amd_powerplay.c 	.set_hard_min_fclk_by_freq = pp_set_hard_min_fclk_by_freq,
set_hard_min_fclk_by_freq  525 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c 	if (!hwmgr->hwmgr_func->set_hard_min_fclk_by_freq)
set_hard_min_fclk_by_freq  528 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c 	return hwmgr->hwmgr_func->set_hard_min_fclk_by_freq(hwmgr, clock);
set_hard_min_fclk_by_freq 1366 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	.set_hard_min_fclk_by_freq = smu10_set_hard_min_fclk_by_freq,
set_hard_min_fclk_by_freq  349 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	int (*set_hard_min_fclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);