seq_state 941 arch/alpha/kernel/core_cia.c const char *seq_state; seq_state 976 arch/alpha/kernel/core_cia.c seq_state = "Idle"; seq_state 979 arch/alpha/kernel/core_cia.c seq_state = "DMA READ or DMA WRITE"; seq_state 982 arch/alpha/kernel/core_cia.c seq_state = "READ MISS (or READ MISS MODIFY) with victim"; seq_state 985 arch/alpha/kernel/core_cia.c seq_state = "READ MISS (or READ MISS MODIFY) with no victim"; seq_state 988 arch/alpha/kernel/core_cia.c seq_state = "Refresh"; seq_state 991 arch/alpha/kernel/core_cia.c seq_state = "Idle, waiting for DMA pending read"; seq_state 994 arch/alpha/kernel/core_cia.c seq_state = "Idle, ras precharge"; seq_state 997 arch/alpha/kernel/core_cia.c seq_state = "Unknown"; seq_state 1027 arch/alpha/kernel/core_cia.c printk(KERN_CRIT " Memory sequencer state: %s\n", seq_state); seq_state 216 arch/mips/kernel/smp-cps.c u32 stat, seq_state; seq_state 255 arch/mips/kernel/smp-cps.c seq_state = stat & CPC_Cx_STAT_CONF_SEQSTATE; seq_state 256 arch/mips/kernel/smp-cps.c seq_state >>= __ffs(CPC_Cx_STAT_CONF_SEQSTATE); seq_state 259 arch/mips/kernel/smp-cps.c if (seq_state == CPC_Cx_STAT_CONF_SEQSTATE_U6) seq_state 225 drivers/hwtracing/coresight/coresight-etm4x-sysfs.c config->seq_state = 0x0; seq_state 1280 drivers/hwtracing/coresight/coresight-etm4x-sysfs.c val = config->seq_state; seq_state 1297 drivers/hwtracing/coresight/coresight-etm4x-sysfs.c config->seq_state = val; seq_state 1300 drivers/hwtracing/coresight/coresight-etm4x-sysfs.c static DEVICE_ATTR_RW(seq_state); seq_state 132 drivers/hwtracing/coresight/coresight-etm4x.c writel_relaxed(config->seq_state, drvdata->base + TRCSEQSTR); seq_state 259 drivers/hwtracing/coresight/coresight-etm4x.h u32 seq_state; seq_state 886 drivers/net/ieee802154/mcr20a.c u8 seq_state = lp->irq_data[DAR_IRQ_STS1] & DAR_PHY_CTRL1_XCVSEQ_MASK; seq_state 895 drivers/net/ieee802154/mcr20a.c switch (seq_state) {