SEL_SDHI2_0 513 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define MOD_SEL1_16 FM(SEL_SDHI2_0) FM(SEL_SDHI2_1) SEL_SDHI2_0 1102 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_MSEL(IP9_27_24, SD2_CD_A, SEL_SDHI2_0), SEL_SDHI2_0 1105 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_MSEL(IP9_31_28, SD2_WP_A, SEL_SDHI2_0), SEL_SDHI2_0 520 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define MOD_SEL1_16 FM(SEL_SDHI2_0) FM(SEL_SDHI2_1) SEL_SDHI2_0 1140 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_MSEL(IP10_23_20, SD2_CD_A, SEL_SDHI2_0), SEL_SDHI2_0 1144 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_MSEL(IP10_27_24, SD2_WP_A, SEL_SDHI2_0), SEL_SDHI2_0 524 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define MOD_SEL1_16 FM(SEL_SDHI2_0) FM(SEL_SDHI2_1) SEL_SDHI2_0 1142 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_MSEL(IP10_23_20, SD2_CD_A, SEL_SDHI2_0), SEL_SDHI2_0 1146 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_MSEL(IP10_27_24, SD2_WP_A, SEL_SDHI2_0), SEL_SDHI2_0 525 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define MOD_SEL1_16 FM(SEL_SDHI2_0) FM(SEL_SDHI2_1) SEL_SDHI2_0 1146 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_MSEL(IP10_23_20, SD2_CD_A, SEL_SDHI2_0), SEL_SDHI2_0 1150 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_MSEL(IP10_27_24, SD2_WP_A, SEL_SDHI2_0), SEL_SDHI2_0 928 drivers/pinctrl/sh-pfc/pfc-sh7734.c PINMUX_IPSR_MSEL(IP5_2_0, SD2_CLK_A, SEL_SDHI2_0), SEL_SDHI2_0 933 drivers/pinctrl/sh-pfc/pfc-sh7734.c PINMUX_IPSR_MSEL(IP5_5_3, SD2_CMD_A, SEL_SDHI2_0), SEL_SDHI2_0 938 drivers/pinctrl/sh-pfc/pfc-sh7734.c PINMUX_IPSR_MSEL(IP5_8_6, SD2_DAT0_A, SEL_SDHI2_0), SEL_SDHI2_0 943 drivers/pinctrl/sh-pfc/pfc-sh7734.c PINMUX_IPSR_MSEL(IP5_11_9, SD2_DAT1_A, SEL_SDHI2_0), SEL_SDHI2_0 948 drivers/pinctrl/sh-pfc/pfc-sh7734.c PINMUX_IPSR_MSEL(IP5_14_12, SD2_DAT2_A, SEL_SDHI2_0), SEL_SDHI2_0 953 drivers/pinctrl/sh-pfc/pfc-sh7734.c PINMUX_IPSR_MSEL(IP5_17_15, SD2_DAT3_A, SEL_SDHI2_0), SEL_SDHI2_0 958 drivers/pinctrl/sh-pfc/pfc-sh7734.c PINMUX_IPSR_MSEL(IP5_20_18, SD2_CD_A, SEL_SDHI2_0), SEL_SDHI2_0 963 drivers/pinctrl/sh-pfc/pfc-sh7734.c PINMUX_IPSR_MSEL(IP5_22_21, SD2_WP_A, SEL_SDHI2_0),