SEL_SCIF5_1       574 drivers/pinctrl/sh-pfc/pfc-r8a77470.c 	PINMUX_IPSR_MSEL(IP1_11_8, RX5_B, SEL_SCIF5_1),
SEL_SCIF5_1       580 drivers/pinctrl/sh-pfc/pfc-r8a77470.c 	PINMUX_IPSR_MSEL(IP1_15_12, TX5_B, SEL_SCIF5_1),
SEL_SCIF5_1       683 drivers/pinctrl/sh-pfc/pfc-r8a7779.c 	PINMUX_IPSR_MSEL(IP1_10_7, RX5_B, SEL_SCIF5_1),
SEL_SCIF5_1       694 drivers/pinctrl/sh-pfc/pfc-r8a7779.c 	PINMUX_IPSR_MSEL(IP1_14_11, SCK5_B, SEL_SCIF5_1),
SEL_SCIF5_1      1581 drivers/pinctrl/sh-pfc/pfc-r8a7791.c 	PINMUX_IPSR_MSEL(IP14_10_8, TX5_B, SEL_SCIF5_1),
SEL_SCIF5_1      1586 drivers/pinctrl/sh-pfc/pfc-r8a7791.c 	PINMUX_IPSR_MSEL(IP14_13_11, RX5_B, SEL_SCIF5_1),
SEL_SCIF5_1       737 drivers/pinctrl/sh-pfc/pfc-r8a7794.c 	PINMUX_IPSR_MSEL(IP0_27_26, SCIF5_RXD_B, SEL_SCIF5_1),
SEL_SCIF5_1       740 drivers/pinctrl/sh-pfc/pfc-r8a7794.c 	PINMUX_IPSR_MSEL(IP0_29_28, SCIF5_TXD_B, SEL_SCIF5_1),
SEL_SCIF5_1       540 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define MOD_SEL2_26		FM(SEL_SCIF5_0)		FM(SEL_SCIF5_1)
SEL_SCIF5_1      1183 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_MSEL(IP11_27_24,	SCK5_B,			SEL_SCIF5_1),
SEL_SCIF5_1      1274 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_MSEL(IP13_11_8,	RX5_B,			SEL_SCIF5_1),
SEL_SCIF5_1      1309 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_MSEL(IP13_31_28,	TX5_B,			SEL_SCIF5_1),
SEL_SCIF5_1       544 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define MOD_SEL2_26		FM(SEL_SCIF5_0)		FM(SEL_SCIF5_1)
SEL_SCIF5_1      1189 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_MSEL(IP11_27_24,	SCK5_B,			SEL_SCIF5_1),
SEL_SCIF5_1      1280 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_MSEL(IP13_11_8,	RX5_B,			SEL_SCIF5_1),
SEL_SCIF5_1      1315 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_MSEL(IP13_31_28,	TX5_B,			SEL_SCIF5_1),
SEL_SCIF5_1       545 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define MOD_SEL2_26		FM(SEL_SCIF5_0)		FM(SEL_SCIF5_1)
SEL_SCIF5_1      1193 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_MSEL(IP11_27_24,	SCK5_B,			SEL_SCIF5_1),
SEL_SCIF5_1      1284 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_MSEL(IP13_11_8,	RX5_B,			SEL_SCIF5_1),
SEL_SCIF5_1      1319 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_MSEL(IP13_31_28,	TX5_B,			SEL_SCIF5_1),
SEL_SCIF5_1       465 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define MOD_SEL1_10_9	   REV4(FM(SEL_SCIF5_0),		FM(SEL_SCIF5_1),		FM(SEL_SCIF5_2),		F_(0, 0))
SEL_SCIF5_1       650 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_MSEL(IP2_27_24,		RX5_B,		SEL_SCIF5_1),
SEL_SCIF5_1       391 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define MOD_SEL0_28		FM(SEL_SCIF5_0)		FM(SEL_SCIF5_1)
SEL_SCIF5_1       564 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 	PINMUX_IPSR_MSEL(IP1_11_8,	SCK5_B, SEL_SCIF5_1),
SEL_SCIF5_1       568 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 	PINMUX_IPSR_MSEL(IP1_15_12,	RX5_B, SEL_SCIF5_1),
SEL_SCIF5_1       572 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 	PINMUX_IPSR_MSEL(IP1_19_16,	TX5_B, SEL_SCIF5_1),
SEL_SCIF5_1      1082 drivers/pinctrl/sh-pfc/pfc-sh7734.c 	PINMUX_IPSR_MSEL(IP7_26_24, RX5_B, SEL_SCIF5_1),
SEL_SCIF5_1      1087 drivers/pinctrl/sh-pfc/pfc-sh7734.c 	PINMUX_IPSR_MSEL(IP7_28_27, TX5_B, SEL_SCIF5_1),