SEL_SCIF0_0       918 drivers/pinctrl/sh-pfc/pfc-r8a77470.c 	PINMUX_IPSR_MSEL(IP11_31_28, RX0_A, SEL_SCIF0_0),
SEL_SCIF0_0       924 drivers/pinctrl/sh-pfc/pfc-r8a77470.c 	PINMUX_IPSR_MSEL(IP12_3_0, TX0_A, SEL_SCIF0_0),
SEL_SCIF0_0       603 drivers/pinctrl/sh-pfc/pfc-r8a7779.c 	PINMUX_IPSR_MSEL(IP0_2_0, SCK0, SEL_SCIF0_0),
SEL_SCIF0_0      1115 drivers/pinctrl/sh-pfc/pfc-r8a7779.c 	PINMUX_IPSR_MSEL(IP8_3_0, CTS0, SEL_SCIF0_0),
SEL_SCIF0_0      1124 drivers/pinctrl/sh-pfc/pfc-r8a7779.c 	PINMUX_IPSR_MSEL(IP8_7_4, RTS0_TANS, SEL_SCIF0_0),
SEL_SCIF0_0      1142 drivers/pinctrl/sh-pfc/pfc-r8a7779.c 	PINMUX_IPSR_MSEL(IP8_15_12, RX0, SEL_SCIF0_0),
SEL_SCIF0_0      1597 drivers/pinctrl/sh-pfc/pfc-r8a7790.c 	PINMUX_IPSR_MSEL(IP14_8_6, RX0, SEL_SCIF0_0),
SEL_SCIF0_0      1602 drivers/pinctrl/sh-pfc/pfc-r8a7790.c 	PINMUX_IPSR_MSEL(IP14_11_9, TX0, SEL_SCIF0_0),
SEL_SCIF0_0       902 drivers/pinctrl/sh-pfc/pfc-r8a7791.c 	PINMUX_IPSR_MSEL(IP2_9_7, TX0, SEL_SCIF0_0),
SEL_SCIF0_0       907 drivers/pinctrl/sh-pfc/pfc-r8a7791.c 	PINMUX_IPSR_MSEL(IP2_12_10, RX0, SEL_SCIF0_0),
SEL_SCIF0_0       721 drivers/pinctrl/sh-pfc/pfc-r8a7794.c 	PINMUX_IPSR_MSEL(IP0_19_18, SCIF0_RXD, SEL_SCIF0_0),
SEL_SCIF0_0       725 drivers/pinctrl/sh-pfc/pfc-r8a7794.c 	PINMUX_IPSR_MSEL(IP0_21_20, SCIF0_TXD, SEL_SCIF0_0),
SEL_SCIF0_0       913 drivers/pinctrl/sh-pfc/pfc-r8a7794.c 	PINMUX_IPSR_MSEL(IP4_1_0, SCIF_CLK, SEL_SCIF0_0),
SEL_SCIF0_0       446 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define MOD_SEL0_3		FM(SEL_SCIF0_0)			FM(SEL_SCIF0_1)
SEL_SCIF0_0      1089 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_MSEL(IP11_11_8,		RX0_A,		SEL_SCIF0_0),
SEL_SCIF0_0      1095 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_MSEL(IP11_15_12,		TX0_A,		SEL_SCIF0_0),
SEL_SCIF0_0      1101 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_MSEL(IP11_19_16,		CTS0_N_A,	SEL_SCIF0_0),
SEL_SCIF0_0      1108 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_MSEL(IP11_23_20,		RTS0_N_A,	SEL_SCIF0_0),
SEL_SCIF0_0      1115 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_MSEL(IP11_27_24,		SCK0_A,		SEL_SCIF0_0),
SEL_SCIF0_0       416 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define MOD_SEL1_27		FM(SEL_SCIF0_0)		FM(SEL_SCIF0_1)
SEL_SCIF0_0       872 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 	PINMUX_IPSR_MSEL(IP11_19_16,	SCK0_A, SEL_SCIF0_0),
SEL_SCIF0_0       876 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 	PINMUX_IPSR_MSEL(IP11_23_20,	RX0_A, SEL_SCIF0_0),
SEL_SCIF0_0       880 drivers/pinctrl/sh-pfc/pfc-r8a77995.c 	PINMUX_IPSR_MSEL(IP11_27_24,	TX0_A, SEL_SCIF0_0),
SEL_SCIF0_0      1147 drivers/pinctrl/sh-pfc/pfc-sh7734.c 	PINMUX_IPSR_MSEL(IP8_27_26, CTS0_A, SEL_SCIF0_0),
SEL_SCIF0_0      1152 drivers/pinctrl/sh-pfc/pfc-sh7734.c 	PINMUX_IPSR_MSEL(IP8_29_28, RTS0_A, SEL_SCIF0_0),
SEL_SCIF0_0      1303 drivers/pinctrl/sh-pfc/pfc-sh7734.c 	PINMUX_IPSR_MSEL(IP11_9_7, SCK0_A, SEL_SCIF0_0),
SEL_SCIF0_0      1309 drivers/pinctrl/sh-pfc/pfc-sh7734.c 	PINMUX_IPSR_MSEL(IP11_11_10, RX0_A, SEL_SCIF0_0),
SEL_SCIF0_0      1314 drivers/pinctrl/sh-pfc/pfc-sh7734.c 	PINMUX_IPSR_MSEL(IP11_12, TX0_A, SEL_SCIF0_0),