sdvo_reg           76 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	int sdvo_reg;
sdvo_reg          235 drivers/gpu/drm/gma500/psb_intel_sdvo.c 		if (psb_intel_sdvo->sdvo_reg == SDVOB)
sdvo_reg          399 drivers/gpu/drm/gma500/psb_intel_sdvo.c #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
sdvo_reg         1074 drivers/gpu/drm/gma500/psb_intel_sdvo.c 		sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
sdvo_reg         1076 drivers/gpu/drm/gma500/psb_intel_sdvo.c 		sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
sdvo_reg         1078 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	switch (psb_intel_sdvo->sdvo_reg) {
sdvo_reg         1128 drivers/gpu/drm/gma500/psb_intel_sdvo.c 				temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
sdvo_reg         1130 drivers/gpu/drm/gma500/psb_intel_sdvo.c 				temp = REG_READ(psb_intel_sdvo->sdvo_reg);
sdvo_reg         1141 drivers/gpu/drm/gma500/psb_intel_sdvo.c 			temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
sdvo_reg         1143 drivers/gpu/drm/gma500/psb_intel_sdvo.c 			temp = REG_READ(psb_intel_sdvo->sdvo_reg);
sdvo_reg         1247 drivers/gpu/drm/gma500/psb_intel_sdvo.c 		if (sdvo->sdvo_reg == SDVOB && sdvoB)
sdvo_reg         1250 drivers/gpu/drm/gma500/psb_intel_sdvo.c 		if (sdvo->sdvo_reg == SDVOC && !sdvoB)
sdvo_reg         1818 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg);
sdvo_reg         1828 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO);
sdvo_reg         1977 drivers/gpu/drm/gma500/psb_intel_sdvo.c psb_intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
sdvo_reg         1982 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	if (IS_SDVOB(sdvo_reg)) {
sdvo_reg         2007 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	if (IS_SDVOB(sdvo_reg))
sdvo_reg         2514 drivers/gpu/drm/gma500/psb_intel_sdvo.c bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
sdvo_reg         2525 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	psb_intel_sdvo->sdvo_reg = sdvo_reg;
sdvo_reg         2526 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	psb_intel_sdvo->slave_addr = psb_intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
sdvo_reg         2527 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
sdvo_reg         2545 drivers/gpu/drm/gma500/psb_intel_sdvo.c 				      IS_SDVOB(sdvo_reg) ? 'B' : 'C');
sdvo_reg         2550 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	if (IS_SDVOB(sdvo_reg))
sdvo_reg         2564 drivers/gpu/drm/gma500/psb_intel_sdvo.c 			      IS_SDVOB(sdvo_reg) ? 'B' : 'C');
sdvo_reg         2568 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
sdvo_reg           87 drivers/gpu/drm/i915/display/intel_sdvo.c 	i915_reg_t sdvo_reg;
sdvo_reg          220 drivers/gpu/drm/i915/display/intel_sdvo.c 		I915_WRITE(intel_sdvo->sdvo_reg, val);
sdvo_reg          221 drivers/gpu/drm/i915/display/intel_sdvo.c 		POSTING_READ(intel_sdvo->sdvo_reg);
sdvo_reg          227 drivers/gpu/drm/i915/display/intel_sdvo.c 			I915_WRITE(intel_sdvo->sdvo_reg, val);
sdvo_reg          228 drivers/gpu/drm/i915/display/intel_sdvo.c 			POSTING_READ(intel_sdvo->sdvo_reg);
sdvo_reg         1521 drivers/gpu/drm/i915/display/intel_sdvo.c 		sdvox = I915_READ(intel_sdvo->sdvo_reg);
sdvo_reg         1563 drivers/gpu/drm/i915/display/intel_sdvo.c 			     i915_reg_t sdvo_reg, enum pipe *pipe)
sdvo_reg         1567 drivers/gpu/drm/i915/display/intel_sdvo.c 	val = I915_READ(sdvo_reg);
sdvo_reg         1590 drivers/gpu/drm/i915/display/intel_sdvo.c 	ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
sdvo_reg         1610 drivers/gpu/drm/i915/display/intel_sdvo.c 	sdvox = I915_READ(intel_sdvo->sdvo_reg);
sdvo_reg         1737 drivers/gpu/drm/i915/display/intel_sdvo.c 	temp = I915_READ(intel_sdvo->sdvo_reg);
sdvo_reg         1794 drivers/gpu/drm/i915/display/intel_sdvo.c 	temp = I915_READ(intel_sdvo->sdvo_reg);
sdvo_reg         3239 drivers/gpu/drm/i915/display/intel_sdvo.c 		     i915_reg_t sdvo_reg, enum port port)
sdvo_reg         3251 drivers/gpu/drm/i915/display/intel_sdvo.c 	intel_sdvo->sdvo_reg = sdvo_reg;
sdvo_reg           19 drivers/gpu/drm/i915/display/intel_sdvo.h 			     i915_reg_t sdvo_reg, enum pipe *pipe);