sdvo 1236 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct psb_intel_sdvo *sdvo; sdvo 1245 drivers/gpu/drm/gma500/psb_intel_sdvo.c sdvo = iout->dev_priv; sdvo 1247 drivers/gpu/drm/gma500/psb_intel_sdvo.c if (sdvo->sdvo_reg == SDVOB && sdvoB) sdvo 1250 drivers/gpu/drm/gma500/psb_intel_sdvo.c if (sdvo->sdvo_reg == SDVOC && !sdvoB) sdvo 1310 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector); sdvo 1311 drivers/gpu/drm/gma500/psb_intel_sdvo.c return drm_get_edid(connector, &sdvo->ddc); sdvo 1816 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(&gma_encoder->base); sdvo 1818 drivers/gpu/drm/gma500/psb_intel_sdvo.c sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg); sdvo 1825 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder); sdvo 1828 drivers/gpu/drm/gma500/psb_intel_sdvo.c REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO); sdvo 1876 drivers/gpu/drm/gma500/psb_intel_sdvo.c psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo) sdvo 1882 drivers/gpu/drm/gma500/psb_intel_sdvo.c sdvo->ddc_bus = 2; sdvo 1891 drivers/gpu/drm/gma500/psb_intel_sdvo.c switch (sdvo->controlled_output) { sdvo 1908 drivers/gpu/drm/gma500/psb_intel_sdvo.c mask &= sdvo->caps.output_flags; sdvo 1915 drivers/gpu/drm/gma500/psb_intel_sdvo.c sdvo->ddc_bus = 1 << num_bits; sdvo 1928 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct psb_intel_sdvo *sdvo, u32 reg) sdvo 1938 drivers/gpu/drm/gma500/psb_intel_sdvo.c sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); sdvo 1940 drivers/gpu/drm/gma500/psb_intel_sdvo.c psb_intel_sdvo_guess_ddc_bus(sdvo); sdvo 1945 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct psb_intel_sdvo *sdvo, u32 reg) sdvo 1963 drivers/gpu/drm/gma500/psb_intel_sdvo.c sdvo->i2c = &dev_priv->gmbus[pin].adapter; sdvo 1964 drivers/gpu/drm/gma500/psb_intel_sdvo.c gma_intel_gmbus_set_speed(sdvo->i2c, speed); sdvo 1965 drivers/gpu/drm/gma500/psb_intel_sdvo.c gma_intel_gmbus_force_bit(sdvo->i2c, true); sdvo 1967 drivers/gpu/drm/gma500/psb_intel_sdvo.c sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter; sdvo 2481 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct psb_intel_sdvo *sdvo = adapter->algo_data; sdvo 2483 drivers/gpu/drm/gma500/psb_intel_sdvo.c if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) sdvo 2486 drivers/gpu/drm/gma500/psb_intel_sdvo.c return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); sdvo 2491 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct psb_intel_sdvo *sdvo = adapter->algo_data; sdvo 2492 drivers/gpu/drm/gma500/psb_intel_sdvo.c return sdvo->i2c->algo->functionality(sdvo->i2c); sdvo 2501 drivers/gpu/drm/gma500/psb_intel_sdvo.c psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo, sdvo 2504 drivers/gpu/drm/gma500/psb_intel_sdvo.c sdvo->ddc.owner = THIS_MODULE; sdvo 2505 drivers/gpu/drm/gma500/psb_intel_sdvo.c sdvo->ddc.class = I2C_CLASS_DDC; sdvo 2506 drivers/gpu/drm/gma500/psb_intel_sdvo.c snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); sdvo 2507 drivers/gpu/drm/gma500/psb_intel_sdvo.c sdvo->ddc.dev.parent = &dev->pdev->dev; sdvo 2508 drivers/gpu/drm/gma500/psb_intel_sdvo.c sdvo->ddc.algo_data = sdvo; sdvo 2509 drivers/gpu/drm/gma500/psb_intel_sdvo.c sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy; sdvo 2511 drivers/gpu/drm/gma500/psb_intel_sdvo.c return i2c_add_adapter(&sdvo->ddc) == 0; sdvo 1944 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_sdvo *sdvo = intel_attached_sdvo(connector); sdvo 1945 drivers/gpu/drm/i915/display/intel_sdvo.c return drm_get_edid(connector, &sdvo->ddc); sdvo 2016 drivers/gpu/drm/i915/display/intel_sdvo.c intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, sdvo 2020 drivers/gpu/drm/i915/display/intel_sdvo.c bool connector_is_digital = !!IS_DIGITAL(sdvo); sdvo 2382 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_sdvo *sdvo = intel_attached_sdvo(connector); sdvo 2390 drivers/gpu/drm/i915/display/intel_sdvo.c &sdvo->ddc.dev.kobj, sdvo 2391 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->ddc.dev.kobj.name); sdvo 2397 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_sdvo *sdvo = intel_attached_sdvo(connector); sdvo 2400 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->ddc.dev.kobj.name); sdvo 2473 drivers/gpu/drm/i915/display/intel_sdvo.c intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) sdvo 2482 drivers/gpu/drm/i915/display/intel_sdvo.c switch (sdvo->controlled_output) { sdvo 2504 drivers/gpu/drm/i915/display/intel_sdvo.c mask &= sdvo->caps.output_flags; sdvo 2511 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->ddc_bus = 1 << num_bits; sdvo 2523 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_sdvo *sdvo) sdvo 2527 drivers/gpu/drm/i915/display/intel_sdvo.c if (sdvo->port == PORT_B) sdvo 2533 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); sdvo 2535 drivers/gpu/drm/i915/display/intel_sdvo.c intel_sdvo_guess_ddc_bus(sdvo); sdvo 2540 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_sdvo *sdvo) sdvo 2545 drivers/gpu/drm/i915/display/intel_sdvo.c if (sdvo->port == PORT_B) sdvo 2556 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); sdvo 2563 drivers/gpu/drm/i915/display/intel_sdvo.c intel_gmbus_force_bit(sdvo->i2c, true); sdvo 2568 drivers/gpu/drm/i915/display/intel_sdvo.c intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo) sdvo 2570 drivers/gpu/drm/i915/display/intel_sdvo.c intel_gmbus_force_bit(sdvo->i2c, false); sdvo 2581 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_sdvo *sdvo) sdvo 2585 drivers/gpu/drm/i915/display/intel_sdvo.c if (sdvo->port == PORT_B) { sdvo 2612 drivers/gpu/drm/i915/display/intel_sdvo.c if (sdvo->port == PORT_B) sdvo 3166 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_sdvo *sdvo = adapter->algo_data; sdvo 3168 drivers/gpu/drm/i915/display/intel_sdvo.c if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) sdvo 3171 drivers/gpu/drm/i915/display/intel_sdvo.c return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); sdvo 3176 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_sdvo *sdvo = adapter->algo_data; sdvo 3177 drivers/gpu/drm/i915/display/intel_sdvo.c return sdvo->i2c->algo->functionality(sdvo->i2c); sdvo 3188 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_sdvo *sdvo = adapter->algo_data; sdvo 3189 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags); sdvo 3195 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_sdvo *sdvo = adapter->algo_data; sdvo 3196 drivers/gpu/drm/i915/display/intel_sdvo.c return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags); sdvo 3202 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_sdvo *sdvo = adapter->algo_data; sdvo 3203 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags); sdvo 3213 drivers/gpu/drm/i915/display/intel_sdvo.c intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, sdvo 3218 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->ddc.owner = THIS_MODULE; sdvo 3219 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->ddc.class = I2C_CLASS_DDC; sdvo 3220 drivers/gpu/drm/i915/display/intel_sdvo.c snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); sdvo 3221 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->ddc.dev.parent = &pdev->dev; sdvo 3222 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->ddc.algo_data = sdvo; sdvo 3223 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->ddc.algo = &intel_sdvo_ddc_proxy; sdvo 3224 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo->ddc.lock_ops = &proxy_lock_ops; sdvo 3226 drivers/gpu/drm/i915/display/intel_sdvo.c return i2c_add_adapter(&sdvo->ddc) == 0;