sdrc_block_contents  303 arch/arm/mach-omap2/control.c 	struct omap3_scratchpad_sdrc_block sdrc_block_contents;
sdrc_block_contents  342 arch/arm/mach-omap2/control.c 	sdrc_block_contents.sysconfig =
sdrc_block_contents  344 arch/arm/mach-omap2/control.c 	sdrc_block_contents.cs_cfg =
sdrc_block_contents  346 arch/arm/mach-omap2/control.c 	sdrc_block_contents.sharing =
sdrc_block_contents  348 arch/arm/mach-omap2/control.c 	sdrc_block_contents.err_type =
sdrc_block_contents  350 arch/arm/mach-omap2/control.c 	sdrc_block_contents.dll_a_ctrl = sdrc_read_reg(SDRC_DLLA_CTRL);
sdrc_block_contents  351 arch/arm/mach-omap2/control.c 	sdrc_block_contents.dll_b_ctrl = 0x0;
sdrc_block_contents  359 arch/arm/mach-omap2/control.c 		sdrc_block_contents.power = (sdrc_read_reg(SDRC_POWER) &
sdrc_block_contents  365 arch/arm/mach-omap2/control.c 		sdrc_block_contents.power = sdrc_read_reg(SDRC_POWER);
sdrc_block_contents  367 arch/arm/mach-omap2/control.c 	sdrc_block_contents.cs_0 = 0x0;
sdrc_block_contents  368 arch/arm/mach-omap2/control.c 	sdrc_block_contents.mcfg_0 = sdrc_read_reg(SDRC_MCFG_0);
sdrc_block_contents  369 arch/arm/mach-omap2/control.c 	sdrc_block_contents.mr_0 = (sdrc_read_reg(SDRC_MR_0) & 0xFFFF);
sdrc_block_contents  370 arch/arm/mach-omap2/control.c 	sdrc_block_contents.emr_1_0 = 0x0;
sdrc_block_contents  371 arch/arm/mach-omap2/control.c 	sdrc_block_contents.emr_2_0 = 0x0;
sdrc_block_contents  372 arch/arm/mach-omap2/control.c 	sdrc_block_contents.emr_3_0 = 0x0;
sdrc_block_contents  373 arch/arm/mach-omap2/control.c 	sdrc_block_contents.actim_ctrla_0 =
sdrc_block_contents  375 arch/arm/mach-omap2/control.c 	sdrc_block_contents.actim_ctrlb_0 =
sdrc_block_contents  377 arch/arm/mach-omap2/control.c 	sdrc_block_contents.rfr_ctrl_0 =
sdrc_block_contents  379 arch/arm/mach-omap2/control.c 	sdrc_block_contents.cs_1 = 0x0;
sdrc_block_contents  380 arch/arm/mach-omap2/control.c 	sdrc_block_contents.mcfg_1 = sdrc_read_reg(SDRC_MCFG_1);
sdrc_block_contents  381 arch/arm/mach-omap2/control.c 	sdrc_block_contents.mr_1 = sdrc_read_reg(SDRC_MR_1) & 0xFFFF;
sdrc_block_contents  382 arch/arm/mach-omap2/control.c 	sdrc_block_contents.emr_1_1 = 0x0;
sdrc_block_contents  383 arch/arm/mach-omap2/control.c 	sdrc_block_contents.emr_2_1 = 0x0;
sdrc_block_contents  384 arch/arm/mach-omap2/control.c 	sdrc_block_contents.emr_3_1 = 0x0;
sdrc_block_contents  385 arch/arm/mach-omap2/control.c 	sdrc_block_contents.actim_ctrla_1 =
sdrc_block_contents  387 arch/arm/mach-omap2/control.c 	sdrc_block_contents.actim_ctrlb_1 =
sdrc_block_contents  389 arch/arm/mach-omap2/control.c 	sdrc_block_contents.rfr_ctrl_1 =
sdrc_block_contents  391 arch/arm/mach-omap2/control.c 	sdrc_block_contents.dcdl_1_ctrl = 0x0;
sdrc_block_contents  392 arch/arm/mach-omap2/control.c 	sdrc_block_contents.dcdl_2_ctrl = 0x0;
sdrc_block_contents  393 arch/arm/mach-omap2/control.c 	sdrc_block_contents.flags = 0x0;
sdrc_block_contents  394 arch/arm/mach-omap2/control.c 	sdrc_block_contents.block_size = 0x0;
sdrc_block_contents  408 arch/arm/mach-omap2/control.c 		&sdrc_block_contents, sizeof(sdrc_block_contents));
sdrc_block_contents  415 arch/arm/mach-omap2/control.c 		sizeof(sdrc_block_contents), &arm_context_addr, 4);