sdp_ctrl          733 drivers/edac/amd64_edac.c 			if (!(pvt->umc[i].sdp_ctrl & UMC_SDP_INIT))
sdp_ctrl          848 drivers/edac/amd64_edac.c 		edac_dbg(1, "UMC%d SDP ctrl: 0x%x\n", i, umc->sdp_ctrl);
sdp_ctrl         1449 drivers/edac/amd64_edac.c 		channels += !!(pvt->umc[i].sdp_ctrl & UMC_SDP_INIT);
sdp_ctrl         2715 drivers/edac/amd64_edac.c 			if (pvt->umc[i].sdp_ctrl & UMC_SDP_INIT) {
sdp_ctrl         2756 drivers/edac/amd64_edac.c 		amd_smn_read(nid, umc_base + UMCCH_SDP_CTRL, &umc->sdp_ctrl);
sdp_ctrl         3258 drivers/edac/amd64_edac.c 		if (pvt->umc[i].sdp_ctrl & UMC_SDP_INIT) {
sdp_ctrl          332 drivers/edac/amd64_edac.h 	u32 sdp_ctrl;		/* SDP Control reg */