sdma_cntl        1116 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 	u32 sdma_cntl;
sdma_cntl        1122 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 			sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET);
sdma_cntl        1123 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 			sdma_cntl &= ~SDMA0_CNTL__TRAP_ENABLE_MASK;
sdma_cntl        1124 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 			WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);
sdma_cntl        1127 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 			sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET);
sdma_cntl        1128 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 			sdma_cntl |= SDMA0_CNTL__TRAP_ENABLE_MASK;
sdma_cntl        1129 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 			WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);
sdma_cntl        1138 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 			sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET);
sdma_cntl        1139 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 			sdma_cntl &= ~SDMA0_CNTL__TRAP_ENABLE_MASK;
sdma_cntl        1140 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 			WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);
sdma_cntl        1143 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 			sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET);
sdma_cntl        1144 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 			sdma_cntl |= SDMA0_CNTL__TRAP_ENABLE_MASK;
sdma_cntl        1145 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 			WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);
sdma_cntl        1009 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 	u32 sdma_cntl;
sdma_cntl        1015 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET);
sdma_cntl        1016 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0);
sdma_cntl        1017 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);
sdma_cntl        1020 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET);
sdma_cntl        1021 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1);
sdma_cntl        1022 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);
sdma_cntl        1031 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET);
sdma_cntl        1032 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0);
sdma_cntl        1033 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);
sdma_cntl        1036 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET);
sdma_cntl        1037 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1);
sdma_cntl        1038 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);
sdma_cntl        1343 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 	u32 sdma_cntl;
sdma_cntl        1349 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET);
sdma_cntl        1350 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0);
sdma_cntl        1351 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);
sdma_cntl        1354 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET);
sdma_cntl        1355 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1);
sdma_cntl        1356 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);
sdma_cntl        1365 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET);
sdma_cntl        1366 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0);
sdma_cntl        1367 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);
sdma_cntl        1370 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET);
sdma_cntl        1371 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1);
sdma_cntl        1372 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);
sdma_cntl        1990 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	u32 sdma_cntl;
sdma_cntl        1992 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	sdma_cntl = RREG32_SDMA(type, mmSDMA0_CNTL);
sdma_cntl        1993 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE,
sdma_cntl        1995 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(type, mmSDMA0_CNTL, sdma_cntl);
sdma_cntl        1412 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c 	u32 sdma_cntl;
sdma_cntl        1418 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c 	sdma_cntl = RREG32(reg_offset);
sdma_cntl        1419 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c 	sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE,
sdma_cntl        1421 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c 	WREG32(reg_offset, sdma_cntl);
sdma_cntl         591 drivers/gpu/drm/amd/amdgpu/si_dma.c 	u32 sdma_cntl;
sdma_cntl         597 drivers/gpu/drm/amd/amdgpu/si_dma.c 			sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET);
sdma_cntl         598 drivers/gpu/drm/amd/amdgpu/si_dma.c 			sdma_cntl &= ~TRAP_ENABLE;
sdma_cntl         599 drivers/gpu/drm/amd/amdgpu/si_dma.c 			WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl);
sdma_cntl         602 drivers/gpu/drm/amd/amdgpu/si_dma.c 			sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET);
sdma_cntl         603 drivers/gpu/drm/amd/amdgpu/si_dma.c 			sdma_cntl |= TRAP_ENABLE;
sdma_cntl         604 drivers/gpu/drm/amd/amdgpu/si_dma.c 			WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl);
sdma_cntl         613 drivers/gpu/drm/amd/amdgpu/si_dma.c 			sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET);
sdma_cntl         614 drivers/gpu/drm/amd/amdgpu/si_dma.c 			sdma_cntl &= ~TRAP_ENABLE;
sdma_cntl         615 drivers/gpu/drm/amd/amdgpu/si_dma.c 			WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl);
sdma_cntl         618 drivers/gpu/drm/amd/amdgpu/si_dma.c 			sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET);
sdma_cntl         619 drivers/gpu/drm/amd/amdgpu/si_dma.c 			sdma_cntl |= TRAP_ENABLE;
sdma_cntl         620 drivers/gpu/drm/amd/amdgpu/si_dma.c 			WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl);