sdma_base_addr 135 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c uint32_t sdma_base_addr, sdmax_gfx_context_cntl; sdma_base_addr 142 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, sdma_base_addr 147 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, sdma_base_addr 152 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c data = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS); sdma_base_addr 164 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL_OFFSET, sdma_base_addr 169 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL, data); sdma_base_addr 170 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR, m->sdmax_rlcx_rb_rptr); sdma_base_addr 171 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_HI, sdma_base_addr 174 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1); sdma_base_addr 176 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR, sdma_base_addr 178 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR_HI, sdma_base_addr 181 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR, sdma_base_addr 183 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR_HI, sdma_base_addr 186 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0); sdma_base_addr 188 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base); sdma_base_addr 189 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE_HI, sdma_base_addr 191 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_ADDR_LO, sdma_base_addr 193 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_ADDR_HI, sdma_base_addr 198 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, data); sdma_base_addr 208 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c uint32_t sdma_base_addr = get_sdma_base_addr(adev, engine_id, queue_id); sdma_base_addr 218 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c DUMP_REG(sdma_base_addr + reg); sdma_base_addr 220 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c DUMP_REG(sdma_base_addr + reg); sdma_base_addr 223 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c DUMP_REG(sdma_base_addr + reg); sdma_base_addr 226 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c DUMP_REG(sdma_base_addr + reg); sdma_base_addr 238 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c uint32_t sdma_base_addr; sdma_base_addr 242 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, sdma_base_addr 245 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c sdma_rlc_rb_cntl = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); sdma_base_addr 258 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c uint32_t sdma_base_addr; sdma_base_addr 263 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, sdma_base_addr 266 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); sdma_base_addr 268 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, temp); sdma_base_addr 271 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS); sdma_base_addr 279 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL, 0); sdma_base_addr 280 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, sdma_base_addr 281 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) | sdma_base_addr 284 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c m->sdmax_rlcx_rb_rptr = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR); sdma_base_addr 286 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_HI); sdma_base_addr 491 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c uint32_t sdma_base_addr, sdmax_gfx_context_cntl; sdma_base_addr 498 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, sdma_base_addr 500 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c pr_debug("sdma load base addr %x for engine %d, queue %d\n", sdma_base_addr, m->sdma_engine_id, m->sdma_queue_id); sdma_base_addr 505 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, sdma_base_addr 510 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c data = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS); sdma_base_addr 522 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL_OFFSET, sdma_base_addr 527 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL, data); sdma_base_addr 528 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR, m->sdmax_rlcx_rb_rptr); sdma_base_addr 529 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_HI, sdma_base_addr 532 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1); sdma_base_addr 534 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR, sdma_base_addr 536 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR_HI, sdma_base_addr 539 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR, sdma_base_addr 541 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR_HI, sdma_base_addr 544 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0); sdma_base_addr 546 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base); sdma_base_addr 547 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE_HI, sdma_base_addr 549 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_ADDR_LO, sdma_base_addr 551 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_ADDR_HI, sdma_base_addr 556 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, data); sdma_base_addr 566 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c uint32_t sdma_base_addr = get_sdma_base_addr(adev, engine_id, queue_id); sdma_base_addr 572 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c pr_debug("sdma base addr %x\n", sdma_base_addr); sdma_base_addr 579 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c DUMP_REG(sdma_base_addr + reg); sdma_base_addr 581 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c DUMP_REG(sdma_base_addr + reg); sdma_base_addr 584 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c DUMP_REG(sdma_base_addr + reg); sdma_base_addr 587 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c DUMP_REG(sdma_base_addr + reg); sdma_base_addr 621 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c uint32_t sdma_base_addr; sdma_base_addr 625 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, sdma_base_addr 628 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c sdma_rlc_rb_cntl = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); sdma_base_addr 749 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c uint32_t sdma_base_addr; sdma_base_addr 754 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, sdma_base_addr 757 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); sdma_base_addr 759 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, temp); sdma_base_addr 762 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS); sdma_base_addr 770 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL, 0); sdma_base_addr 771 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, sdma_base_addr 772 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) | sdma_base_addr 775 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c m->sdmax_rlcx_rb_rptr = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR); sdma_base_addr 777 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_HI); sdma_base_addr 416 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c uint32_t sdma_base_addr; sdma_base_addr 420 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c sdma_base_addr = get_sdma_base_addr(m); sdma_base_addr 422 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, sdma_base_addr 427 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c data = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS); sdma_base_addr 448 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL, data); sdma_base_addr 449 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR, m->sdma_rlc_rb_rptr); sdma_base_addr 452 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR, data); sdma_base_addr 454 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR, sdma_base_addr 457 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_VIRTUAL_ADDR, sdma_base_addr 459 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE, m->sdma_rlc_rb_base); sdma_base_addr 460 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE_HI, sdma_base_addr 462 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_ADDR_LO, sdma_base_addr 464 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_ADDR_HI, sdma_base_addr 469 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, data); sdma_base_addr 527 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c uint32_t sdma_base_addr; sdma_base_addr 531 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c sdma_base_addr = get_sdma_base_addr(m); sdma_base_addr 533 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c sdma_rlc_rb_cntl = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); sdma_base_addr 648 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c uint32_t sdma_base_addr; sdma_base_addr 653 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c sdma_base_addr = get_sdma_base_addr(m); sdma_base_addr 655 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); sdma_base_addr 657 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, temp); sdma_base_addr 660 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS); sdma_base_addr 668 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL, 0); sdma_base_addr 669 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, sdma_base_addr 670 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) | sdma_base_addr 673 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c m->sdma_rlc_rb_rptr = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR); sdma_base_addr 401 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c uint32_t sdma_base_addr; sdma_base_addr 405 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c sdma_base_addr = get_sdma_base_addr(m); sdma_base_addr 406 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, sdma_base_addr 411 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c data = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS); sdma_base_addr 432 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL, data); sdma_base_addr 433 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR, m->sdmax_rlcx_rb_rptr); sdma_base_addr 436 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR, data); sdma_base_addr 438 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR, sdma_base_addr 441 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_VIRTUAL_ADDR, sdma_base_addr 443 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base); sdma_base_addr 444 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE_HI, sdma_base_addr 446 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_ADDR_LO, sdma_base_addr 448 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_ADDR_HI, sdma_base_addr 453 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, data); sdma_base_addr 520 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c uint32_t sdma_base_addr; sdma_base_addr 524 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c sdma_base_addr = get_sdma_base_addr(m); sdma_base_addr 526 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c sdma_rlc_rb_cntl = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); sdma_base_addr 644 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c uint32_t sdma_base_addr; sdma_base_addr 649 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c sdma_base_addr = get_sdma_base_addr(m); sdma_base_addr 651 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); sdma_base_addr 653 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, temp); sdma_base_addr 656 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS); sdma_base_addr 664 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL, 0); sdma_base_addr 665 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, sdma_base_addr 666 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) | sdma_base_addr 669 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c m->sdmax_rlcx_rb_rptr = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR); sdma_base_addr 391 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c uint32_t sdma_base_addr, sdmax_gfx_context_cntl; sdma_base_addr 398 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, sdma_base_addr 404 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, sdma_base_addr 409 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c data = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS); sdma_base_addr 421 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL_OFFSET, sdma_base_addr 426 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL, data); sdma_base_addr 427 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR, m->sdmax_rlcx_rb_rptr); sdma_base_addr 428 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_HI, sdma_base_addr 431 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1); sdma_base_addr 433 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR, sdma_base_addr 435 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR_HI, sdma_base_addr 438 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR, sdma_base_addr 440 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR_HI, sdma_base_addr 443 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0); sdma_base_addr 445 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base); sdma_base_addr 446 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE_HI, sdma_base_addr 448 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_ADDR_LO, sdma_base_addr 450 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_ADDR_HI, sdma_base_addr 455 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, data); sdma_base_addr 465 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c uint32_t sdma_base_addr = get_sdma_base_addr(adev, engine_id, queue_id); sdma_base_addr 475 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c DUMP_REG(sdma_base_addr + reg); sdma_base_addr 477 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c DUMP_REG(sdma_base_addr + reg); sdma_base_addr 480 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c DUMP_REG(sdma_base_addr + reg); sdma_base_addr 483 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c DUMP_REG(sdma_base_addr + reg); sdma_base_addr 517 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c uint32_t sdma_base_addr; sdma_base_addr 521 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, sdma_base_addr 524 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c sdma_rlc_rb_cntl = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); sdma_base_addr 587 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c uint32_t sdma_base_addr; sdma_base_addr 592 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, sdma_base_addr 595 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); sdma_base_addr 597 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, temp); sdma_base_addr 600 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS); sdma_base_addr 608 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL, 0); sdma_base_addr 609 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, sdma_base_addr 610 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) | sdma_base_addr 613 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c m->sdmax_rlcx_rb_rptr = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR); sdma_base_addr 615 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_HI);