sdh1_lock         177 drivers/clk/mmp/clk-of-pxa168.c static DEFINE_SPINLOCK(sdh1_lock);
sdh1_lock         191 drivers/clk/mmp/clk-of-pxa168.c 	{0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6, 1, 0, &sdh1_lock},
sdh1_lock         207 drivers/clk/mmp/clk-of-pxa168.c 	{PXA168_CLK_SDH1, "sdh1_clk", "sdh1_mux", CLK_SET_RATE_PARENT, APMU_SDH1, 0x1b, 0x1b, 0x0, 0, &sdh1_lock},
sdh1_lock         143 drivers/clk/mmp/clk-of-pxa1928.c static DEFINE_SPINLOCK(sdh1_lock);
sdh1_lock         164 drivers/clk/mmp/clk-of-pxa1928.c 	{PXA1928_CLK_SDH1, "sdh1_clk", "sdh_div", CLK_SET_RATE_PARENT, PXA1928_CLK_SDH1 * 4, 0x1b, 0x1b, 0x0, 0, &sdh1_lock},
sdh1_lock         183 drivers/clk/mmp/clk-of-pxa910.c static DEFINE_SPINLOCK(sdh1_lock);
sdh1_lock         197 drivers/clk/mmp/clk-of-pxa910.c 	{0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6, 1, 0, &sdh1_lock},
sdh1_lock         213 drivers/clk/mmp/clk-of-pxa910.c 	{PXA910_CLK_SDH1, "sdh1_clk", "sdh1_mux", CLK_SET_RATE_PARENT, APMU_SDH1, 0x1b, 0x1b, 0x0, 0, &sdh1_lock},