SEL_HSCIF2_0 1323 drivers/pinctrl/sh-pfc/pfc-r8a7791.c PINMUX_IPSR_MSEL(IP9_31_29, HCTS2_N, SEL_HSCIF2_0), SEL_HSCIF2_0 1332 drivers/pinctrl/sh-pfc/pfc-r8a7791.c PINMUX_IPSR_MSEL(IP10_2_0, HRTS2_N, SEL_HSCIF2_0), SEL_HSCIF2_0 1339 drivers/pinctrl/sh-pfc/pfc-r8a7791.c PINMUX_IPSR_MSEL(IP10_5_3, HSCK2, SEL_HSCIF2_0), SEL_HSCIF2_0 1346 drivers/pinctrl/sh-pfc/pfc-r8a7791.c PINMUX_IPSR_MSEL(IP10_8_6, HRX2, SEL_HSCIF2_0), SEL_HSCIF2_0 1352 drivers/pinctrl/sh-pfc/pfc-r8a7791.c PINMUX_IPSR_MSEL(IP10_11_9, HTX2, SEL_HSCIF2_0), SEL_HSCIF2_0 492 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define MOD_SEL0_14 FM(SEL_HSCIF2_0) FM(SEL_HSCIF2_1) SEL_HSCIF2_0 1314 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_MSEL(IP14_15_12, HCTS2_N_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1319 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_MSEL(IP14_19_16, HRTS2_N_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1327 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_MSEL(IP14_23_20, HRX2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1335 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_MSEL(IP14_27_24, HTX2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1343 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_MSEL(IP14_31_28, HSCK2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 502 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define MOD_SEL0_14_13 FM(SEL_HSCIF2_0) FM(SEL_HSCIF2_1) FM(SEL_HSCIF2_2) F_(0, 0) SEL_HSCIF2_0 1364 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_MSEL(IP15_15_12, HCTS2_N_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1369 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_MSEL(IP15_19_16, HRTS2_N_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1377 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_MSEL(IP15_23_20, HRX2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1385 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_MSEL(IP15_27_24, HTX2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1393 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_MSEL(IP15_31_28, HSCK2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 506 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define MOD_SEL0_14_13 FM(SEL_HSCIF2_0) FM(SEL_HSCIF2_1) FM(SEL_HSCIF2_2) F_(0, 0) SEL_HSCIF2_0 1370 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_MSEL(IP15_15_12, HCTS2_N_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1375 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_MSEL(IP15_19_16, HRTS2_N_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1383 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_MSEL(IP15_23_20, HRX2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1391 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_MSEL(IP15_27_24, HTX2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1399 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_MSEL(IP15_31_28, HSCK2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 507 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define MOD_SEL0_14_13 FM(SEL_HSCIF2_0) FM(SEL_HSCIF2_1) FM(SEL_HSCIF2_2) F_(0, 0) SEL_HSCIF2_0 1374 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_MSEL(IP15_15_12, HCTS2_N_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1379 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_MSEL(IP15_19_16, HRTS2_N_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1387 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_MSEL(IP15_23_20, HRX2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1395 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_MSEL(IP15_27_24, HTX2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1403 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_MSEL(IP15_31_28, HSCK2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 433 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define MOD_SEL0_22 FM(SEL_HSCIF2_0) FM(SEL_HSCIF2_1) SEL_HSCIF2_0 1173 drivers/pinctrl/sh-pfc/pfc-r8a77990.c PINMUX_IPSR_MSEL(IP13_3_0, HRX2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1258 drivers/pinctrl/sh-pfc/pfc-r8a77990.c PINMUX_IPSR_MSEL(IP15_11_8, HSCK2_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1265 drivers/pinctrl/sh-pfc/pfc-r8a77990.c PINMUX_IPSR_MSEL(IP15_15_12, HCTS2_N_A, SEL_HSCIF2_0), SEL_HSCIF2_0 1273 drivers/pinctrl/sh-pfc/pfc-r8a77990.c PINMUX_IPSR_MSEL(IP15_19_16, HRTS2_N_A, SEL_HSCIF2_0),