scr0             1417 drivers/scsi/ncr53c8xx.c #define  QU_REG	scr0
scr0             2152 drivers/scsi/ncr53c8xx.c 		RADDR (scr0),
scr0             2400 drivers/scsi/ncr53c8xx.c 		RADDR (scr0),
scr0             2868 drivers/scsi/ncr53c8xx.c 		RADDR (scr0),
scr0              343 drivers/scsi/sym53c8xx_2/sym_fw1.h 		RADDR_1 (scr0),
scr0              665 drivers/scsi/sym53c8xx_2/sym_fw1.h 		RADDR_1 (scr0),
scr0              688 drivers/scsi/sym53c8xx_2/sym_fw1.h 		RADDR_1 (scr0),
scr0              816 drivers/scsi/sym53c8xx_2/sym_fw1.h 		RADDR_1 (scr0),
scr0             1111 drivers/scsi/sym53c8xx_2/sym_fw1.h 		RADDR_1 (scr0),
scr0              304 drivers/scsi/sym53c8xx_2/sym_fw2.h 	SCR_LOAD_REL (scr0, 4),
scr0              653 drivers/scsi/sym53c8xx_2/sym_fw2.h 	SCR_STORE_REL (scr0, 4),
scr0              663 drivers/scsi/sym53c8xx_2/sym_fw2.h 	SCR_LOAD_REL (scr0, 4),	/* DUMMY READ */
scr0              791 drivers/scsi/sym53c8xx_2/sym_fw2.h 	SCR_STORE_REL (scr0, 4),
scr0             1002 drivers/scsi/sym53c8xx_2/sym_fw2.h 	SCR_LOAD_REL (scr0, 4),
scr0              586 drivers/scsi/sym53c8xx_2/sym_hipd.h #define  HX_REG	scr0
scr0              293 sound/soc/mxs/mxs-saif.c 	u32 scr0;
scr0              312 sound/soc/mxs/mxs-saif.c 	scr0 = __raw_readl(saif->base + SAIF_CTRL);
scr0              313 sound/soc/mxs/mxs-saif.c 	scr0 = scr0 & ~BM_SAIF_CTRL_BITCLK_EDGE & ~BM_SAIF_CTRL_LRCLK_POLARITY \
scr0              368 sound/soc/mxs/mxs-saif.c 		__raw_writel(scr | scr0, saif->base + SAIF_CTRL);