sclk_params 2951 drivers/gpu/drm/amd/amdgpu/si_dpm.c SISLANDS_SMC_SCLK_VALUE sclk_params; sclk_params 2967 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_calculate_sclk_params(adev, sclk, &sclk_params); sclk_params 2970 drivers/gpu/drm/amd/amdgpu/si_dpm.c p_div = (sclk_params.vCG_SPLL_FUNC_CNTL & SPLL_PDIV_A_MASK) >> SPLL_PDIV_A_SHIFT; sclk_params 2971 drivers/gpu/drm/amd/amdgpu/si_dpm.c fb_div = (sclk_params.vCG_SPLL_FUNC_CNTL_3 & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; sclk_params 2972 drivers/gpu/drm/amd/amdgpu/si_dpm.c clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT; sclk_params 2973 drivers/gpu/drm/amd/amdgpu/si_dpm.c clk_v = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM_2 & CLK_V_MASK) >> CLK_V_SHIFT; sclk_params 2095 drivers/gpu/drm/radeon/ni_dpm.c NISLANDS_SMC_SCLK_VALUE sclk_params; sclk_params 2112 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_calculate_sclk_params(rdev, sclk, &sclk_params); sclk_params 2116 drivers/gpu/drm/radeon/ni_dpm.c p_div = (sclk_params.vCG_SPLL_FUNC_CNTL & SPLL_PDIV_A_MASK) >> SPLL_PDIV_A_SHIFT; sclk_params 2117 drivers/gpu/drm/radeon/ni_dpm.c fb_div = (sclk_params.vCG_SPLL_FUNC_CNTL_3 & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; sclk_params 2118 drivers/gpu/drm/radeon/ni_dpm.c clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT; sclk_params 2119 drivers/gpu/drm/radeon/ni_dpm.c clk_v = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM_2 & CLK_V_MASK) >> CLK_V_SHIFT; sclk_params 2852 drivers/gpu/drm/radeon/si_dpm.c SISLANDS_SMC_SCLK_VALUE sclk_params; sclk_params 2868 drivers/gpu/drm/radeon/si_dpm.c ret = si_calculate_sclk_params(rdev, sclk, &sclk_params); sclk_params 2872 drivers/gpu/drm/radeon/si_dpm.c p_div = (sclk_params.vCG_SPLL_FUNC_CNTL & SPLL_PDIV_A_MASK) >> SPLL_PDIV_A_SHIFT; sclk_params 2873 drivers/gpu/drm/radeon/si_dpm.c fb_div = (sclk_params.vCG_SPLL_FUNC_CNTL_3 & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; sclk_params 2874 drivers/gpu/drm/radeon/si_dpm.c clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT; sclk_params 2875 drivers/gpu/drm/radeon/si_dpm.c clk_v = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM_2 & CLK_V_MASK) >> CLK_V_SHIFT;