scl_mode          354 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c 			uint32_t scl_mode = REG_READ(SCL_MODE);
scl_mode          384 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c 				scl_mode, dpp->tf_mask->SCL_COEF_RAM_SELECT_CURRENT,
scl_mode          388 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c 			REG_SET_2(SCL_MODE, scl_mode,