SDMA1_BASE         46 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c 		adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i]));
SDMA1_BASE         49 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c 		adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i]));
SDMA1_BASE         48 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c 		adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i]));
SDMA1_BASE        143 drivers/gpu/drm/amd/include/arct_ip_offset.h static const struct IP_BASE SDMA1_BASE            ={ { { { 0x00001860, 0x00012560, 0x0040AC00, 0, 0, 0 } },
SDMA1_BASE        173 drivers/gpu/drm/amd/include/vega10_ip_offset.h static const struct IP_BASE SDMA1_BASE			= { { { { 0x00001460, 0, 0, 0, 0 } },
SDMA1_BASE        117 drivers/gpu/drm/amd/include/vega20_ip_offset.h static const struct IP_BASE SDMA1_BASE            ={ { { { 0x00001860, 0, 0, 0, 0, 0 } },