SDMA0_F32_CNTL    395 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 0);
SDMA0_F32_CNTL    397 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 			f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 1);
SDMA0_F32_CNTL    972 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 		tmp = REG_SET_FIELD(tmp, SDMA0_F32_CNTL, HALT, 0);
SDMA0_F32_CNTL    979 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 		tmp = REG_SET_FIELD(tmp, SDMA0_F32_CNTL, HALT, 0);
SDMA0_F32_CNTL    630 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 0);
SDMA0_F32_CNTL    632 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 			f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 1);
SDMA0_F32_CNTL    952 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1);
SDMA0_F32_CNTL   1324 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 			temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0);
SDMA0_F32_CNTL    608 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c 		f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1);
SDMA0_F32_CNTL    738 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c 			temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0);