saved_mfc_sr1_RW 675 arch/powerpc/platforms/cell/spu_base.c u64 saved_mfc_sr1_RW; saved_mfc_sr1_RW 705 arch/powerpc/platforms/cell/spu_base.c crash_spu_info[i].saved_mfc_sr1_RW = tmp; saved_mfc_sr1_RW 3938 arch/powerpc/xmon/xmon.c u64 saved_mfc_sr1_RW; saved_mfc_sr1_RW 3985 arch/powerpc/xmon/xmon.c spu_info[i].saved_mfc_sr1_RW = tmp; saved_mfc_sr1_RW 4026 arch/powerpc/xmon/xmon.c spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);