sanitized_state  1933 drivers/gpu/drm/i915/display/intel_cdclk.c 	struct intel_cdclk_state sanitized_state;
sanitized_state  1958 drivers/gpu/drm/i915/display/intel_cdclk.c 	sanitized_state.ref = dev_priv->cdclk.hw.ref;
sanitized_state  1959 drivers/gpu/drm/i915/display/intel_cdclk.c 	sanitized_state.cdclk = icl_calc_cdclk(0, sanitized_state.ref);
sanitized_state  1960 drivers/gpu/drm/i915/display/intel_cdclk.c 	sanitized_state.vco = icl_calc_cdclk_pll_vco(dev_priv,
sanitized_state  1961 drivers/gpu/drm/i915/display/intel_cdclk.c 						     sanitized_state.cdclk);
sanitized_state  1962 drivers/gpu/drm/i915/display/intel_cdclk.c 	sanitized_state.voltage_level =
sanitized_state  1964 drivers/gpu/drm/i915/display/intel_cdclk.c 						       sanitized_state.cdclk);
sanitized_state  1966 drivers/gpu/drm/i915/display/intel_cdclk.c 	icl_set_cdclk(dev_priv, &sanitized_state, INVALID_PIPE);