sachip 194 arch/arm/common/sa1111.c static int sa1111_map_irq(struct sa1111 *sachip, irq_hw_number_t hwirq) sachip 196 arch/arm/common/sa1111.c return irq_create_mapping(sachip->irqdomain, hwirq); sachip 215 arch/arm/common/sa1111.c struct sa1111 *sachip = irq_desc_get_handler_data(desc); sachip 217 arch/arm/common/sa1111.c void __iomem *mapbase = sachip->base + SA1111_INTC; sachip 233 arch/arm/common/sa1111.c irqdomain = sachip->irqdomain; sachip 263 arch/arm/common/sa1111.c struct sa1111 *sachip = irq_data_get_irq_chip_data(d); sachip 264 arch/arm/common/sa1111.c void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d); sachip 274 arch/arm/common/sa1111.c struct sa1111 *sachip = irq_data_get_irq_chip_data(d); sachip 275 arch/arm/common/sa1111.c void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d); sachip 292 arch/arm/common/sa1111.c struct sa1111 *sachip = irq_data_get_irq_chip_data(d); sachip 293 arch/arm/common/sa1111.c void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d); sachip 313 arch/arm/common/sa1111.c struct sa1111 *sachip = irq_data_get_irq_chip_data(d); sachip 314 arch/arm/common/sa1111.c void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d); sachip 336 arch/arm/common/sa1111.c struct sa1111 *sachip = irq_data_get_irq_chip_data(d); sachip 337 arch/arm/common/sa1111.c void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d); sachip 363 arch/arm/common/sa1111.c struct sa1111 *sachip = d->host_data; sachip 369 arch/arm/common/sa1111.c irq_set_chip_data(irq, sachip); sachip 381 arch/arm/common/sa1111.c static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base) sachip 383 arch/arm/common/sa1111.c void __iomem *irqbase = sachip->base + SA1111_INTC; sachip 389 arch/arm/common/sa1111.c request_mem_region(sachip->phys + SA1111_INTC, 512, "irq"); sachip 393 arch/arm/common/sa1111.c dev_err(sachip->dev, "unable to allocate %u irqs: %d\n", sachip 400 arch/arm/common/sa1111.c sachip->irq_base = ret; sachip 421 arch/arm/common/sa1111.c sachip->irqdomain = irq_domain_add_linear(NULL, SA1111_IRQ_NR, sachip 423 arch/arm/common/sa1111.c sachip); sachip 424 arch/arm/common/sa1111.c if (!sachip->irqdomain) { sachip 425 arch/arm/common/sa1111.c irq_free_descs(sachip->irq_base, SA1111_IRQ_NR); sachip 429 arch/arm/common/sa1111.c irq_domain_associate_many(sachip->irqdomain, sachip 430 arch/arm/common/sa1111.c sachip->irq_base + IRQ_GPAIN0, sachip 432 arch/arm/common/sa1111.c irq_domain_associate_many(sachip->irqdomain, sachip 433 arch/arm/common/sa1111.c sachip->irq_base + AUDXMTDMADONEA, sachip 440 arch/arm/common/sa1111.c irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); sachip 441 arch/arm/common/sa1111.c irq_set_chained_handler_and_data(sachip->irq, sa1111_irq_handler, sachip 442 arch/arm/common/sa1111.c sachip); sachip 444 arch/arm/common/sa1111.c dev_info(sachip->dev, "Providing IRQ%u-%u\n", sachip 445 arch/arm/common/sa1111.c sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1); sachip 450 arch/arm/common/sa1111.c static void sa1111_remove_irq(struct sa1111 *sachip) sachip 452 arch/arm/common/sa1111.c struct irq_domain *domain = sachip->irqdomain; sachip 453 arch/arm/common/sa1111.c void __iomem *irqbase = sachip->base + SA1111_INTC; sachip 462 arch/arm/common/sa1111.c irq_set_chained_handler_and_data(sachip->irq, NULL, NULL); sachip 467 arch/arm/common/sa1111.c release_mem_region(sachip->phys + SA1111_INTC, 512); sachip 483 arch/arm/common/sa1111.c static void __iomem *sa1111_gpio_map_reg(struct sa1111 *sachip, unsigned offset) sachip 485 arch/arm/common/sa1111.c void __iomem *reg = sachip->base + SA1111_GPIO; sachip 519 arch/arm/common/sa1111.c struct sa1111 *sachip = gc_to_sa1111(gc); sachip 520 arch/arm/common/sa1111.c void __iomem *reg = sa1111_gpio_map_reg(sachip, offset); sachip 528 arch/arm/common/sa1111.c struct sa1111 *sachip = gc_to_sa1111(gc); sachip 530 arch/arm/common/sa1111.c void __iomem *reg = sa1111_gpio_map_reg(sachip, offset); sachip 533 arch/arm/common/sa1111.c spin_lock_irqsave(&sachip->lock, flags); sachip 536 arch/arm/common/sa1111.c spin_unlock_irqrestore(&sachip->lock, flags); sachip 544 arch/arm/common/sa1111.c struct sa1111 *sachip = gc_to_sa1111(gc); sachip 546 arch/arm/common/sa1111.c void __iomem *reg = sa1111_gpio_map_reg(sachip, offset); sachip 549 arch/arm/common/sa1111.c spin_lock_irqsave(&sachip->lock, flags); sachip 554 arch/arm/common/sa1111.c spin_unlock_irqrestore(&sachip->lock, flags); sachip 561 arch/arm/common/sa1111.c struct sa1111 *sachip = gc_to_sa1111(gc); sachip 562 arch/arm/common/sa1111.c void __iomem *reg = sa1111_gpio_map_reg(sachip, offset); sachip 570 arch/arm/common/sa1111.c struct sa1111 *sachip = gc_to_sa1111(gc); sachip 572 arch/arm/common/sa1111.c void __iomem *reg = sa1111_gpio_map_reg(sachip, offset); sachip 575 arch/arm/common/sa1111.c spin_lock_irqsave(&sachip->lock, flags); sachip 578 arch/arm/common/sa1111.c spin_unlock_irqrestore(&sachip->lock, flags); sachip 584 arch/arm/common/sa1111.c struct sa1111 *sachip = gc_to_sa1111(gc); sachip 586 arch/arm/common/sa1111.c void __iomem *reg = sachip->base + SA1111_GPIO; sachip 592 arch/arm/common/sa1111.c spin_lock_irqsave(&sachip->lock, flags); sachip 599 arch/arm/common/sa1111.c spin_unlock_irqrestore(&sachip->lock, flags); sachip 604 arch/arm/common/sa1111.c struct sa1111 *sachip = gc_to_sa1111(gc); sachip 606 arch/arm/common/sa1111.c return sa1111_map_irq(sachip, offset); sachip 609 arch/arm/common/sa1111.c static int sa1111_setup_gpios(struct sa1111 *sachip) sachip 611 arch/arm/common/sa1111.c sachip->gc.label = "sa1111"; sachip 612 arch/arm/common/sa1111.c sachip->gc.parent = sachip->dev; sachip 613 arch/arm/common/sa1111.c sachip->gc.owner = THIS_MODULE; sachip 614 arch/arm/common/sa1111.c sachip->gc.get_direction = sa1111_gpio_get_direction; sachip 615 arch/arm/common/sa1111.c sachip->gc.direction_input = sa1111_gpio_direction_input; sachip 616 arch/arm/common/sa1111.c sachip->gc.direction_output = sa1111_gpio_direction_output; sachip 617 arch/arm/common/sa1111.c sachip->gc.get = sa1111_gpio_get; sachip 618 arch/arm/common/sa1111.c sachip->gc.set = sa1111_gpio_set; sachip 619 arch/arm/common/sa1111.c sachip->gc.set_multiple = sa1111_gpio_set_multiple; sachip 620 arch/arm/common/sa1111.c sachip->gc.to_irq = sa1111_gpio_to_irq; sachip 621 arch/arm/common/sa1111.c sachip->gc.base = -1; sachip 622 arch/arm/common/sa1111.c sachip->gc.ngpio = 18; sachip 624 arch/arm/common/sa1111.c return devm_gpiochip_add_data(sachip->dev, &sachip->gc, sachip); sachip 641 arch/arm/common/sa1111.c static void sa1111_wake(struct sa1111 *sachip) sachip 645 arch/arm/common/sa1111.c spin_lock_irqsave(&sachip->lock, flags); sachip 647 arch/arm/common/sa1111.c clk_enable(sachip->clk); sachip 652 arch/arm/common/sa1111.c r = readl_relaxed(sachip->base + SA1111_SKCR); sachip 654 arch/arm/common/sa1111.c writel_relaxed(r, sachip->base + SA1111_SKCR); sachip 656 arch/arm/common/sa1111.c writel_relaxed(r, sachip->base + SA1111_SKCR); sachip 668 arch/arm/common/sa1111.c writel_relaxed(r, sachip->base + SA1111_SKCR); sachip 679 arch/arm/common/sa1111.c writel_relaxed(0, sachip->base + SA1111_SKPCR); sachip 681 arch/arm/common/sa1111.c spin_unlock_irqrestore(&sachip->lock, flags); sachip 701 arch/arm/common/sa1111.c sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac, sachip 709 arch/arm/common/sa1111.c writel_relaxed(smcr, sachip->base + SA1111_SMCR); sachip 716 arch/arm/common/sa1111.c if (sachip->dev->dma_mask) sachip 717 arch/arm/common/sa1111.c *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2]; sachip 719 arch/arm/common/sa1111.c sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2]; sachip 731 arch/arm/common/sa1111.c sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, sachip 747 arch/arm/common/sa1111.c dev->dev.parent = sachip->dev; sachip 750 arch/arm/common/sa1111.c dev->res.start = sachip->phys + info->offset; sachip 754 arch/arm/common/sa1111.c dev->mapbase = sachip->base + info->offset; sachip 764 arch/arm/common/sa1111.c if (info->dma && sachip->dev->dma_mask) { sachip 765 arch/arm/common/sa1111.c dev->dma_mask = *sachip->dev->dma_mask; sachip 767 arch/arm/common/sa1111.c dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; sachip 772 arch/arm/common/sa1111.c dev_err(sachip->dev, "failed to allocate resource for %s\n", sachip 806 arch/arm/common/sa1111.c struct sa1111 *sachip; sachip 814 arch/arm/common/sa1111.c sachip = devm_kzalloc(me, sizeof(struct sa1111), GFP_KERNEL); sachip 815 arch/arm/common/sa1111.c if (!sachip) sachip 818 arch/arm/common/sa1111.c sachip->clk = devm_clk_get(me, "SA1111_CLK"); sachip 819 arch/arm/common/sa1111.c if (IS_ERR(sachip->clk)) sachip 820 arch/arm/common/sa1111.c return PTR_ERR(sachip->clk); sachip 822 arch/arm/common/sa1111.c ret = clk_prepare(sachip->clk); sachip 826 arch/arm/common/sa1111.c spin_lock_init(&sachip->lock); sachip 828 arch/arm/common/sa1111.c sachip->dev = me; sachip 829 arch/arm/common/sa1111.c dev_set_drvdata(sachip->dev, sachip); sachip 831 arch/arm/common/sa1111.c sachip->pdata = pd; sachip 832 arch/arm/common/sa1111.c sachip->phys = mem->start; sachip 833 arch/arm/common/sa1111.c sachip->irq = irq; sachip 839 arch/arm/common/sa1111.c sachip->base = ioremap(mem->start, PAGE_SIZE * 2); sachip 840 arch/arm/common/sa1111.c if (!sachip->base) { sachip 848 arch/arm/common/sa1111.c id = readl_relaxed(sachip->base + SA1111_SKID); sachip 861 arch/arm/common/sa1111.c sa1111_wake(sachip); sachip 867 arch/arm/common/sa1111.c ret = sa1111_setup_irq(sachip, pd->irq_base); sachip 872 arch/arm/common/sa1111.c ret = sa1111_setup_gpios(sachip); sachip 887 arch/arm/common/sa1111.c sa1111_configure_smc(sachip, 1, sachip 896 arch/arm/common/sa1111.c val = readl_relaxed(sachip->base + SA1111_SKPCR); sachip 897 arch/arm/common/sa1111.c writel_relaxed(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR); sachip 906 arch/arm/common/sa1111.c g_sa1111 = sachip; sachip 914 arch/arm/common/sa1111.c sa1111_init_one_child(sachip, mem, &sa1111_devices[i]); sachip 919 arch/arm/common/sa1111.c sa1111_remove_irq(sachip); sachip 921 arch/arm/common/sa1111.c clk_disable(sachip->clk); sachip 923 arch/arm/common/sa1111.c iounmap(sachip->base); sachip 925 arch/arm/common/sa1111.c clk_unprepare(sachip->clk); sachip 940 arch/arm/common/sa1111.c static void __sa1111_remove(struct sa1111 *sachip) sachip 942 arch/arm/common/sa1111.c device_for_each_child(sachip->dev, NULL, sa1111_remove_one); sachip 944 arch/arm/common/sa1111.c sa1111_remove_irq(sachip); sachip 946 arch/arm/common/sa1111.c clk_disable(sachip->clk); sachip 947 arch/arm/common/sa1111.c clk_unprepare(sachip->clk); sachip 949 arch/arm/common/sa1111.c iounmap(sachip->base); sachip 977 arch/arm/common/sa1111.c struct sa1111 *sachip = dev_get_drvdata(dev); sachip 986 arch/arm/common/sa1111.c sachip->saved_state = save; sachip 988 arch/arm/common/sa1111.c spin_lock_irqsave(&sachip->lock, flags); sachip 993 arch/arm/common/sa1111.c base = sachip->base; sachip 1001 arch/arm/common/sa1111.c writel_relaxed(0, sachip->base + SA1111_SKPWM0); sachip 1002 arch/arm/common/sa1111.c writel_relaxed(0, sachip->base + SA1111_SKPWM1); sachip 1004 arch/arm/common/sa1111.c base = sachip->base + SA1111_INTC; sachip 1017 arch/arm/common/sa1111.c val = readl_relaxed(sachip->base + SA1111_SKCR); sachip 1018 arch/arm/common/sa1111.c writel_relaxed(val | SKCR_SLEEP, sachip->base + SA1111_SKCR); sachip 1020 arch/arm/common/sa1111.c clk_disable(sachip->clk); sachip 1022 arch/arm/common/sa1111.c spin_unlock_irqrestore(&sachip->lock, flags); sachip 1042 arch/arm/common/sa1111.c struct sa1111 *sachip = dev_get_drvdata(dev); sachip 1047 arch/arm/common/sa1111.c save = sachip->saved_state; sachip 1055 arch/arm/common/sa1111.c id = readl_relaxed(sachip->base + SA1111_SKID); sachip 1057 arch/arm/common/sa1111.c __sa1111_remove(sachip); sachip 1066 arch/arm/common/sa1111.c sa1111_wake(sachip); sachip 1077 arch/arm/common/sa1111.c spin_lock_irqsave(&sachip->lock, flags); sachip 1079 arch/arm/common/sa1111.c writel_relaxed(0, sachip->base + SA1111_INTC + SA1111_INTEN0); sachip 1080 arch/arm/common/sa1111.c writel_relaxed(0, sachip->base + SA1111_INTC + SA1111_INTEN1); sachip 1082 arch/arm/common/sa1111.c base = sachip->base; sachip 1090 arch/arm/common/sa1111.c base = sachip->base + SA1111_INTC; sachip 1100 arch/arm/common/sa1111.c spin_unlock_irqrestore(&sachip->lock, flags); sachip 1102 arch/arm/common/sa1111.c sachip->saved_state = NULL; sachip 1130 arch/arm/common/sa1111.c struct sa1111 *sachip = platform_get_drvdata(pdev); sachip 1132 arch/arm/common/sa1111.c if (sachip) { sachip 1134 arch/arm/common/sa1111.c kfree(sachip->saved_state); sachip 1135 arch/arm/common/sa1111.c sachip->saved_state = NULL; sachip 1137 arch/arm/common/sa1111.c __sa1111_remove(sachip); sachip 1181 arch/arm/common/sa1111.c static unsigned int __sa1111_pll_clock(struct sa1111 *sachip) sachip 1185 arch/arm/common/sa1111.c skcdr = readl_relaxed(sachip->base + SA1111_SKCDR); sachip 1205 arch/arm/common/sa1111.c struct sa1111 *sachip = sa1111_chip_driver(sadev); sachip 1207 arch/arm/common/sa1111.c return __sa1111_pll_clock(sachip); sachip 1221 arch/arm/common/sa1111.c struct sa1111 *sachip = sa1111_chip_driver(sadev); sachip 1225 arch/arm/common/sa1111.c spin_lock_irqsave(&sachip->lock, flags); sachip 1227 arch/arm/common/sa1111.c val = readl_relaxed(sachip->base + SA1111_SKCR); sachip 1233 arch/arm/common/sa1111.c writel_relaxed(val, sachip->base + SA1111_SKCR); sachip 1235 arch/arm/common/sa1111.c spin_unlock_irqrestore(&sachip->lock, flags); sachip 1246 arch/arm/common/sa1111.c struct sa1111 *sachip = sa1111_chip_driver(sadev); sachip 1252 arch/arm/common/sa1111.c div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate; sachip 1258 arch/arm/common/sa1111.c writel_relaxed(div - 1, sachip->base + SA1111_SKAUD); sachip 1270 arch/arm/common/sa1111.c struct sa1111 *sachip = sa1111_chip_driver(sadev); sachip 1276 arch/arm/common/sa1111.c div = readl_relaxed(sachip->base + SA1111_SKAUD) + 1; sachip 1278 arch/arm/common/sa1111.c return __sa1111_pll_clock(sachip) / (256 * div); sachip 1292 arch/arm/common/sa1111.c struct sa1111 *sachip = sa1111_chip_driver(sadev); sachip 1297 arch/arm/common/sa1111.c if (sachip->pdata && sachip->pdata->enable) sachip 1298 arch/arm/common/sa1111.c ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid); sachip 1301 arch/arm/common/sa1111.c spin_lock_irqsave(&sachip->lock, flags); sachip 1302 arch/arm/common/sa1111.c val = readl_relaxed(sachip->base + SA1111_SKPCR); sachip 1303 arch/arm/common/sa1111.c writel_relaxed(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR); sachip 1304 arch/arm/common/sa1111.c spin_unlock_irqrestore(&sachip->lock, flags); sachip 1316 arch/arm/common/sa1111.c struct sa1111 *sachip = sa1111_chip_driver(sadev); sachip 1320 arch/arm/common/sa1111.c spin_lock_irqsave(&sachip->lock, flags); sachip 1321 arch/arm/common/sa1111.c val = readl_relaxed(sachip->base + SA1111_SKPCR); sachip 1322 arch/arm/common/sa1111.c writel_relaxed(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR); sachip 1323 arch/arm/common/sa1111.c spin_unlock_irqrestore(&sachip->lock, flags); sachip 1325 arch/arm/common/sa1111.c if (sachip->pdata && sachip->pdata->disable) sachip 1326 arch/arm/common/sa1111.c sachip->pdata->disable(sachip->pdata->data, sadev->devid); sachip 1332 arch/arm/common/sa1111.c struct sa1111 *sachip = sa1111_chip_driver(sadev); sachip 1335 arch/arm/common/sa1111.c return sa1111_map_irq(sachip, sadev->hwirq[num]);