s_reg             673 arch/alpha/kernel/traps.c s_reg_to_mem (unsigned long s_reg)
s_reg             675 arch/alpha/kernel/traps.c 	return ((s_reg >> 62) << 30) | ((s_reg << 5) >> 34);
s_reg             516 drivers/clk/qcom/mmcc-msm8960.c 	u32 s_reg;
s_reg             564 drivers/clk/qcom/mmcc-msm8960.c 	regmap_update_bits(rdi->clkr.regmap, rdi->s_reg, rdi->s_mask, val);
s_reg             590 drivers/clk/qcom/mmcc-msm8960.c 	regmap_read(rdi->clkr.regmap, rdi->s_reg, &val);
s_reg             612 drivers/clk/qcom/mmcc-msm8960.c 	.s_reg = 0x0058,
s_reg             629 drivers/clk/qcom/mmcc-msm8960.c 	.s_reg = 0x0238,
s_reg             646 drivers/clk/qcom/mmcc-msm8960.c 	.s_reg = 0x0058,
s_reg             663 drivers/clk/qcom/mmcc-msm8960.c 	.s_reg = 0x0238,
s_reg             680 drivers/clk/qcom/mmcc-msm8960.c 	.s_reg = 0x0238,
s_reg            3766 drivers/gpu/drm/i915/i915_debugfs.c 	u32 s_reg[SS_MAX], eu_reg[2 * SS_MAX], eu_mask[2];
s_reg            3776 drivers/gpu/drm/i915/i915_debugfs.c 		s_reg[s] = I915_READ(GEN10_SLICE_PGCTL_ACK(s)) &
s_reg            3792 drivers/gpu/drm/i915/i915_debugfs.c 		if ((s_reg[s] & GEN9_PGCTL_SLICE_ACK) == 0)
s_reg            3802 drivers/gpu/drm/i915/i915_debugfs.c 			if (!(s_reg[s] & (GEN9_PGCTL_SS_ACK(ss))))
s_reg            3822 drivers/gpu/drm/i915/i915_debugfs.c 	u32 s_reg[SS_MAX], eu_reg[2 * SS_MAX], eu_mask[2];
s_reg            3826 drivers/gpu/drm/i915/i915_debugfs.c 		s_reg[s] = I915_READ(GEN9_SLICE_PGCTL_ACK(s));
s_reg            3841 drivers/gpu/drm/i915/i915_debugfs.c 		if ((s_reg[s] & GEN9_PGCTL_SLICE_ACK) == 0)
s_reg            3855 drivers/gpu/drm/i915/i915_debugfs.c 				if (!(s_reg[s] & (GEN9_PGCTL_SS_ACK(ss))))
s_reg             767 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank_offset];
s_reg             768 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	struct regulator *reg = s_reg->regulator;
s_reg             773 drivers/pinctrl/sunxi/pinctrl-sunxi.c 		refcount_inc(&s_reg->refcount);
s_reg             794 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	s_reg->regulator = reg;
s_reg             795 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	refcount_set(&s_reg->refcount, 1);
s_reg             800 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	regulator_put(s_reg->regulator);
s_reg             811 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank_offset];
s_reg             813 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	if (!refcount_dec_and_test(&s_reg->refcount))
s_reg             816 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	regulator_disable(s_reg->regulator);
s_reg             817 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	regulator_put(s_reg->regulator);
s_reg             818 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	s_reg->regulator = NULL;