SCL_HORZ_FILTER_CONTROL  373 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 				REG_SET(SCL_HORZ_FILTER_CONTROL, 0,
SCL_HORZ_FILTER_CONTROL   83 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	SRI(SCL_HORZ_FILTER_CONTROL, SCL, id), \
SCL_HORZ_FILTER_CONTROL  188 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	XFM_SF(SCL_HORZ_FILTER_CONTROL, SCL_H_2TAP_HARDCODE_COEF_EN, mask_sh), \
SCL_HORZ_FILTER_CONTROL  431 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	uint32_t SCL_HORZ_FILTER_CONTROL;