SCL_COEFF_MEM_PWR_STATE  201 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 		REG_WAIT(DCFE_MEM_PWR_STATUS, SCL_COEFF_MEM_PWR_STATE, 0, 1, 10);
SCL_COEFF_MEM_PWR_STATE  201 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	XFM_SF(DCFE_MEM_PWR_STATUS, SCL_COEFF_MEM_PWR_STATE, mask_sh), \
SCL_COEFF_MEM_PWR_STATE  287 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	XFM_SF(DCFE0_DCFE_MEM_PWR_STATUS, SCL_COEFF_MEM_PWR_STATE, mask_sh), \
SCL_COEFF_MEM_PWR_STATE  352 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	type SCL_COEFF_MEM_PWR_STATE; \