SCL1_B 600 drivers/pinctrl/sh-pfc/pfc-r8a77470.c PINMUX_IPSR_MSEL(IP1_31_28, SCL1_B, SEL_I2C01_1), SCL1_B 1199 drivers/pinctrl/sh-pfc/pfc-r8a7778.c PINMUX_IPSR_MSEL(IP10_5_3, SCL1_B, SEL_I2C1_B), SCL1_B 1413 drivers/pinctrl/sh-pfc/pfc-r8a7778.c I2C_PFC_MUX(i2c1_b, SDA1_B, SCL1_B); SCL1_B 906 drivers/pinctrl/sh-pfc/pfc-r8a7779.c PINMUX_IPSR_MSEL(IP4_19_17, SCL1_B, SEL_I2C1_1), SCL1_B 366 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP13_11_8 FM(MLB_CLK) F_(0, 0) FM(MSIOF1_SCK_F) F_(0, 0) FM(SCL1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) SCL1_B 1283 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_MSEL(IP13_11_8, SCL1_B, SEL_I2C1_1), SCL1_B 374 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP14_11_8 FM(MLB_CLK) F_(0, 0) FM(MSIOF1_SCK_F) F_(0, 0) FM(SCL1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) SCL1_B 1333 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_MSEL(IP14_11_8, SCL1_B, SEL_I2C1_1), SCL1_B 378 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP14_11_8 FM(MLB_CLK) F_(0, 0) FM(MSIOF1_SCK_F) F_(0, 0) FM(SCL1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) SCL1_B 1339 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_MSEL(IP14_11_8, SCL1_B, SEL_I2C1_1), SCL1_B 379 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP14_11_8 FM(MLB_CLK) F_(0, 0) FM(MSIOF1_SCK_F) F_(0, 0) FM(SCL1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) SCL1_B 1343 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_MSEL(IP14_11_8, SCL1_B, SEL_I2C1_1), SCL1_B 327 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define IP13_15_12 FM(MLB_CLK) FM(RX0_B) F_(0, 0) FM(RIF0_D0_A) FM(SCL1_B) FM(TCLK1_B) F_(0, 0) F_(0, 0) FM(SIM0_RST_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) SCL1_B 1193 drivers/pinctrl/sh-pfc/pfc-r8a77990.c PINMUX_IPSR_MSEL(IP13_15_12, SCL1_B, SEL_I2C1_1),