rx_st             710 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h 		uint64_t rx_st:5;
rx_st             720 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h 		uint64_t rx_st:5;
rx_st             624 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h 		uint64_t rx_st:2;
rx_st             628 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h 		uint64_t rx_st:2;
rx_st             648 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h 		uint64_t rx_st:2;
rx_st             652 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h 		uint64_t rx_st:2;
rx_st             173 drivers/i2c/busses/i2c-qcom-geni.c 	u32 rx_st, tx_st;
rx_st             176 drivers/i2c/busses/i2c-qcom-geni.c 		rx_st = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT);
rx_st             179 drivers/i2c/busses/i2c-qcom-geni.c 		rx_st = readl_relaxed(gi2c->se.base + SE_GENI_RX_FIFO_STATUS);
rx_st             183 drivers/i2c/busses/i2c-qcom-geni.c 		dma, tx_st, rx_st, m_stat);
rx_st             208 drivers/i2c/busses/i2c-qcom-geni.c 	u32 rx_st;
rx_st             218 drivers/i2c/busses/i2c-qcom-geni.c 	rx_st = readl_relaxed(base + SE_GENI_RX_FIFO_STATUS);
rx_st             250 drivers/i2c/busses/i2c-qcom-geni.c 		u32 rxcnt = rx_st & RX_FIFO_WC_MSK;
rx_st             209 sound/mips/hal2.h 	u32 rx_st[24];		/* Channel status data */