rx_reg 41 arch/mips/include/asm/txx9/dmac.h u64 rx_reg; rx_reg 586 drivers/dma/pch_dma.c reg = pd_slave->rx_reg; rx_reg 845 drivers/dma/txx9dmac.c desc->hwdesc.SAR = ds->rx_reg; rx_reg 854 drivers/dma/txx9dmac.c desc->hwdesc32.SAR = ds->rx_reg; rx_reg 1011 drivers/dma/txx9dmac.c (ds->tx_reg && ds->rx_reg) || (!ds->tx_reg && !ds->rx_reg)) rx_reg 30 drivers/mailbox/arm_mhu.c void __iomem *rx_reg; rx_reg 46 drivers/mailbox/arm_mhu.c val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS); rx_reg 52 drivers/mailbox/arm_mhu.c writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS); rx_reg 130 drivers/mailbox/arm_mhu.c mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i]; rx_reg 131 drivers/mailbox/arm_mhu.c mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; rx_reg 36 drivers/mailbox/platform_mhu.c void __iomem *rx_reg; rx_reg 52 drivers/mailbox/platform_mhu.c val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS); rx_reg 58 drivers/mailbox/platform_mhu.c writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS); rx_reg 144 drivers/mailbox/platform_mhu.c mhu->mlink[i].rx_reg = mhu->base + platform_mhu_reg[i]; rx_reg 145 drivers/mailbox/platform_mhu.c mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; rx_reg 4432 drivers/net/ethernet/intel/i40e/i40e_main.c u32 rx_reg; rx_reg 4435 drivers/net/ethernet/intel/i40e/i40e_main.c rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); rx_reg 4436 drivers/net/ethernet/intel/i40e/i40e_main.c if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) rx_reg 4460 drivers/net/ethernet/intel/i40e/i40e_main.c u32 rx_reg; rx_reg 4464 drivers/net/ethernet/intel/i40e/i40e_main.c rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); rx_reg 4465 drivers/net/ethernet/intel/i40e/i40e_main.c if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == rx_reg 4466 drivers/net/ethernet/intel/i40e/i40e_main.c ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) rx_reg 4472 drivers/net/ethernet/intel/i40e/i40e_main.c if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) rx_reg 4477 drivers/net/ethernet/intel/i40e/i40e_main.c rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; rx_reg 4479 drivers/net/ethernet/intel/i40e/i40e_main.c rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; rx_reg 4481 drivers/net/ethernet/intel/i40e/i40e_main.c wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); rx_reg 208 drivers/net/ethernet/intel/ice/ice_lib.c u32 rx_reg; rx_reg 210 drivers/net/ethernet/intel/ice/ice_lib.c rx_reg = rd32(hw, QRX_CTRL(pf_q)); rx_reg 213 drivers/net/ethernet/intel/ice/ice_lib.c if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M)) rx_reg 218 drivers/net/ethernet/intel/ice/ice_lib.c rx_reg |= QRX_CTRL_QENA_REQ_M; rx_reg 220 drivers/net/ethernet/intel/ice/ice_lib.c rx_reg &= ~QRX_CTRL_QENA_REQ_M; rx_reg 221 drivers/net/ethernet/intel/ice/ice_lib.c wr32(hw, QRX_CTRL(pf_q), rx_reg); rx_reg 901 drivers/net/ethernet/marvell/sky2.c u32 rx_reg; rx_reg 985 drivers/net/ethernet/marvell/sky2.c rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON; rx_reg 988 drivers/net/ethernet/marvell/sky2.c rx_reg |= GMF_RX_OVER_ON; rx_reg 990 drivers/net/ethernet/marvell/sky2.c sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg); rx_reg 697 drivers/spi/spi-omap2-mcspi.c void __iomem *rx_reg; rx_reg 710 drivers/spi/spi-omap2-mcspi.c rx_reg = base + OMAP2_MCSPI_RX0; rx_reg 745 drivers/spi/spi-omap2-mcspi.c *rx++ = readl_relaxed(rx_reg); rx_reg 759 drivers/spi/spi-omap2-mcspi.c *rx++ = readl_relaxed(rx_reg); rx_reg 792 drivers/spi/spi-omap2-mcspi.c *rx++ = readl_relaxed(rx_reg); rx_reg 806 drivers/spi/spi-omap2-mcspi.c *rx++ = readl_relaxed(rx_reg); rx_reg 839 drivers/spi/spi-omap2-mcspi.c *rx++ = readl_relaxed(rx_reg); rx_reg 853 drivers/spi/spi-omap2-mcspi.c *rx++ = readl_relaxed(rx_reg); rx_reg 366 drivers/spi/spi-orion.c void __iomem *tx_reg, *rx_reg, *int_reg; rx_reg 371 drivers/spi/spi-orion.c rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG); rx_reg 388 drivers/spi/spi-orion.c *(*rx_buf)++ = readl(rx_reg); rx_reg 397 drivers/spi/spi-orion.c void __iomem *tx_reg, *rx_reg, *int_reg; rx_reg 402 drivers/spi/spi-orion.c rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG); rx_reg 419 drivers/spi/spi-orion.c put_unaligned(__le16_to_cpu(readl(rx_reg)), (*rx_buf)++); rx_reg 882 drivers/spi/spi-topcliff-pch.c param->rx_reg = data->io_base_addr + PCH_SPDRR; rx_reg 746 drivers/tty/serial/pch_uart.c param->rx_reg = port->mapbase + UART_RX; rx_reg 21 include/linux/pch_dma.h dma_addr_t rx_reg; rx_reg 355 sound/soc/txx9/txx9aclc.c ds->rx_reg = 0; rx_reg 358 sound/soc/txx9/txx9aclc.c ds->rx_reg = drvdata->physbase + ACAUDIDAT;