rx_base_offset    206 drivers/soc/fsl/qe/ucc_slow.c 	uccs->rx_base_offset =
rx_base_offset    209 drivers/soc/fsl/qe/ucc_slow.c 	if (IS_ERR_VALUE(uccs->rx_base_offset)) {
rx_base_offset    212 drivers/soc/fsl/qe/ucc_slow.c 		uccs->rx_base_offset = 0;
rx_base_offset    241 drivers/soc/fsl/qe/ucc_slow.c 	bd = uccs->rx_bd = qe_muram_addr(uccs->rx_base_offset);
rx_base_offset    295 drivers/soc/fsl/qe/ucc_slow.c 	out_be16(&uccs->us_pram->rbase, uccs->rx_base_offset);
rx_base_offset    355 drivers/soc/fsl/qe/ucc_slow.c 	if (uccs->rx_base_offset)
rx_base_offset    356 drivers/soc/fsl/qe/ucc_slow.c 		qe_muram_free(uccs->rx_base_offset);
rx_base_offset    198 include/soc/fsl/qe/ucc_slow.h 	u32 rx_base_offset;	/* first BD in Rx BD table offset (In MURAM) */